From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795751; cv=none; d=zohomail.com; s=zohoarc; b=l5eVyDxa9R/8tRWcmOaTieaOyC0fCbBmHXh9904FZ82L4Xqu88ilGAbk4ZbdWgIY0/buRv9fx/KR4AKFFyIpL+EDU4RmFOKsxa0D10BTRD1y9Z+0fa6teKWas6xyBscEvDRVKdswj/z9a8vNscsgFWG1UWNpAWxyL0IL1weVsjE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795751; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=bQjkhbMoK/p110+ezCXx6XyhC9yOCxnNoBGV8HeX/9Y=; b=QLsj9G+DZouTM0zy+G6F1yJ87xloyIbj6/H1nswD0ZtNURMfyQYG+UUwo9I3a92QDasWIhL1e8vynehBVuyr0Kpo+JnEGuHlROkYuGwHR8G5+MW8muuwD/sSZ7vfVXK/HDE8rlR9uf0XAGez7CWGYwiBMfYjSFPQHfBSuOA0U6Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795751811933.3872368953706; Wed, 3 Mar 2021 10:22:31 -0800 (PST) Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-9-lv3TTlMOPQmzku1tfYbjcg-1; Wed, 03 Mar 2021 13:22:29 -0500 Received: by mail-wr1-f71.google.com with SMTP id h30so13180699wrh.10 for ; Wed, 03 Mar 2021 10:22:28 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id q15sm33044035wrr.58.2021.03.03.10.22.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:22:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795750; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bQjkhbMoK/p110+ezCXx6XyhC9yOCxnNoBGV8HeX/9Y=; b=XfuyQ/eSiyjsZzs4sO9LD79H03DIirzBAoSBBFGdSTrM+83xPbVtRWlo0I4JRVSqW0hoQG sktOPxNQqPq1h/1Z5gfw+fB7rXzJMGW7SbDh3vh/vSccFL2TgKQf3vKPJBiLau7NOpa36E xPBE/BIFCzdJqVLveOiQWSgKX6HARcQ= X-MC-Unique: lv3TTlMOPQmzku1tfYbjcg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bQjkhbMoK/p110+ezCXx6XyhC9yOCxnNoBGV8HeX/9Y=; b=hTmEYYs3s0MyWAQDcqeSefybdibSQtDGR5yBR3zGFy+wEtw4gpqIwds/+Wc/CL1l2U 9oxGNFqR6VFWSPzbsFDFN95uKLZLISuoFs0Kt5OCbTk0xLhREySLNlpWnm1CNOTnLWvg 1uIAr4KFLD2faFXIVpO7uAV0zvvyLkyGcUa4LDUdslF24dSmbRKrqmrL+TPp+dB4UE9P C0us2AZjX3hTyWeD2Uhp+yNznMBBKamhCVk7iCiAtKvaohsc2sG9eEzSyVINcZ5/09a8 fS50/GabwMwct/+Kmz6xXMSQqJOK2K0rd4PN2anI4wWBKHXWOvQUXQo5fSnHiCjO8DCF MYpg== X-Gm-Message-State: AOAM531AkwOOQpYD1YiDyBSUaNkN2yi9I+z0RH+e9xrUCZFnIhbdmzL8 t7K6rHzMM45zKCehrn5XlH1oOnixz9QpJQSCorXqMKfzweQ18rzqA5kwyrm0W89nfaEDu3gFH2h ONj9o9eoL0AM7aw== X-Received: by 2002:adf:a219:: with SMTP id p25mr28636296wra.400.1614795747898; Wed, 03 Mar 2021 10:22:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJyfbZpBv9k7hXSgga18Q2U7X80Yx3nYLyWQWxwQRzBihlp/Au8nBqtr9CXYtuKzZpEM6c4XtA== X-Received: by 2002:adf:a219:: with SMTP id p25mr28636276wra.400.1614795747724; Wed, 03 Mar 2021 10:22:27 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 01/19] target/i386/hvf: Use boolean value for vcpu_dirty Date: Wed, 3 Mar 2021 19:22:01 +0100 Message-Id: <20210303182219.1631042-2-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) CPUState::vcpu_dirty is of type 'bool', not 'integer'. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/hvf/hvf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 15f14ac69e7..3c5c9c8197e 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -533,7 +533,7 @@ int hvf_init_vcpu(CPUState *cpu) } =20 r =3D hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf_fd, HV_VCPU_DEFAULT); - cpu->vcpu_dirty =3D 1; + cpu->vcpu_dirty =3D true; assert_hvf_ok(r); =20 if (hv_vmx_read_capability(HV_VMX_CAP_PINBASED, --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795757; cv=none; d=zohomail.com; s=zohoarc; b=W4nmaqrp8ls88+z2C3pg09lTYx2UJ+4yP9EniOj0iHRTmHlDV3ajLVdWQ1Fpk7m8l5FuLiiu2UnieclX4VBAjdLXAlYtu9ay3tKqKLZ05A4uUWdlbFxOTX5cGF0hKHee0QGrUVbMJ50AaHN9rSMW8iXNcCLAST92Qz4l59v4gsM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795757; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=PDMMcK3oLvQF9Y3zPO+zi1w8ujiioTi9C21H6L1uDR8=; b=AcHQ7ZKUQ8rU8WxRE0fzrBrOVrkSFgd0wJWbcVNUzISt1SzgFFb2r7tidsrT7wHfXLvPh6BGuTtrzhS5/OYO6PSkgrg1FZBHXP9RIFFYMCb/n3vtXqPkuh0Ts/EdEB4Na5WIoGo0uimNsQaPwGbPB3Iej9WPXQPf0vek4n9DRcE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795757972983.1398943850203; Wed, 3 Mar 2021 10:22:37 -0800 (PST) Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-21-6eMpyU3LOtOFK95JWAkO4A-1; Wed, 03 Mar 2021 13:22:35 -0500 Received: by mail-wr1-f70.google.com with SMTP id p15so13017820wre.13 for ; Wed, 03 Mar 2021 10:22:35 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id f22sm6664306wmc.33.2021.03.03.10.22.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:22:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795757; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PDMMcK3oLvQF9Y3zPO+zi1w8ujiioTi9C21H6L1uDR8=; b=Pcn7ca38F4+JJ6JgjoO9SUNEfKRPucvZGt/kYLWomsciz78SqSLymwneW0OOIr2DZ02sPq uTZPfOD6C75NRj+3W2gc1HSS7FE2EwsyNP1guL4lbGpydaaFMju0Bh4ayiLIbseECZmNit iuy5jpNqsIzRaUNR1hYmHsOw0NIBwLo= X-MC-Unique: 6eMpyU3LOtOFK95JWAkO4A-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PDMMcK3oLvQF9Y3zPO+zi1w8ujiioTi9C21H6L1uDR8=; b=gHjr8nGNjtonKtanBqnXaEhQ1Wa5Yu3IBrvfY0+oPeGtSLJslc7oZhBYmZLydgPuYH 8BMpBt5pzPKTKiESyHcXkY0DYnQH0ENJ8Mda7GVL7tS2ib7COj5b+UJGIgdkUjmydxlA lAfZDAUWvGooeRwPKxRG+vASj8rJAITT1UHC+BIJrTyuEeKaVSNZwg2KOopoL/UCmP52 Rz1TqJRwmDpOYJwRm51imY+5DrjlbvG28WHrF4/PwYIpLB79HsMAQ03BYdnHD37MM4pA w8ziNOMwLf1TdWqYeU6BYjeKm6vnLigAhXIWfMteO9b1Ns1XW3pB8bsDBt0Z7+/pYvqf m8Iw== X-Gm-Message-State: AOAM530Gj+V/eV+QAjNOZj7EgseTHbAIGMn4Do1Tv4lPsrc6pvZl53/R ho1+8HIW06tD8d9YcpgV51duQk33z0aanZdtet1seEM77fnx3QlbMgiPzsyuQzdW79eOFVbijGo 6ZTtsXDshlSK1VA== X-Received: by 2002:a05:6000:1104:: with SMTP id z4mr33860wrw.10.1614795754048; Wed, 03 Mar 2021 10:22:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJyVg9s4r7l2oq5gGa5GiZIt6JV8Y3K8GM+LsYLl9lX9UTNK+XtLNOIsOPAgN1hKIK0orGUEvQ== X-Received: by 2002:a05:6000:1104:: with SMTP id z4mr33805wrw.10.1614795753484; Wed, 03 Mar 2021 10:22:33 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 02/19] target/s390x/kvm: Simplify debug code Date: Wed, 3 Mar 2021 19:22:02 +0100 Message-Id: <20210303182219.1631042-3-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) We already have the 'run' variable holding 'cs->kvm_run' value. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth --- target/s390x/kvm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index 7a892d663df..73f816a7222 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -1785,8 +1785,7 @@ static int handle_intercept(S390CPU *cpu) int icpt_code =3D run->s390_sieic.icptcode; int r =3D 0; =20 - DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, - (long)cs->kvm_run->psw_addr); + DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, (long)run->psw_addr= ); switch (icpt_code) { case ICPT_INSTRUCTION: case ICPT_PV_INSTR: --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795763; cv=none; d=zohomail.com; s=zohoarc; b=XTRVCuLKoV2KllbGL9WWo1smpGsZZvoXNK6FltSo4YzqpuzPgnMRDrBToryPA1rIXOTuICJRE5X3uIOLX7crQvvoc+rgxrgfQzeyio6M5j2UBWXtW9Fn1Jy43CA4TBtXF4zxLbEzaFqaRIJyF8ubrJD73T5U2EuvN5a/5e1SUxc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795763; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=dPrv/DkAiyl42NA4omCqrPAwJ/Yioej+8U34dhimaag=; b=Pb0dZZjVdW6RJIt7LF8xzVIEd86YfWn/DNeOYXrnmJoNBvYKEU4vZESPa6KbWprdpnCQZawOrPCqZzFCMdPXfSGMFfFR8CtwFQ8sfG3UHIC/LXc6XrFRLBJcaeoknwh1YOXMNIOOdMdjGmcYjpZMgdmUg1CZisKnk7HxYiSSDHQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1614795763960705.2659720751993; Wed, 3 Mar 2021 10:22:43 -0800 (PST) Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-538-Et4omhY8MZCXZHHVLoYwNA-1; Wed, 03 Mar 2021 13:22:41 -0500 Received: by mail-wm1-f69.google.com with SMTP id c7so1674210wml.8 for ; Wed, 03 Mar 2021 10:22:41 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id s3sm13959189wrt.93.2021.03.03.10.22.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:22:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795762; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dPrv/DkAiyl42NA4omCqrPAwJ/Yioej+8U34dhimaag=; b=dQA6WIqbt/HXqdb4yC8w+10twQBmQWDG5bvo1wAxFb3XegJER1ZvrSR8z4I8Nym2V9orl1 ZhXpXqt63O6bRjwHIjKjiEjm6eggr4ANpO05qrU8L7bbi3XPiGGOLJW++L2EhPMT7CAJkl s44swiHhpTs8BPoNWsri4So2Q5BctXM= X-MC-Unique: Et4omhY8MZCXZHHVLoYwNA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dPrv/DkAiyl42NA4omCqrPAwJ/Yioej+8U34dhimaag=; b=f2qTrRnrNP3XxkTz/EDiNDYEB3WCkXBk+abIfhsF08z2a6fuBbWScsis+LdInzgnlB Rnr6+dQMfecFW8JjmCiUM7dcEzJwC+2Jta6Dpf5SweByPKF7JtP46Dc8lJBmnhW51xKW Usksix//Ucs1s4SqcfABpys6PqGaRxBVZVMiCAx/RqvVfJb/707lni7CKRhikuZTgqqn p95PQZF8VWlRBu+h2DsbiKBOQwAJEUEmep5yM+OFBDcQY+irJuOqo99QqqJYaNPj7sLd 5r1vq/Yq4r/UYQgZvJb0hKA72LsfGxhT0kibmQwBDXYjBv5i1/5WGkQ4yz9g7IlSutqK pwcw== X-Gm-Message-State: AOAM531alqhsI/omlQfCMc4rDHT5qswYzDtg6PEln7JivW+r1uCZafwf UPIyCmsiq2PwMofdhbAK9kF++sMzv5u3SMFBOjcAfGr4+eEud0CEKoV4FZnjjOvsudtUskp16N8 Pmq4cbdcD8UitXQ== X-Received: by 2002:a05:600c:35c1:: with SMTP id r1mr240938wmq.143.1614795759921; Wed, 03 Mar 2021 10:22:39 -0800 (PST) X-Google-Smtp-Source: ABdhPJwXxCQPSMt1p4gHnR3Ywd1Kul89hiZNYH0SsYELKDXDY9Tt9PJ1TBkjbrz5JshRHXS5s1Y5rw== X-Received: by 2002:a05:600c:35c1:: with SMTP id r1mr240887wmq.143.1614795759484; Wed, 03 Mar 2021 10:22:39 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 03/19] target/s390x/kvm: Reduce deref by declaring 'struct kvm_run' on stack Date: Wed, 3 Mar 2021 19:22:03 +0100 Message-Id: <20210303182219.1631042-4-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) In order to make one of the next commits easier to review, declare 'struct kvm_run' on the stack when it is used in various places in a function. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/s390x/kvm.c | 128 +++++++++++++++++++++++---------------------- 1 file changed, 65 insertions(+), 63 deletions(-) diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index 73f816a7222..d8ac12dfc11 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -467,6 +467,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) { S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; + struct kvm_run *run =3D cs->kvm_run; struct kvm_sregs sregs; struct kvm_regs regs; struct kvm_fpu fpu =3D {}; @@ -474,13 +475,13 @@ int kvm_arch_put_registers(CPUState *cs, int level) int i; =20 /* always save the PSW and the GPRS*/ - cs->kvm_run->psw_addr =3D env->psw.addr; - cs->kvm_run->psw_mask =3D env->psw.mask; + run->psw_addr =3D env->psw.addr; + run->psw_mask =3D env->psw.mask; =20 if (can_sync_regs(cs, KVM_SYNC_GPRS)) { for (i =3D 0; i < 16; i++) { - cs->kvm_run->s.regs.gprs[i] =3D env->regs[i]; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_GPRS; + run->s.regs.gprs[i] =3D env->regs[i]; + run->kvm_dirty_regs |=3D KVM_SYNC_GPRS; } } else { for (i =3D 0; i < 16; i++) { @@ -494,17 +495,17 @@ int kvm_arch_put_registers(CPUState *cs, int level) =20 if (can_sync_regs(cs, KVM_SYNC_VRS)) { for (i =3D 0; i < 32; i++) { - cs->kvm_run->s.regs.vrs[i][0] =3D env->vregs[i][0]; - cs->kvm_run->s.regs.vrs[i][1] =3D env->vregs[i][1]; + run->s.regs.vrs[i][0] =3D env->vregs[i][0]; + run->s.regs.vrs[i][1] =3D env->vregs[i][1]; } - cs->kvm_run->s.regs.fpc =3D env->fpc; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_VRS; + run->s.regs.fpc =3D env->fpc; + run->kvm_dirty_regs |=3D KVM_SYNC_VRS; } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { for (i =3D 0; i < 16; i++) { - cs->kvm_run->s.regs.fprs[i] =3D *get_freg(env, i); + run->s.regs.fprs[i] =3D *get_freg(env, i); } - cs->kvm_run->s.regs.fpc =3D env->fpc; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_FPRS; + run->s.regs.fpc =3D env->fpc; + run->kvm_dirty_regs |=3D KVM_SYNC_FPRS; } else { /* Floating point */ for (i =3D 0; i < 16; i++) { @@ -524,12 +525,12 @@ int kvm_arch_put_registers(CPUState *cs, int level) } =20 if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { - cs->kvm_run->s.regs.cputm =3D env->cputm; - cs->kvm_run->s.regs.ckc =3D env->ckc; - cs->kvm_run->s.regs.todpr =3D env->todpr; - cs->kvm_run->s.regs.gbea =3D env->gbea; - cs->kvm_run->s.regs.pp =3D env->pp; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_ARCH0; + run->s.regs.cputm =3D env->cputm; + run->s.regs.ckc =3D env->ckc; + run->s.regs.todpr =3D env->todpr; + run->s.regs.gbea =3D env->gbea; + run->s.regs.pp =3D env->pp; + run->kvm_dirty_regs |=3D KVM_SYNC_ARCH0; } else { /* * These ONE_REGS are not protected by a capability. As they are o= nly @@ -544,16 +545,16 @@ int kvm_arch_put_registers(CPUState *cs, int level) } =20 if (can_sync_regs(cs, KVM_SYNC_RICCB)) { - memcpy(cs->kvm_run->s.regs.riccb, env->riccb, 64); - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_RICCB; + memcpy(run->s.regs.riccb, env->riccb, 64); + run->kvm_dirty_regs |=3D KVM_SYNC_RICCB; } =20 /* pfault parameters */ if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { - cs->kvm_run->s.regs.pft =3D env->pfault_token; - cs->kvm_run->s.regs.pfs =3D env->pfault_select; - cs->kvm_run->s.regs.pfc =3D env->pfault_compare; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_PFAULT; + run->s.regs.pft =3D env->pfault_token; + run->s.regs.pfs =3D env->pfault_select; + run->s.regs.pfc =3D env->pfault_compare; + run->kvm_dirty_regs |=3D KVM_SYNC_PFAULT; } else if (cap_async_pf) { r =3D kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token= ); if (r < 0) { @@ -572,11 +573,11 @@ int kvm_arch_put_registers(CPUState *cs, int level) /* access registers and control registers*/ if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { for (i =3D 0; i < 16; i++) { - cs->kvm_run->s.regs.acrs[i] =3D env->aregs[i]; - cs->kvm_run->s.regs.crs[i] =3D env->cregs[i]; + run->s.regs.acrs[i] =3D env->aregs[i]; + run->s.regs.crs[i] =3D env->cregs[i]; } - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_ACRS; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_CRS; + run->kvm_dirty_regs |=3D KVM_SYNC_ACRS; + run->kvm_dirty_regs |=3D KVM_SYNC_CRS; } else { for (i =3D 0; i < 16; i++) { sregs.acrs[i] =3D env->aregs[i]; @@ -589,30 +590,30 @@ int kvm_arch_put_registers(CPUState *cs, int level) } =20 if (can_sync_regs(cs, KVM_SYNC_GSCB)) { - memcpy(cs->kvm_run->s.regs.gscb, env->gscb, 32); - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_GSCB; + memcpy(run->s.regs.gscb, env->gscb, 32); + run->kvm_dirty_regs |=3D KVM_SYNC_GSCB; } =20 if (can_sync_regs(cs, KVM_SYNC_BPBC)) { - cs->kvm_run->s.regs.bpbc =3D env->bpbc; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_BPBC; + run->s.regs.bpbc =3D env->bpbc; + run->kvm_dirty_regs |=3D KVM_SYNC_BPBC; } =20 if (can_sync_regs(cs, KVM_SYNC_ETOKEN)) { - cs->kvm_run->s.regs.etoken =3D env->etoken; - cs->kvm_run->s.regs.etoken_extension =3D env->etoken_extension; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_ETOKEN; + run->s.regs.etoken =3D env->etoken; + run->s.regs.etoken_extension =3D env->etoken_extension; + run->kvm_dirty_regs |=3D KVM_SYNC_ETOKEN; } =20 if (can_sync_regs(cs, KVM_SYNC_DIAG318)) { - cs->kvm_run->s.regs.diag318 =3D env->diag318_info; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_DIAG318; + run->s.regs.diag318 =3D env->diag318_info; + run->kvm_dirty_regs |=3D KVM_SYNC_DIAG318; } =20 /* Finally the prefix */ if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { - cs->kvm_run->s.regs.prefix =3D env->psa; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_PREFIX; + run->s.regs.prefix =3D env->psa; + run->kvm_dirty_regs |=3D KVM_SYNC_PREFIX; } else { /* prefix is only supported via sync regs */ } @@ -623,19 +624,20 @@ int kvm_arch_get_registers(CPUState *cs) { S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; + struct kvm_run *run =3D cs->kvm_run; struct kvm_sregs sregs; struct kvm_regs regs; struct kvm_fpu fpu; int i, r; =20 /* get the PSW */ - env->psw.addr =3D cs->kvm_run->psw_addr; - env->psw.mask =3D cs->kvm_run->psw_mask; + env->psw.addr =3D run->psw_addr; + env->psw.mask =3D run->psw_mask; =20 /* the GPRS */ if (can_sync_regs(cs, KVM_SYNC_GPRS)) { for (i =3D 0; i < 16; i++) { - env->regs[i] =3D cs->kvm_run->s.regs.gprs[i]; + env->regs[i] =3D run->s.regs.gprs[i]; } } else { r =3D kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); @@ -650,8 +652,8 @@ int kvm_arch_get_registers(CPUState *cs) /* The ACRS and CRS */ if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { for (i =3D 0; i < 16; i++) { - env->aregs[i] =3D cs->kvm_run->s.regs.acrs[i]; - env->cregs[i] =3D cs->kvm_run->s.regs.crs[i]; + env->aregs[i] =3D run->s.regs.acrs[i]; + env->cregs[i] =3D run->s.regs.crs[i]; } } else { r =3D kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); @@ -667,15 +669,15 @@ int kvm_arch_get_registers(CPUState *cs) /* Floating point and vector registers */ if (can_sync_regs(cs, KVM_SYNC_VRS)) { for (i =3D 0; i < 32; i++) { - env->vregs[i][0] =3D cs->kvm_run->s.regs.vrs[i][0]; - env->vregs[i][1] =3D cs->kvm_run->s.regs.vrs[i][1]; + env->vregs[i][0] =3D run->s.regs.vrs[i][0]; + env->vregs[i][1] =3D run->s.regs.vrs[i][1]; } - env->fpc =3D cs->kvm_run->s.regs.fpc; + env->fpc =3D run->s.regs.fpc; } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { for (i =3D 0; i < 16; i++) { - *get_freg(env, i) =3D cs->kvm_run->s.regs.fprs[i]; + *get_freg(env, i) =3D run->s.regs.fprs[i]; } - env->fpc =3D cs->kvm_run->s.regs.fpc; + env->fpc =3D run->s.regs.fpc; } else { r =3D kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); if (r < 0) { @@ -689,15 +691,15 @@ int kvm_arch_get_registers(CPUState *cs) =20 /* The prefix */ if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { - env->psa =3D cs->kvm_run->s.regs.prefix; + env->psa =3D run->s.regs.prefix; } =20 if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { - env->cputm =3D cs->kvm_run->s.regs.cputm; - env->ckc =3D cs->kvm_run->s.regs.ckc; - env->todpr =3D cs->kvm_run->s.regs.todpr; - env->gbea =3D cs->kvm_run->s.regs.gbea; - env->pp =3D cs->kvm_run->s.regs.pp; + env->cputm =3D run->s.regs.cputm; + env->ckc =3D run->s.regs.ckc; + env->todpr =3D run->s.regs.todpr; + env->gbea =3D run->s.regs.gbea; + env->pp =3D run->s.regs.pp; } else { /* * These ONE_REGS are not protected by a capability. As they are o= nly @@ -712,27 +714,27 @@ int kvm_arch_get_registers(CPUState *cs) } =20 if (can_sync_regs(cs, KVM_SYNC_RICCB)) { - memcpy(env->riccb, cs->kvm_run->s.regs.riccb, 64); + memcpy(env->riccb, run->s.regs.riccb, 64); } =20 if (can_sync_regs(cs, KVM_SYNC_GSCB)) { - memcpy(env->gscb, cs->kvm_run->s.regs.gscb, 32); + memcpy(env->gscb, run->s.regs.gscb, 32); } =20 if (can_sync_regs(cs, KVM_SYNC_BPBC)) { - env->bpbc =3D cs->kvm_run->s.regs.bpbc; + env->bpbc =3D run->s.regs.bpbc; } =20 if (can_sync_regs(cs, KVM_SYNC_ETOKEN)) { - env->etoken =3D cs->kvm_run->s.regs.etoken; - env->etoken_extension =3D cs->kvm_run->s.regs.etoken_extension; + env->etoken =3D run->s.regs.etoken; + env->etoken_extension =3D run->s.regs.etoken_extension; } =20 /* pfault parameters */ if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { - env->pfault_token =3D cs->kvm_run->s.regs.pft; - env->pfault_select =3D cs->kvm_run->s.regs.pfs; - env->pfault_compare =3D cs->kvm_run->s.regs.pfc; + env->pfault_token =3D run->s.regs.pft; + env->pfault_select =3D run->s.regs.pfs; + env->pfault_compare =3D run->s.regs.pfc; } else if (cap_async_pf) { r =3D kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token= ); if (r < 0) { @@ -749,7 +751,7 @@ int kvm_arch_get_registers(CPUState *cs) } =20 if (can_sync_regs(cs, KVM_SYNC_DIAG318)) { - env->diag318_info =3D cs->kvm_run->s.regs.diag318; + env->diag318_info =3D run->s.regs.diag318; } =20 return 0; --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795773; cv=none; d=zohomail.com; s=zohoarc; b=Db84cXwZwwfcH1pVVYZB4WlErLON8IwzOH8loOrBy/4NFpHZDOlhJwUKbUomfSBtUJXtVCLzCIbW3UsyzrVf7fJe5QPSlgC9dW5y2WXWjI0DgMjhMasHUqld6G8LKch3V+k4xtnHasNF2n3kZKE7cJVyonF9EzjdMLXyE0ri0d4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795773; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=3WOU0ObUPkLYlvbEIzar57F9vUZTGCF79gCYDqtyU50=; b=IAz+7JP+jaTXg3G38384LEDGIaHUgbSi1nk1m7eXhUm9/qIXmWPP85v4TslngYKtptUcd1eDtgIgy+2rWSo/a+2q6t3WnAzoYPUFZ/HSeFJz+Zoexxcs13GFn3rhA3D9G7heuN9Ah6MfQAfnUIxAK22HbM9H4QoCBVd12VOnFRs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795773885416.5055036228706; Wed, 3 Mar 2021 10:22:53 -0800 (PST) Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-373-5DFQyKehO8CNcDnBCiyWyQ-1; Wed, 03 Mar 2021 13:22:51 -0500 Received: by mail-wr1-f72.google.com with SMTP id m9so7426413wrx.6 for ; Wed, 03 Mar 2021 10:22:51 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id a198sm6785613wmd.11.2021.03.03.10.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:22:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795772; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3WOU0ObUPkLYlvbEIzar57F9vUZTGCF79gCYDqtyU50=; b=Hha3r2HPWnbBWyxtmMfX0u9TlOBBnh25+SyMkClY4IPwjztsiLNrsHQ7WVMIjliHqHPRpr IR8ROuxcT54wx3xAKC3cH3cO0ZQ6y9nbW/RfrmmuIgQBBQDFK1bJW9qwDiMvZD4z0e2yg7 XdBTIZiWj9DGZJbVOwesuDvrv8BqE7I= X-MC-Unique: 5DFQyKehO8CNcDnBCiyWyQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3WOU0ObUPkLYlvbEIzar57F9vUZTGCF79gCYDqtyU50=; b=a0zIseYdLfut/6Iv4EISdSQFMABE9SD7sm0YpGOjwGDf1YUC566IIj4NjH6ge2uft5 VNVJymM2tlFXjr1LTa4XMR1/i7N2dh+qYj6x5vP/Et7j0Cqm8M8aSYu0zdZqYDSVDfSu 7smYe3Y+GbUCV3ls8TNH3zSTEL5NHhdkE1djKNqZ9+dVUa5RsRYbADA/yxvp3EycUfLx e2qHNSEWP7lkxnjx66SEQ78CHwynPbQ2TBHEvYxQvfM+/H9cke8X7rpCaAFY3b6zA+hj aL7F7tVYzCqAL1aZpRQoFr8Pi4m5VWGs8FBF5qmlHX2hEU+/v6GfZZ7EyeDs8DtrqMMc GCUA== X-Gm-Message-State: AOAM5318LH/TO9JNe/4mkNzHEWn5thJ/l+aTJT7ooI6SLs4coppxkD16 dSPCx67GcSKD14b94/6PlIs6QHcA86kUcsd1rablJewR1KkFwIjN0NL3uT84eSywi8H3luJfIY0 l1zDc8kir3d/9ZQ== X-Received: by 2002:adf:fe01:: with SMTP id n1mr28570487wrr.341.1614795770242; Wed, 03 Mar 2021 10:22:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJzqqykw9kqMqftlN/tD2Ahqv9Vq5lqc3xUzYUUXIkr2YeSmzmNjmOGpzqJYOAdnlKq3vN7dKg== X-Received: by 2002:adf:fe01:: with SMTP id n1mr28570454wrr.341.1614795770019; Wed, 03 Mar 2021 10:22:50 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 04/19] cpu: Croup accelerator-specific fields altogether Date: Wed, 3 Mar 2021 19:22:04 +0100 Message-Id: <20210303182219.1631042-5-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c005d3dc2d8..074199ce73c 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -393,10 +393,6 @@ struct CPUState { */ uintptr_t mem_io_pc; =20 - int kvm_fd; - struct KVMState *kvm_state; - struct kvm_run *kvm_run; - /* Used for events with 'vcpu' and *without* the 'disabled' properties= */ DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS); DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS); @@ -416,6 +412,12 @@ struct CPUState { uint32_t can_do_io; int32_t exception_index; =20 + /* Accelerator-specific fields. */ + int kvm_fd; + struct KVMState *kvm_state; + struct kvm_run *kvm_run; + struct hax_vcpu_state *hax_vcpu; + int hvf_fd; /* shared by kvm, hax and hvf */ bool vcpu_dirty; =20 @@ -426,10 +428,6 @@ struct CPUState { =20 bool ignore_memory_transaction_failures; =20 - struct hax_vcpu_state *hax_vcpu; - - int hvf_fd; - /* track IOMMUs whose translations we've cached in the TCG TLB */ GArray *iommu_notifiers; }; --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795779; cv=none; d=zohomail.com; s=zohoarc; b=O3+z2bAFQnHWQ6dk4kfXQ4QkQg2FJG6POjnWvk3q09kQKx0GdI+SYcRYQNINdWBq9qZSYe0oNylGNuBzY93nMdtwZmJ4CDKn9JSz376tshN+t8O7lj6pJPm9s1YMOF9DByGu/qT3gwIKLXiDW8k+1FkkFJ5l8zN75bbDe3683Zk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795779; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=PLSHq+T6Ji51VQxldUQn+fMOB/V6gychel2awYEX8OQ=; b=ZGPy6QCWyIqvtBdQ55/+YSnAiv1Tz19zduz8JG52mgCQouKp4AozOzr6fHuuhCpdetYzGEXJHLparuMKRNLu91bWoEfF27/0rbz7wSxf35E4P65xhVO2btwK+KdXnkPhE+97afc9/+353OQcSUiy4os6rRn6/3SmGlDTY0467mI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 161479577938339.49804800712161; Wed, 3 Mar 2021 10:22:59 -0800 (PST) Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-328-Wqwi3WriP7mCN7jRDz4D_A-1; Wed, 03 Mar 2021 13:22:56 -0500 Received: by mail-wr1-f70.google.com with SMTP id l10so13159995wry.16 for ; Wed, 03 Mar 2021 10:22:56 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id g9sm34117131wrp.14.2021.03.03.10.22.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:22:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795778; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PLSHq+T6Ji51VQxldUQn+fMOB/V6gychel2awYEX8OQ=; b=I8rKIGNblhLav8MOA2/ifzd1V6/vKBSj3MPz97TXkS4999Z5sKbnbDhCBp0b0PQdYIo0uy w0bYIxKjXbnBPdN9ILrJAskFmavNvq94/fq9GfYoT8WwrsL/OfVo2puf3pnuP0WGl/rsN0 4aBmrbFwBWqn1EsCZr35pXIP9HJXD2Y= X-MC-Unique: Wqwi3WriP7mCN7jRDz4D_A-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PLSHq+T6Ji51VQxldUQn+fMOB/V6gychel2awYEX8OQ=; b=gwUgoamb/Movg2IS8MQDRpgkFarwVHGGIcSCn7CRdMVFyFdFR5bJIz9POafqsCaGQ8 li9wY169Kdfb7wdhgVJPWRGWzo9Zb06oUKdU0sj03IoDsoJRW4FRQRVZMe3AOVe/ott9 EqYsllbGCl3n7XGuc1rPhaKNylEHhd95JyitgT6pt/Xftp/qaOYdBVq7WbAyTN7pZCfU wxfVtXCOeIPP9jgkPuua+OjFNciItW+h+DiJNMMKt0/oYGQMl/wj7F/jPFfjaR7Mxk84 Txh+YzJN1VGyj9/sF90b+/uIHr0+XP5AS9VYa4SVA2rXkVGKVZsM28h8ukOIRCl6M2+N ikuQ== X-Gm-Message-State: AOAM531lf0ptcfDxIh/vYiJj2YvMh2BCOIA+/ND2rdbQDGWK11ZzjZks pXNvmKnHjT/3ptkSif5xM7/li9KZUqrLWE9j4f74syylSYmXfKou2na4LUeM6oSntsb+XVxM0AW KGLSrKHh5UjmUgA== X-Received: by 2002:a5d:4445:: with SMTP id x5mr36759wrr.30.1614795775646; Wed, 03 Mar 2021 10:22:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJyL7XqgigoYX+jhMS8HmdFrzDcCNORueIOZ/5Ml4d8Vt2v7I+aoNp8Jrifd3yZk0HsaustCqA== X-Received: by 2002:a5d:4445:: with SMTP id x5mr36729wrr.30.1614795775449; Wed, 03 Mar 2021 10:22:55 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 05/19] cpu: Introduce AccelvCPUState opaque structure Date: Wed, 3 Mar 2021 19:22:05 +0100 Message-Id: <20210303182219.1631042-6-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Introduce the opaque 'AccelvCPUState' structure which will be declared by each accelerator. Forward-declare it in "cpu.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 074199ce73c..d807645af2b 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -274,6 +274,9 @@ struct qemu_work_item; #define CPU_UNSET_NUMA_NODE_ID -1 #define CPU_TRACE_DSTATE_MAX_EVENTS 32 =20 +/* This structure is defined by each accelerator. */ +struct AccelvCPUState; + /** * CPUState: * @cpu_index: CPU index (informative). @@ -312,6 +315,7 @@ struct qemu_work_item; * @next_cpu: Next CPU sharing TB cache. * @opaque: User data. * @mem_io_pc: Host Program Counter at which the memory was accessed. + * @accel_vcpu: Pointer to accelerator-specific AccelvCPUState field. * @kvm_fd: vCPU file descriptor for KVM. * @work_mutex: Lock to prevent multiple access to @work_list. * @work_list: List of pending asynchronous work. @@ -413,6 +417,7 @@ struct CPUState { int32_t exception_index; =20 /* Accelerator-specific fields. */ + struct AccelvCPUState *accel_vcpu; int kvm_fd; struct KVMState *kvm_state; struct kvm_run *kvm_run; --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795787; cv=none; d=zohomail.com; s=zohoarc; b=Kn0VpHKigt25vv+EcK+uz19I3S8dB/1g+nTB0DOQioEHEZJAz+n0rzCGUA6oydHUV/gLc/WGcbHqua60XeQhQAi7ECFO6qemiFfH1I7NdswWgv07s3stJ9wMBPK/wh0WvkdATQwpXarj4A8d6BP6WLdVmWmcw1qsJpk1dEWvUwM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795787; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=JSKZ4U4zBdXHSKAtMYPcidB9tymokaAa3vsPtMUAjQM=; b=cjpTmmtVfQfLznVeWub13qjbJrXBrlF2KxwHs/7o6o+9FhX/QJnhm2EYQzF3rAmkAdPjYPjEzW1UHUkNCJV9YEsYa3yqfR56ctmPAQqh37359wqhp0CwZC6kRWIM9npguTi+zbhTh3H8xoLH/5KFajmb6x99/cpbdYQuyiD8Ooc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 16147957872581015.013340261742; Wed, 3 Mar 2021 10:23:07 -0800 (PST) Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-523-kimLJzeCPn2iQvx6nPajwQ-1; Wed, 03 Mar 2021 13:23:02 -0500 Received: by mail-wm1-f70.google.com with SMTP id 73so3358667wma.3 for ; Wed, 03 Mar 2021 10:23:02 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id a131sm6749075wmc.48.2021.03.03.10.22.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795786; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JSKZ4U4zBdXHSKAtMYPcidB9tymokaAa3vsPtMUAjQM=; b=fAuXMcBm5NKSBkUQfzdpXkaF7H7xUE/u0rvJQhL6HkGkNQTdu/5C+l3sHuG2AtbBzrYp63 GZAzcNYI2MrnUrqxxgxhfpI4qb2DaB9R9yJFI9T6r4mMyyQR+Uo3LeLDqj3icYkJpZ64yn R4AK9HtgC6mfFHq5NzHP6ta4xfTZUJc= X-MC-Unique: kimLJzeCPn2iQvx6nPajwQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JSKZ4U4zBdXHSKAtMYPcidB9tymokaAa3vsPtMUAjQM=; b=VZDJg47P+ofSN+C4dnr8xBkmBryeySt7WOE4WtQBvQzEsLcudjSc6TvbNDmCwE4AKP ckHRGvw0M2Q2MDSwWm1iX2wunAy8I/TLMhGtdf6rrbmYCU/qKnw/C2uMJVO+xKC9+TcK W5terCJz190V3kWyMmFV2Sp5682++w4DI6wBNOmioyWEn4QmP9D9UQfH/FSNqWqCI9M0 HhEk40pGlF8JwT7D2vqI7469qKFMkP8az96jcolNH5meCEfrzy3pS2loMXReKcDJIXJ6 10P/rOoMJg9kPNOTERrMzhA8ATbXERiltbFKxunV2wH73dbOTuMu6MkBHn8Onq5F1Y0Q u/LQ== X-Gm-Message-State: AOAM531ceQxFowkLxPImy09a05uw9XJkzWCUmuyCFeePb4gSfavl+ez7 W8thKFSYcsKm2yqj1HKJBslm7A8QTeUrmawh4larRg70LwkbzMNKxpAoVKhfzMYCacSi1+WEFlJ ACxUPkWGMrrsg/A== X-Received: by 2002:a05:600c:4ec7:: with SMTP id g7mr295364wmq.56.1614795781334; Wed, 03 Mar 2021 10:23:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJzkfTopuTz8+rr5+ZCkXuINfRYff1lmKq7JTlmgWuTa8IXYSH/Sikf55e2yiTGalQ+YvZXOhQ== X-Received: by 2002:a05:600c:4ec7:: with SMTP id g7mr295331wmq.56.1614795781060; Wed, 03 Mar 2021 10:23:01 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 06/19] accel/whpx: Add typedef for 'struct whpx_vcpu' Date: Wed, 3 Mar 2021 19:22:06 +0100 Message-Id: <20210303182219.1631042-7-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Use the 'whpx_vcpu' typedef instead of 'struct whpx_vcpu'. This will make the next commits easier to review. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/whpx/whpx-all.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index f0a35df3bba..6469e388b6d 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -148,6 +148,8 @@ struct whpx_register_set { WHV_REGISTER_VALUE values[RTL_NUMBER_OF(whpx_register_names)]; }; =20 +typedef struct whpx_vcpu whpx_vcpu; + struct whpx_vcpu { WHV_EMULATOR_HANDLE emulator; bool window_registered; @@ -173,9 +175,9 @@ struct WHPDispatch whp_dispatch; * VP support */ =20 -static struct whpx_vcpu *get_whpx_vcpu(CPUState *cpu) +static whpx_vcpu *get_whpx_vcpu(CPUState *cpu) { - return (struct whpx_vcpu *)cpu->hax_vcpu; + return (whpx_vcpu *)cpu->hax_vcpu; } =20 static WHV_X64_SEGMENT_REGISTER whpx_seg_q2h(const SegmentCache *qs, int v= 86, @@ -259,7 +261,7 @@ static int whpx_set_tsc(CPUState *cpu) static void whpx_set_registers(CPUState *cpu, int level) { struct whpx_state *whpx =3D &whpx_global; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); struct whpx_register_set vcxt; @@ -448,7 +450,7 @@ static int whpx_get_tsc(CPUState *cpu) static void whpx_get_registers(CPUState *cpu) { struct whpx_state *whpx =3D &whpx_global; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); struct whpx_register_set vcxt; @@ -712,7 +714,7 @@ static const WHV_EMULATOR_CALLBACKS whpx_emu_callbacks = =3D { static int whpx_handle_mmio(CPUState *cpu, WHV_MEMORY_ACCESS_CONTEXT *ctx) { HRESULT hr; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); WHV_EMULATOR_STATUS emu_status; =20 hr =3D whp_dispatch.WHvEmulatorTryMmioEmulation( @@ -737,7 +739,7 @@ static int whpx_handle_portio(CPUState *cpu, WHV_X64_IO_PORT_ACCESS_CONTEXT *ctx) { HRESULT hr; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); WHV_EMULATOR_STATUS emu_status; =20 hr =3D whp_dispatch.WHvEmulatorTryIoEmulation( @@ -780,7 +782,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) { HRESULT hr; struct whpx_state *whpx =3D &whpx_global; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); int irq; @@ -902,7 +904,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) =20 static void whpx_vcpu_post_run(CPUState *cpu) { - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); =20 @@ -929,7 +931,7 @@ static void whpx_vcpu_process_async_events(CPUState *cp= u) { struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); =20 if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { @@ -968,7 +970,7 @@ static int whpx_vcpu_run(CPUState *cpu) { HRESULT hr; struct whpx_state *whpx =3D &whpx_global; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); int ret; =20 whpx_vcpu_process_async_events(cpu); @@ -1331,7 +1333,7 @@ int whpx_init_vcpu(CPUState *cpu) { HRESULT hr; struct whpx_state *whpx =3D &whpx_global; - struct whpx_vcpu *vcpu =3D NULL; + whpx_vcpu *vcpu =3D NULL; Error *local_error =3D NULL; struct CPUX86State *env =3D (CPUArchState *)(cpu->env_ptr); X86CPU *x86_cpu =3D X86_CPU(cpu); @@ -1356,7 +1358,7 @@ int whpx_init_vcpu(CPUState *cpu) } } =20 - vcpu =3D g_malloc0(sizeof(struct whpx_vcpu)); + vcpu =3D g_malloc0(sizeof(whpx_vcpu)); =20 if (!vcpu) { error_report("WHPX: Failed to allocte VCPU context."); @@ -1475,7 +1477,7 @@ int whpx_vcpu_exec(CPUState *cpu) void whpx_destroy_vcpu(CPUState *cpu) { struct whpx_state *whpx =3D &whpx_global; - struct whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); + whpx_vcpu *vcpu =3D get_whpx_vcpu(cpu); =20 whp_dispatch.WHvDeleteVirtualProcessor(whpx->partition, cpu->cpu_index= ); whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795791; cv=none; d=zohomail.com; s=zohoarc; b=Tx0gy/E21m69bESIRzxNbD0pfY9SrvYcTpD/dXa/yJHhwhlnG0i/xQXlkGfFHj7bsToqf6qATFDHQEQO7T7Wm7RorgKfooPua8HaVauAvcI8m++Xkcu+CApU/WyITXYJhFC+pMr8RZQUPIc8LeLNRNwONcIHVVD91R2npEhW27A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795791; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=d+d/MBqh7nLsyh5fOlU8/TcU9o+BUbPZsFEks8VNenw=; b=NhYIHPBDGQrOBx052m1gxQjxHo+dWrsB9hoI1OwnA50UBYRj88zLRJsdu5ZfVrlRwYPPuAo++D+pni7kRg4uud4UDWXZhCqW0a5BPWjsqJFt8l8y6yaPFuYBO/+bdFH6OXNXKgJTaRdVzbHeFOKjJc4k1Z+/yGi8N2deAU7zFYY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1614795791787517.7393975309919; Wed, 3 Mar 2021 10:23:11 -0800 (PST) Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-274-ib0Vn9LJNG-sFf_a-LDGpA-1; Wed, 03 Mar 2021 13:23:08 -0500 Received: by mail-wr1-f71.google.com with SMTP id x9so9272873wro.9 for ; Wed, 03 Mar 2021 10:23:07 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id a3sm33245959wrt.68.2021.03.03.10.23.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795790; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d+d/MBqh7nLsyh5fOlU8/TcU9o+BUbPZsFEks8VNenw=; b=QDvr9hPBW120a5PiVTqUbKSIkoTDGh4NKGfVYfzj3jOtN3Tz05WHLGo1qAjwBoludXg4Yw FxP2cbGFm59Jkq9EuQUCZaIz5Ho5Pd1/na0gEB4V8SX+3LmNCkMuXFpDLI6zjTi2+3BSwE F2MO4j7MxwpxnvEKVGSNQ58uz774MLk= X-MC-Unique: ib0Vn9LJNG-sFf_a-LDGpA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d+d/MBqh7nLsyh5fOlU8/TcU9o+BUbPZsFEks8VNenw=; b=C9WuFsPOSaAEDknFvH45BPVYMJvJXepOCN5XLfsD7rwqv2EvIzkv6OJjgzW69EVJ+1 CRayXREEnGqfF/29tTiR+XhLAyQ8ujnHHH8qpciVVhrDh529L+vdSMC7WmcMuLN+JPdP Ih0p9CtpM5l9OVWWGTGS4kvBmlljasMhe4D3QmIs0Eur1nJVl0XiBfX6OErtTM33nCb0 ldv8eMs6YNxfmrCbIV7242aMKAhS2uI/lvwPVoCfq6Oj2IG9WActUJUyIwn5JnvHatZE 46V2ydwoq/pBAKy+gRPgTiUy7/+ZdH9h2FvXuAC4HW0NZKYSYJoNdZi2SA3pmWFG/UHo rpjw== X-Gm-Message-State: AOAM533Mt/SSAS6MCZnwyK7nRgCfFkQf4bRIyvsoxpWz4QGYCmmaDO28 CY61oe1w2WRhpMh9A1gDwcAjktQpViPBOBFKMPiJsfLvvV4skBD1zLlo0pOYZAV61VNT6A6qAVI fR1A9s2610Ja+fw== X-Received: by 2002:adf:a2cf:: with SMTP id t15mr14836wra.250.1614795786885; Wed, 03 Mar 2021 10:23:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJz6ujFjRNPggv7/ipzC5oDJujEI5QYZFdlngvKsuonznRYeYLKD8t2BL7D3qvATAQ4rzlY2SQ== X-Received: by 2002:adf:a2cf:: with SMTP id t15mr14791wra.250.1614795786594; Wed, 03 Mar 2021 10:23:06 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 07/19] accel/whpx: Rename struct whpx_vcpu -> AccelvCPUState Date: Wed, 3 Mar 2021 19:22:07 +0100 Message-Id: <20210303182219.1631042-8-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) The current 'struct whpx_vcpu' contains the vCPU fields specific to the WHPX accelerator. Rename it as AccelvCPUState. We keep the 'whpx_vcpu' typedef to reduce the amount of code changed. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/whpx/whpx-all.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 6469e388b6d..f0b3266114d 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -148,9 +148,9 @@ struct whpx_register_set { WHV_REGISTER_VALUE values[RTL_NUMBER_OF(whpx_register_names)]; }; =20 -typedef struct whpx_vcpu whpx_vcpu; +typedef struct AccelvCPUState whpx_vcpu; =20 -struct whpx_vcpu { +struct AccelvCPUState { WHV_EMULATOR_HANDLE emulator; bool window_registered; bool interruptable; --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795796; cv=none; d=zohomail.com; s=zohoarc; b=RwSJbEvYNM2TU+ZyTKnZdCx3r19lDsQ7v4yhabo5D4uxrMYlN6o/BiIP0/DiZnQ/g8M/RCmYOTFprEGGa3xQqZslEGfhZV6rWVPcflgbV3tlDVSz1lNRptYHL6r0a4Df1xkBYHzsJ6f1t2GyET2M4Q/UV7o6uNi7dyIQSJhUR3w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795796; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=gcmU4EwKx07Tin9L5OLokG4d2/Qw/rC/JleGsw0pME0=; b=HiFa948KewGqHCZI+0l3sUsnjCWMVcioXYsQoCqqxhh6lGA90jLG4LF4z8vDF+QfbrkVTdCj1vB4stL3mGzDK1sgzeuL7+NvzSSJyjVLZb+h4/a7TGltv82oj5a+xTt+mMmHO0eyfV3e9ESakJSLPyUbZ1gzoH1LsSRGAa06I0Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1614795796060865.269013115331; Wed, 3 Mar 2021 10:23:16 -0800 (PST) Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-382-Nk56LvFSNJiEkfGLQ25yNg-1; Wed, 03 Mar 2021 13:23:13 -0500 Received: by mail-wr1-f70.google.com with SMTP id g2so6272092wrx.20 for ; Wed, 03 Mar 2021 10:23:13 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id l22sm34033345wrb.4.2021.03.03.10.23.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795795; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gcmU4EwKx07Tin9L5OLokG4d2/Qw/rC/JleGsw0pME0=; b=FAXPyh/vCevIQO1McSdA2XjF5P8wjrVJFe+kA+HKf+Nj1y64rktIJbe/opDifn4y59jMco Tgsgmz4n370aGOfM7Md3SBfWtpE1f7VqI52WtoIX14bRwzJuR7q/7dSmBrhSDo8onHGq0w IQi1dhIg3Ywj6B2zlrznaDoZurn/Fuo= X-MC-Unique: Nk56LvFSNJiEkfGLQ25yNg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gcmU4EwKx07Tin9L5OLokG4d2/Qw/rC/JleGsw0pME0=; b=H8mnNPitCe4Oo7oDePtkWlrxWYyjGk75uciBac2EPKCzzLODBuC6mkyn8uQcM5L/OI +ANg92Y3ddiYhwrdp2Id+O8krPSMsg+UaAvhddYWk4lm4ytK/FANHWyu/pS/habdR10T sVAvKaWZHqQV6Ms/Y3mXjBZjTqRsTT7UvpMbM64rbmdmEdZTUi5bUGjxPPUP74sSlL5P ByQPQxliPVw3KXOIVZk7A4P6s413O4i1ABBNbkgRROcXUJaBSIwGNdnYlZkwDVIkXk1Z iF40TWqw1PnwLgZ33EnXsVYK8qsCuWPB/e9skwdlKTq4fU94ZY1ssCHP54iYLWhgHTbV BoCA== X-Gm-Message-State: AOAM531ToqNlEvLLlHa+hcVGBKE4VcYboldOjUvxGV8XhoXSpzFCgrLX 9DowWZZLACgETBR9Gx75LYpu+HsGD2T7Bdz5ghjxTzcQ292m2wj9ePmi+vU48d03pwzKlcmL/Fc gfsvC2XfkTZJGlA== X-Received: by 2002:adf:f512:: with SMTP id q18mr28690237wro.61.1614795792391; Wed, 03 Mar 2021 10:23:12 -0800 (PST) X-Google-Smtp-Source: ABdhPJzsuKFTfGdNl3JrpUfwyW5A/mzww+ew2G6b3+YznKtRBqmyC0QveUl42fP3vSv4XPE27dPvRA== X-Received: by 2002:adf:f512:: with SMTP id q18mr28690224wro.61.1614795792253; Wed, 03 Mar 2021 10:23:12 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 08/19] accel/whpx: Use 'accel_vcpu' generic pointer Date: Wed, 3 Mar 2021 19:22:08 +0100 Message-Id: <20210303182219.1631042-9-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Instead of naming the HAX accelerator in WHPX, use the 'accel_vcpu' field which is meant for accelerators. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/whpx/whpx-all.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index f0b3266114d..56ec82076cc 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -177,7 +177,7 @@ struct WHPDispatch whp_dispatch; =20 static whpx_vcpu *get_whpx_vcpu(CPUState *cpu) { - return (whpx_vcpu *)cpu->hax_vcpu; + return cpu->accel_vcpu; } =20 static WHV_X64_SEGMENT_REGISTER whpx_seg_q2h(const SegmentCache *qs, int v= 86, @@ -1439,7 +1439,7 @@ int whpx_init_vcpu(CPUState *cpu) =20 vcpu->interruptable =3D true; cpu->vcpu_dirty =3D true; - cpu->hax_vcpu =3D (struct hax_vcpu_state *)vcpu; + cpu->accel_vcpu =3D vcpu; max_vcpu_index =3D max(max_vcpu_index, cpu->cpu_index); qemu_add_vm_change_state_handler(whpx_cpu_update_state, cpu->env_ptr); =20 @@ -1481,7 +1481,7 @@ void whpx_destroy_vcpu(CPUState *cpu) =20 whp_dispatch.WHvDeleteVirtualProcessor(whpx->partition, cpu->cpu_index= ); whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); - g_free(cpu->hax_vcpu); + g_free(cpu->accel_vcpu); return; } =20 --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795808; cv=none; d=zohomail.com; s=zohoarc; b=msyKdp0MIrpbV0vvD4uoUto9rpD6b9fgdtzn/tHlrFrZSowzqP//3whV73a71h+XxogjmHJoDj2zEgKpPFqv33muxvzONY7c3IHWpi+3+lN3f4HQnOoYDvEl0kd2MeGldNhEg8bjjer1G+2LOIhYpxy8fJCXnxUa3BLpC9AZPBY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795808; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=bsBSf6h5clRIGLmrmL5o7OQtiQ2QaVSKYYOrh/pYYJA=; b=DWy8ANyXmcsX03HVsmRDIsYdeUPq5DfYl9JXWB7X2oWta+f/6QcgX/YBQtz+xmn6V7/Hq9knZHLMFjv7LeinwVgzuhrnWDb2UT6IVKAtw4GL92t6ZH140yBYe/tzs3l4byESX4ZAcLSaSV4vJD4SOzgzC9/EvON4xugQVxABEzI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795808607296.28271259151825; Wed, 3 Mar 2021 10:23:28 -0800 (PST) Received: from mail-wr1-f69.google.com (mail-wr1-f69.google.com [209.85.221.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-103-Lh9Eo1yPN8eIjO-jrVWlRQ-1; Wed, 03 Mar 2021 13:23:24 -0500 Received: by mail-wr1-f69.google.com with SMTP id g5so13094908wrd.22 for ; Wed, 03 Mar 2021 10:23:23 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id n6sm13487477wrt.1.2021.03.03.10.23.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795807; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bsBSf6h5clRIGLmrmL5o7OQtiQ2QaVSKYYOrh/pYYJA=; b=PANQgGiYSt8FNfaQVtPVtrYiYU7F3TJqqyF1pjyxZOzqvNLmVQ6tLYqd4KQqQukpoTQIB5 BfuIV6E5ZUbColk2qOLsNnl8jfhJ9qfGGJ5e4HOhDzd164huRfcLsEwmnpoLhvEpwID0je q9nQgYNaRICHgc7kABeoO9tWgXfcyac= X-MC-Unique: Lh9Eo1yPN8eIjO-jrVWlRQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bsBSf6h5clRIGLmrmL5o7OQtiQ2QaVSKYYOrh/pYYJA=; b=LMp2qI1djVriS2zxPVAKAi9QXa1bJ96aKY0kEkBrXm4UzC1NiqCEQ9vn+zNX1TZytl E2frnWslXsrt+Is+52+GKRaL7PuEyX/GKGSnushcPfkZdzpz8wBG7BzX8vowORtovu/o R39Cqu9Ds25+xcBGQXDOkQKaJhb/dbkoTUlDjvK0ErIM8kNf5tbmtAZVkX4oG0GURETa PR6kQGbuji5FCHzQq3x4n+7JZEdROeuTVnG3fq0FzVRaocSXQldvpTte6u1x7hUQ6drd SBxifGcJEXZpXs1/4B1rjBx7xW7HR43PbCDj7LmgXltLaNMyl15QE/2dtHTgyN6xBs4s 1fbg== X-Gm-Message-State: AOAM531puJNWVgGmDyH+0ne7rWRlNxWWFS87fjM9z7q19Q+akwS3ih/A roNb1v8w8dzwmDVzMOb6nqlW8dG6yGSjS3BtwQy/Qt3LQTSlqk7vYMf6k4wG/s9qUMcDKFNjXQk FDJ6TjHNo9bLOEQ== X-Received: by 2002:a05:6000:24b:: with SMTP id m11mr20773887wrz.393.1614795802951; Wed, 03 Mar 2021 10:23:22 -0800 (PST) X-Google-Smtp-Source: ABdhPJxT5Mnr/cqn4T3oI+iCl7/2qqSUUEQiDL1NAilJKbe4aa2BGoAiTwZhjp0yFdIrhN8U4ftx4Q== X-Received: by 2002:a05:6000:24b:: with SMTP id m11mr20773870wrz.393.1614795802788; Wed, 03 Mar 2021 10:23:22 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 09/19] accel/hax: Add typedef for 'struct hax_vcpu_state' Date: Wed, 3 Mar 2021 19:22:09 +0100 Message-Id: <20210303182219.1631042-10-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Use the 'hax_vcpu_state' typedef instead of 'struct hax_vcpu_state'. This will make the next commits easier to review. Beside the typedef addition, patch created mechanically using: $ sed -i s/struct\ hax_vcpu_state/hax_vcpu_state/ \ $(git grep -l 'struct hax_vcpu_state') Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/hax/hax-i386.h | 8 +++++--- target/i386/hax/hax-all.c | 18 +++++++++--------- target/i386/hax/hax-posix.c | 4 ++-- target/i386/hax/hax-windows.c | 4 ++-- 4 files changed, 18 insertions(+), 16 deletions(-) diff --git a/target/i386/hax/hax-i386.h b/target/i386/hax/hax-i386.h index efbb3462389..ee77406a6a6 100644 --- a/target/i386/hax/hax-i386.h +++ b/target/i386/hax/hax-i386.h @@ -25,6 +25,8 @@ typedef HANDLE hax_fd; #endif =20 extern struct hax_state hax_global; + +typedef struct hax_vcpu_state hax_vcpu_state; struct hax_vcpu_state { hax_fd fd; int vcpu_id; @@ -46,7 +48,7 @@ struct hax_vm { hax_fd fd; int id; int numvcpus; - struct hax_vcpu_state **vcpus; + hax_vcpu_state **vcpus; }; =20 #ifdef NEED_CPU_H @@ -58,7 +60,7 @@ int valid_hax_tunnel_size(uint16_t size); int hax_mod_version(struct hax_state *hax, struct hax_module_version *vers= ion); int hax_inject_interrupt(CPUArchState *env, int vector); struct hax_vm *hax_vm_create(struct hax_state *hax, int max_cpus); -int hax_vcpu_run(struct hax_vcpu_state *vcpu); +int hax_vcpu_run(hax_vcpu_state *vcpu); int hax_vcpu_create(int id); void hax_kick_vcpu_thread(CPUState *cpu); =20 @@ -78,7 +80,7 @@ int hax_host_create_vm(struct hax_state *hax, int *vm_id); hax_fd hax_host_open_vm(struct hax_state *hax, int vm_id); int hax_host_create_vcpu(hax_fd vm_fd, int vcpuid); hax_fd hax_host_open_vcpu(int vmid, int vcpuid); -int hax_host_setup_vcpu_channel(struct hax_vcpu_state *vcpu); +int hax_host_setup_vcpu_channel(hax_vcpu_state *vcpu); hax_fd hax_mod_open(void); void hax_memory_init(void); =20 diff --git a/target/i386/hax/hax-all.c b/target/i386/hax/hax-all.c index bf65ed6fa92..08c2b60b437 100644 --- a/target/i386/hax/hax-all.c +++ b/target/i386/hax/hax-all.c @@ -68,7 +68,7 @@ int valid_hax_tunnel_size(uint16_t size) =20 hax_fd hax_vcpu_get_fd(CPUArchState *env) { - struct hax_vcpu_state *vcpu =3D env_cpu(env)->hax_vcpu; + hax_vcpu_state *vcpu =3D env_cpu(env)->hax_vcpu; if (!vcpu) { return HAX_INVALID_FD; } @@ -142,7 +142,7 @@ static int hax_version_support(struct hax_state *hax) =20 int hax_vcpu_create(int id) { - struct hax_vcpu_state *vcpu =3D NULL; + hax_vcpu_state *vcpu =3D NULL; int ret; =20 if (!hax_global.vm) { @@ -155,7 +155,7 @@ int hax_vcpu_create(int id) return 0; } =20 - vcpu =3D g_new0(struct hax_vcpu_state, 1); + vcpu =3D g_new0(hax_vcpu_state, 1); =20 ret =3D hax_host_create_vcpu(hax_global.vm->fd, id); if (ret) { @@ -194,7 +194,7 @@ int hax_vcpu_create(int id) =20 int hax_vcpu_destroy(CPUState *cpu) { - struct hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->hax_vcpu; =20 if (!hax_global.vm) { fprintf(stderr, "vcpu %x destroy failed, vm is null\n", vcpu->vcpu= _id); @@ -225,7 +225,7 @@ int hax_init_vcpu(CPUState *cpu) exit(-1); } =20 - cpu->hax_vcpu =3D hax_global.vm->vcpus[cpu->cpu_index]; + cpu->accel_vcpu =3D hax_global.vm->vcpus[cpu->cpu_index]; cpu->vcpu_dirty =3D true; qemu_register_reset(hax_reset_vcpu_state, (CPUArchState *) (cpu->env_p= tr)); =20 @@ -265,7 +265,7 @@ struct hax_vm *hax_vm_create(struct hax_state *hax, int= max_cpus) } =20 vm->numvcpus =3D max_cpus; - vm->vcpus =3D g_new0(struct hax_vcpu_state *, vm->numvcpus); + vm->vcpus =3D g_new0(hax_vcpu_state *, vm->numvcpus); for (i =3D 0; i < vm->numvcpus; i++) { vm->vcpus[i] =3D NULL; } @@ -414,7 +414,7 @@ static int hax_handle_io(CPUArchState *env, uint32_t df= , uint16_t port, static int hax_vcpu_interrupt(CPUArchState *env) { CPUState *cpu =3D env_cpu(env); - struct hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->hax_vcpu; struct hax_tunnel *ht =3D vcpu->tunnel; =20 /* @@ -446,7 +446,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) =20 void hax_raise_event(CPUState *cpu) { - struct hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->hax_vcpu; =20 if (!vcpu) { return; @@ -467,7 +467,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) int ret =3D 0; CPUState *cpu =3D env_cpu(env); X86CPU *x86_cpu =3D X86_CPU(cpu); - struct hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->hax_vcpu; struct hax_tunnel *ht =3D vcpu->tunnel; =20 if (!hax_enabled()) { diff --git a/target/i386/hax/hax-posix.c b/target/i386/hax/hax-posix.c index ac1a51096eb..8ee247845b7 100644 --- a/target/i386/hax/hax-posix.c +++ b/target/i386/hax/hax-posix.c @@ -205,7 +205,7 @@ hax_fd hax_host_open_vcpu(int vmid, int vcpuid) return fd; } =20 -int hax_host_setup_vcpu_channel(struct hax_vcpu_state *vcpu) +int hax_host_setup_vcpu_channel(hax_vcpu_state *vcpu) { int ret; struct hax_tunnel_info info; @@ -227,7 +227,7 @@ int hax_host_setup_vcpu_channel(struct hax_vcpu_state *= vcpu) return 0; } =20 -int hax_vcpu_run(struct hax_vcpu_state *vcpu) +int hax_vcpu_run(hax_vcpu_state *vcpu) { return ioctl(vcpu->fd, HAX_VCPU_IOCTL_RUN, NULL); } diff --git a/target/i386/hax/hax-windows.c b/target/i386/hax/hax-windows.c index 59afa213a6d..08ec93a256c 100644 --- a/target/i386/hax/hax-windows.c +++ b/target/i386/hax/hax-windows.c @@ -301,7 +301,7 @@ hax_fd hax_host_open_vcpu(int vmid, int vcpuid) return hDeviceVCPU; } =20 -int hax_host_setup_vcpu_channel(struct hax_vcpu_state *vcpu) +int hax_host_setup_vcpu_channel(hax_vcpu_state *vcpu) { hax_fd hDeviceVCPU =3D vcpu->fd; int ret; @@ -327,7 +327,7 @@ int hax_host_setup_vcpu_channel(struct hax_vcpu_state *= vcpu) return 0; } =20 -int hax_vcpu_run(struct hax_vcpu_state *vcpu) +int hax_vcpu_run(hax_vcpu_state *vcpu) { int ret; HANDLE hDeviceVCPU =3D vcpu->fd; --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795817; cv=none; d=zohomail.com; s=zohoarc; b=fxXfdmI/bPTB+/zgfpZjukHaJ3tb+dNQ6QRSUwq5K4Eu1y8MfcWrcVwjxL9CLF1aYp59uxHFGpL91c0sSMRw4D+4YoKM6ZOgZqhg7OnclY+dCy8S9Ju+Pi7pmGbQmErwO/9IGaBA09DggASMpHDQJfGDyPo6d0drgQ/lgHn1Gnc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795817; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=QekL+lZ5BnBNsP996/ujwa8S4r0MydEApZGppEXSzVI=; b=juxmHHxXgqA+bQRrFmB4Q2ccNSGD2Nb9xzgBaMQN9hJDS7BwvHW2sbC6Egi3eEBwjGB0T0IoU0xbSkJw3iQzXREkMSffq+8inuwvDHcS0E0QpPe2Pbj+gZl8zCQo2wk7t70zrHVfZyKaT+6J11siLqcVVH/ywOS6oOr2UqIinNM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795817309437.8887505068683; Wed, 3 Mar 2021 10:23:37 -0800 (PST) Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-599-bvrrNVUMMUm3AElHqFqgow-1; Wed, 03 Mar 2021 13:23:34 -0500 Received: by mail-wr1-f72.google.com with SMTP id r12so9089010wro.15 for ; Wed, 03 Mar 2021 10:23:34 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id 1sm6435516wmj.2.2021.03.03.10.23.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795816; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QekL+lZ5BnBNsP996/ujwa8S4r0MydEApZGppEXSzVI=; b=NWteHce6p78xm8nGu+MudIDn63yYVEvJM5arE+p9LNpNn226/AwQ0NnBhMHzRT+KJNfNNN DTgx24YOW1EkBPeCHemixsA3Dvu0CVDjEgREO2LiujKKwueckHwGrW86fR4Lgxgdj2RYAg rMrJ2ecrbLpNJPSNTg7edc1o4VFg7Ds= X-MC-Unique: bvrrNVUMMUm3AElHqFqgow-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QekL+lZ5BnBNsP996/ujwa8S4r0MydEApZGppEXSzVI=; b=kuXwBCBSbo/XOqzKyDo9N9FRx3qysfXbBY3QCVcnVTCEbhdkrmE12IwCy+7W6GXNWJ O/CiR3N3p229Geki+rxC27dYLFnP+HfANh/wGnuAxtc17+lbL8sPfjj83WGn/6EBPHq+ aG/+OX+w/AXAmoRFEQZzE7oC4GiEhD2fzZnGlY+pvSX84JDmkV7E+iLRyQ3715h8fqa7 WZO+W2J+yjxQv1NzWxqKXFpFZc2oNQomzKFrI7D/t+3Lzng2ksgomicM2DzH/vB/JD95 67DLjnvU0h1K8xC6xIgFPnwM+4WxmSSaeLsThwx2j1voroDalVoCFSotHBdV6h6sKrSS E8fw== X-Gm-Message-State: AOAM5320kMFEURenWh+o7+gyXg4tq2ZDMXyyStcl5jir00UZNk0xd4mE W7MKweExvgfMG615+RqBCbQMwyQLRGQ3H3uhs8jsZ+3c6KQMlqsNEItkV6pNdgtrKDSL5CGUmsY ONWTnrDxumy+wTQ== X-Received: by 2002:a05:6000:18a:: with SMTP id p10mr24162wrx.166.1614795813577; Wed, 03 Mar 2021 10:23:33 -0800 (PST) X-Google-Smtp-Source: ABdhPJygnk/F+pfVCMu6jAojHIo6THJyDiFCiZ/rv0+FX+yhcbewuYsSOKLGoO8+tY/jOc1YMyvUIQ== X-Received: by 2002:a05:6000:18a:: with SMTP id p10mr24137wrx.166.1614795813286; Wed, 03 Mar 2021 10:23:33 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 10/19] accel/hax: Use 'accel_vcpu' generic pointer Date: Wed, 3 Mar 2021 19:22:10 +0100 Message-Id: <20210303182219.1631042-11-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Use the 'accel_vcpu' field which is meant for accelerators. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 3 --- target/i386/hax/hax-i386.h | 4 ++-- target/i386/hax/hax-all.c | 14 +++++++------- 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d807645af2b..65ff8d86dbc 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -244,8 +244,6 @@ typedef struct SavedIOTLB { struct KVMState; struct kvm_run; =20 -struct hax_vcpu_state; - #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) =20 @@ -421,7 +419,6 @@ struct CPUState { int kvm_fd; struct KVMState *kvm_state; struct kvm_run *kvm_run; - struct hax_vcpu_state *hax_vcpu; int hvf_fd; /* shared by kvm, hax and hvf */ bool vcpu_dirty; diff --git a/target/i386/hax/hax-i386.h b/target/i386/hax/hax-i386.h index ee77406a6a6..61ff0d84f2b 100644 --- a/target/i386/hax/hax-i386.h +++ b/target/i386/hax/hax-i386.h @@ -26,8 +26,8 @@ typedef HANDLE hax_fd; =20 extern struct hax_state hax_global; =20 -typedef struct hax_vcpu_state hax_vcpu_state; -struct hax_vcpu_state { +typedef struct AccelvCPUState hax_vcpu_state; +struct AccelvCPUState { hax_fd fd; int vcpu_id; struct hax_tunnel *tunnel; diff --git a/target/i386/hax/hax-all.c b/target/i386/hax/hax-all.c index 08c2b60b437..ce671760e64 100644 --- a/target/i386/hax/hax-all.c +++ b/target/i386/hax/hax-all.c @@ -68,7 +68,7 @@ int valid_hax_tunnel_size(uint16_t size) =20 hax_fd hax_vcpu_get_fd(CPUArchState *env) { - hax_vcpu_state *vcpu =3D env_cpu(env)->hax_vcpu; + hax_vcpu_state *vcpu =3D env_cpu(env)->accel_vcpu; if (!vcpu) { return HAX_INVALID_FD; } @@ -194,7 +194,7 @@ int hax_vcpu_create(int id) =20 int hax_vcpu_destroy(CPUState *cpu) { - hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->accel_vcpu; =20 if (!hax_global.vm) { fprintf(stderr, "vcpu %x destroy failed, vm is null\n", vcpu->vcpu= _id); @@ -414,7 +414,7 @@ static int hax_handle_io(CPUArchState *env, uint32_t df= , uint16_t port, static int hax_vcpu_interrupt(CPUArchState *env) { CPUState *cpu =3D env_cpu(env); - hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->accel_vcpu; struct hax_tunnel *ht =3D vcpu->tunnel; =20 /* @@ -446,7 +446,7 @@ static int hax_vcpu_interrupt(CPUArchState *env) =20 void hax_raise_event(CPUState *cpu) { - hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->accel_vcpu; =20 if (!vcpu) { return; @@ -467,7 +467,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) int ret =3D 0; CPUState *cpu =3D env_cpu(env); X86CPU *x86_cpu =3D X86_CPU(cpu); - hax_vcpu_state *vcpu =3D cpu->hax_vcpu; + hax_vcpu_state *vcpu =3D cpu->accel_vcpu; struct hax_tunnel *ht =3D vcpu->tunnel; =20 if (!hax_enabled()) { @@ -1113,8 +1113,8 @@ void hax_reset_vcpu_state(void *opaque) { CPUState *cpu; for (cpu =3D first_cpu; cpu !=3D NULL; cpu =3D CPU_NEXT(cpu)) { - cpu->hax_vcpu->tunnel->user_event_pending =3D 0; - cpu->hax_vcpu->tunnel->ready_for_interrupt_injection =3D 0; + cpu->accel_vcpu->tunnel->user_event_pending =3D 0; + cpu->accel_vcpu->tunnel->ready_for_interrupt_injection =3D 0; } } =20 --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795822; cv=none; d=zohomail.com; s=zohoarc; b=Du1GtTqshhao3mnLaXkEnFSd7Sn3XOJQezERG9rHWZr+Bld45UxRSbJUPBHwUI0WwPR7ry7ZK2BVRFyHtF3FXDonKvqRWT+SMEPjsUZK+VQVs7OfuaOY7shFX73EjqeJw1ZcBFoEOy7Gpa+zC0De8nOkIPaWF0ElllhRSonyyZQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795822; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=79DgZpr2EmNkKjevsnbnnQniykZdHifg2JouUZY5E8w=; b=Omar0Zw0/+Hsi9nOyf3zmx0M5axVx+vyk3QTK3GzSjX6/7QwapDZj3ZS6dEP5pb6EIZJ5bvdZnaWiZIK6o/2MZhVWrfWW7q0kwcO7hjlw3/riRUwfvAUVsKa/1ztDtqWXUZMoFBrszVhrvcNrNZW5/igwDzQLXNSXjZjQ4M16B0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1614795822883244.09968595796533; Wed, 3 Mar 2021 10:23:42 -0800 (PST) Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-282-l6Z1vn4LNWC-R1JEGh3hlw-1; Wed, 03 Mar 2021 13:23:40 -0500 Received: by mail-wr1-f72.google.com with SMTP id v1so2635428wru.7 for ; Wed, 03 Mar 2021 10:23:39 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id t14sm34525097wru.64.2021.03.03.10.23.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795821; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=79DgZpr2EmNkKjevsnbnnQniykZdHifg2JouUZY5E8w=; b=RMIThd85MBEpUEDRMa6C3BXWNXPRonEBX3aItDd99DjeoO2y6JHgN3FCWIvFZRt4eK+cL7 CAzhH2xzu6ckTpfdQRgAyeh0b/hxkjzHgTV0xhFXHdck+RPONUGnXkFIoZKVzjnd0vkith bXHIuIhGeROX7QgRfoK+SUhwdDWMo4k= X-MC-Unique: l6Z1vn4LNWC-R1JEGh3hlw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=79DgZpr2EmNkKjevsnbnnQniykZdHifg2JouUZY5E8w=; b=iD2FAzIMMswKnUIA71qS2HKvPi5hUnZYPb2t5cCpSouBrVNyKQGbTquyycaZ7Qc0X7 SAVMWBsOjn0rVImaCo20nicTgE5pCciku1BPbdzzc6qw874ugwdznixuDjLWUrzbp7li 9uIclapU2VpNSQUU28kzNefnnWoGEZWfNhadbw2+mOWru8HbP6lW1pRpYkttRAm36wfm 8wKwkrVXSuZ1esOWsv5xXX8TFxKaYI7UJHUHxz5X6ZdQr/gUBy4klHz2w2DBO2jhFn1o xLtgTdZR5o1x0p4a5v3mf7vGajcE/5rPeHSj4KL4AI5miIoictVV1Cb04wN1wIyEIR83 +XYw== X-Gm-Message-State: AOAM533z5OuikFP5EoPeVCo6F4/vcnrAmbh63wwEZ8X3k+1FOTZuijzL Mlk1ya6gc/xYBloGA4SaFhsBvIyqanLPKJS+RMsgz1vXOIXOKFutwICZnjC9lfeF5X8lQfIW1vd uGHA5ZbZ3qIxT4g== X-Received: by 2002:a7b:c407:: with SMTP id k7mr292582wmi.136.1614795819009; Wed, 03 Mar 2021 10:23:39 -0800 (PST) X-Google-Smtp-Source: ABdhPJz2ZZPhH9pI1ojwAdx3yz1Bw2buB6+u4yZQIHTFUxGfLpDaJfYOKtQLkaZHng2glOOMTYruTw== X-Received: by 2002:a7b:c407:: with SMTP id k7mr292558wmi.136.1614795818843; Wed, 03 Mar 2021 10:23:38 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 11/19] accel/kvm: Introduce kvm_vcpu_state() helper Date: Wed, 3 Mar 2021 19:22:11 +0100 Message-Id: <20210303182219.1631042-12-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/sysemu/kvm.h | 2 ++ accel/kvm/kvm-all.c | 5 +++++ target/i386/cpu.c | 4 ++-- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 687c598be9b..f339be31d1b 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -361,6 +361,8 @@ int kvm_arch_init_vcpu(CPUState *cpu); int kvm_arch_destroy_vcpu(CPUState *cpu); =20 bool kvm_vcpu_id_is_valid(int vcpu_id); +/* Returns a pointer to the KVMState associated with this vCPU */ +KVMState *kvm_vcpu_state(CPUState *cpu); =20 /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ unsigned long kvm_arch_vcpu_id(CPUState *cpu); diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 84c943fcdb2..b787d590a9a 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -1978,6 +1978,11 @@ bool kvm_vcpu_id_is_valid(int vcpu_id) return vcpu_id >=3D 0 && vcpu_id < kvm_max_vcpu_id(s); } =20 +KVMState *kvm_vcpu_state(CPUState *cpu) +{ + return cpu->kvm_state; +} + static int kvm_init(MachineState *ms) { MachineClass *mc =3D MACHINE_GET_CLASS(ms); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6a53446e6a5..0d6376322bb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5755,7 +5755,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, case 0xA: /* Architectural Performance Monitoring Leaf */ if (kvm_enabled() && cpu->enable_pmu) { - KVMState *s =3D cs->kvm_state; + KVMState *s =3D kvm_vcpu_state(cs); =20 *eax =3D kvm_arch_get_supported_cpuid(s, 0xA, count, R_EAX); *ebx =3D kvm_arch_get_supported_cpuid(s, 0xA, count, R_EBX); @@ -6620,7 +6620,7 @@ static void x86_cpu_filter_features(X86CPU *cpu, bool= verbose) =20 if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) && kvm_enabled()) { - KVMState *s =3D CPU(cpu)->kvm_state; + KVMState *s =3D kvm_vcpu_state(CPU(cpu)); uint32_t eax_0 =3D kvm_arch_get_supported_cpuid(s, 0x14, 0, R_EAX); uint32_t ebx_0 =3D kvm_arch_get_supported_cpuid(s, 0x14, 0, R_EBX); uint32_t ecx_0 =3D kvm_arch_get_supported_cpuid(s, 0x14, 0, R_ECX); --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795830; cv=none; d=zohomail.com; s=zohoarc; b=IiRvSAChr4p++MPUTf3zj7YySMA14cw+/VgfzwqnOhuw5AwcArrHchOYICB/a14QeK/pUcXyM8J6b3m6iJxru1v+Fi5ucBVRu0l9j1/3N7O9Ml71TXiBTQXiwUht1VAIeazJPzhYs0BCrufb13kgG+gdNuknjJmQEEEPgFCbpM0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795830; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=EXx5h3VcKt3jyYHreeQ9XypRywwHhdUIoUdDoXKimZQ=; b=nl29EP2QCrgaizhr3XOC36JCeaYxzrKWMG8ZZOtgx9RpxCQpaanudTUyxGVT+9zHXS6C95w4d/AYH/xR3WXMtbFV9NZDjiyzTn/CkSn6YOn3J5EqBDbWOMPgHOpIdYo/3WccOxizVzisf9iZsrqByFuYDkKuOpghvGE3GshGI7M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795830339138.95640409682983; Wed, 3 Mar 2021 10:23:50 -0800 (PST) Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-199-1rx2A926NHybKsGR95FilA-1; Wed, 03 Mar 2021 13:23:45 -0500 Received: by mail-wr1-f72.google.com with SMTP id v1so2635576wru.7 for ; Wed, 03 Mar 2021 10:23:45 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id s11sm6902297wme.22.2021.03.03.10.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795829; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EXx5h3VcKt3jyYHreeQ9XypRywwHhdUIoUdDoXKimZQ=; b=SUXqcLYkNbagXQmqhrevCGVDlfbv1VUdVtZQii7+2FeuhosQyEZ8BnuCcMMc+vbj5wuuJg HEZrJbooSvi19mCqt9RKhXSAv3SZt0IlEUi1T2RBBMTQ63QGMCGyYKdsxFECOvxMM3Hud3 mVcG/v90PCwHHgL4yZohnNgDDmWGUOo= X-MC-Unique: 1rx2A926NHybKsGR95FilA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EXx5h3VcKt3jyYHreeQ9XypRywwHhdUIoUdDoXKimZQ=; b=MpmL0vLFEeZ1Xch7K1Qc6q/NVSaKHrmbM/J/5y1sgRhL4eNR3JijU8UcHTZblP2SOx HmMETGkPmZGkVe+AykaC8pWQqZeaxjEw9CUB3YS7nBFBUKn/y7cQInO9vKj7upHDcbFO DWa1NzMKGj2XUyfLDcQKBlG86Cn9d32UD5kAHcF1GwPb0StWhnyp+RFuDVKfqqCHVHnp ZbWbSGKUIO1VxTdPpivVuVmuAAlbi4oGnd/GH/n/HvZMtqH5/vxDTI3vqXMHYo2tMgY3 HA3o4YiHnxZE2uVlCiHGp1Q2NUN85i5I907JSQsUNw8nH9DhBLERdyzjHhz9we6oPBce 78tQ== X-Gm-Message-State: AOAM533puIVvLfLZTuuxmDNj41MgxflNgRY6aHT7ZucUtJbghKKyeL8Z agEPh5AFeSThDFJ281el/A2hTWiZh7OdcBSvdXffSTAwCm1NNYc8J4eK+HHGLJfimzPVH3DZTdT pUACXgpvdYv1vnQ== X-Received: by 2002:a5d:4e8d:: with SMTP id e13mr11323835wru.251.1614795824481; Wed, 03 Mar 2021 10:23:44 -0800 (PST) X-Google-Smtp-Source: ABdhPJz5L+10FIf3QeWzSQV6AYajM/q7zSMfTeBTooczz/vv8P1higtN4db/j7T3frNNlnlTxAINCg== X-Received: by 2002:a5d:4e8d:: with SMTP id e13mr11323824wru.251.1614795824304; Wed, 03 Mar 2021 10:23:44 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 12/19] accel/kvm: Use kvm_vcpu_state() when possible Date: Wed, 3 Mar 2021 19:22:12 +0100 Message-Id: <20210303182219.1631042-13-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) In preparation to move the kvm_state field out of CPUState in few commits, replace the CPUState->kvm_state dereference by a call to kvm_vcpu_state(). Patch created mechanically using: $ sed -i 's/cpu->kvm_state/kvm_vcpu_state(cpu)/' \ -i 's/cs->kvm_state/kvm_vcpu_state(cs)/' \ -i 's/c->kvm_state/kvm_vcpu_state(c)/' $(git grep -l kvm_state) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- accel/kvm/kvm-all.c | 10 +++++----- target/arm/kvm.c | 2 +- target/arm/kvm64.c | 12 ++++++------ target/i386/kvm/kvm.c | 34 +++++++++++++++++----------------- target/ppc/kvm.c | 16 ++++++++-------- 5 files changed, 37 insertions(+), 37 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index b787d590a9a..8259e89bbaf 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2760,7 +2760,7 @@ struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUS= tate *cpu, { struct kvm_sw_breakpoint *bp; =20 - QTAILQ_FOREACH(bp, &cpu->kvm_state->kvm_sw_breakpoints, entry) { + QTAILQ_FOREACH(bp, &kvm_vcpu_state(cpu)->kvm_sw_breakpoints, entry) { if (bp->pc =3D=3D pc) { return bp; } @@ -2770,7 +2770,7 @@ struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUS= tate *cpu, =20 int kvm_sw_breakpoints_active(CPUState *cpu) { - return !QTAILQ_EMPTY(&cpu->kvm_state->kvm_sw_breakpoints); + return !QTAILQ_EMPTY(&kvm_vcpu_state(cpu)->kvm_sw_breakpoints); } =20 struct kvm_set_guest_debug_data { @@ -2825,7 +2825,7 @@ int kvm_insert_breakpoint(CPUState *cpu, target_ulong= addr, return err; } =20 - QTAILQ_INSERT_HEAD(&cpu->kvm_state->kvm_sw_breakpoints, bp, entry); + QTAILQ_INSERT_HEAD(&kvm_vcpu_state(cpu)->kvm_sw_breakpoints, bp, e= ntry); } else { err =3D kvm_arch_insert_hw_breakpoint(addr, len, type); if (err) { @@ -2864,7 +2864,7 @@ int kvm_remove_breakpoint(CPUState *cpu, target_ulong= addr, return err; } =20 - QTAILQ_REMOVE(&cpu->kvm_state->kvm_sw_breakpoints, bp, entry); + QTAILQ_REMOVE(&kvm_vcpu_state(cpu)->kvm_sw_breakpoints, bp, entry); g_free(bp); } else { err =3D kvm_arch_remove_hw_breakpoint(addr, len, type); @@ -2885,7 +2885,7 @@ int kvm_remove_breakpoint(CPUState *cpu, target_ulong= addr, void kvm_remove_all_breakpoints(CPUState *cpu) { struct kvm_sw_breakpoint *bp, *next; - KVMState *s =3D cpu->kvm_state; + KVMState *s =3D kvm_vcpu_state(cpu); CPUState *tmpcpu; =20 QTAILQ_FOREACH_SAFE(bp, &s->kvm_sw_breakpoints, entry, next) { diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 00e124c8123..ed7c4e4815c 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -61,7 +61,7 @@ int kvm_arm_vcpu_finalize(CPUState *cs, int feature) =20 void kvm_arm_init_serror_injection(CPUState *cs) { - cap_has_inject_serror_esr =3D kvm_check_extension(cs->kvm_state, + cap_has_inject_serror_esr =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_ARM_INJECT_SERROR_ESR); } =20 diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index dff85f6db94..c15df0cb1b7 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -85,14 +85,14 @@ GArray *hw_breakpoints, *hw_watchpoints; */ static void kvm_arm_init_debug(CPUState *cs) { - have_guest_debug =3D kvm_check_extension(cs->kvm_state, + have_guest_debug =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_SET_GUEST_DEBUG); =20 - max_hw_wps =3D kvm_check_extension(cs->kvm_state, KVM_CAP_GUEST_DEBUG_= HW_WPS); + max_hw_wps =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_GUEST_D= EBUG_HW_WPS); hw_watchpoints =3D g_array_sized_new(true, true, sizeof(HWWatchpoint), max_hw_wps); =20 - max_hw_bps =3D kvm_check_extension(cs->kvm_state, KVM_CAP_GUEST_DEBUG_= HW_BPS); + max_hw_bps =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_GUEST_D= EBUG_HW_BPS); hw_breakpoints =3D g_array_sized_new(true, true, sizeof(HWBreakpoint), max_hw_bps); return; @@ -837,14 +837,14 @@ int kvm_arch_init_vcpu(CPUState *cs) if (cs->start_powered_off) { cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_POWER_OFF; } - if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) { + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_ARM_PSCI_0_2)) { cpu->psci_version =3D 2; cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_PSCI_0_2; } if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { cpu->kvm_init_features[0] |=3D 1 << KVM_ARM_VCPU_EL1_32BIT; } - if (!kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PMU_V3)) { + if (!kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_ARM_PMU_V3)) { cpu->has_pmu =3D false; } if (cpu->has_pmu) { @@ -1411,7 +1411,7 @@ void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, v= oid *addr) object_property_get_bool(obj, "ras", NULL)) { ram_addr =3D qemu_ram_addr_from_host(addr); if (ram_addr !=3D RAM_ADDR_INVALID && - kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)= ) { + kvm_physical_memory_addr_from_host(kvm_vcpu_state(c), addr, &p= addr)) { kvm_hwpoison_page_add(ram_addr); /* * If this is a BUS_MCEERR_AR, we know we have been called diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 0b5755e42b8..b2facf4f7c1 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -583,7 +583,7 @@ void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, voi= d *addr) if ((env->mcg_cap & MCG_SER_P) && addr) { ram_addr =3D qemu_ram_addr_from_host(addr); if (ram_addr !=3D RAM_ADDR_INVALID && - kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)= ) { + kvm_physical_memory_addr_from_host(kvm_vcpu_state(c), addr, &p= addr)) { kvm_hwpoison_page_add(ram_addr); kvm_mce_inject(cpu, paddr, code); =20 @@ -715,7 +715,7 @@ unsigned long kvm_arch_vcpu_id(CPUState *cs) static bool hyperv_enabled(X86CPU *cpu) { CPUState *cs =3D CPU(cpu); - return kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0 && + return kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV) > 0 && ((cpu->hyperv_spinlock_attempts !=3D HYPERV_SPINLOCK_NEVER_NOTIFY)= || cpu->hyperv_features || cpu->hyperv_passthrough); } @@ -747,13 +747,13 @@ static int kvm_arch_set_tsc_khz(CPUState *cs) return 0; } =20 - cur_freq =3D kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ? + cur_freq =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_GET_TSC_K= HZ) ? kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) : -ENOTSUP; =20 /* * If TSC scaling is supported, attempt to set TSC frequency. */ - if (kvm_check_extension(cs->kvm_state, KVM_CAP_TSC_CONTROL)) { + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_TSC_CONTROL)) { set_ioctl =3D true; } =20 @@ -773,9 +773,9 @@ static int kvm_arch_set_tsc_khz(CPUState *cs) /* When KVM_SET_TSC_KHZ fails, it's an error only if the current * TSC frequency doesn't match the one we want. */ - cur_freq =3D kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KH= Z) ? - kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) : - -ENOTSUP; + cur_freq =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_GET_T= SC_KHZ) + ? kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) + : -ENOTSUP; if (cur_freq <=3D 0 || cur_freq !=3D env->tsc_khz) { warn_report("TSC frequency mismatch between " "VM (%" PRId64 " kHz) and host (%d kHz), " @@ -994,7 +994,7 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_legacy= (CPUState *cs) entry_recomm->function =3D HV_CPUID_ENLIGHTMENT_INFO; entry_recomm->ebx =3D cpu->hyperv_spinlock_attempts; =20 - if (kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0) { + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV) > 0) { entry_feat->eax |=3D HV_HYPERCALL_AVAILABLE; entry_feat->eax |=3D HV_APIC_ACCESS_AVAILABLE; entry_feat->edx |=3D HV_CPU_DYNAMIC_PARTITIONING_AVAILABLE; @@ -1002,7 +1002,7 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_lega= cy(CPUState *cs) entry_recomm->eax |=3D HV_APIC_ACCESS_RECOMMENDED; } =20 - if (kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_TIME) > 0) { + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV_TIME) > 0) { entry_feat->eax |=3D HV_TIME_REF_COUNT_AVAILABLE; entry_feat->eax |=3D HV_REFERENCE_TSC_AVAILABLE; } @@ -1036,7 +1036,7 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_lega= cy(CPUState *cs) unsigned int cap =3D cpu->hyperv_synic_kvm_only ? KVM_CAP_HYPERV_SYNIC : KVM_CAP_HYPERV_SYNIC2; =20 - if (kvm_check_extension(cs->kvm_state, cap) > 0) { + if (kvm_check_extension(kvm_vcpu_state(cs), cap) > 0) { entry_feat->eax |=3D HV_SYNIC_AVAILABLE; } } @@ -1045,18 +1045,18 @@ static struct kvm_cpuid2 *get_supported_hv_cpuid_le= gacy(CPUState *cs) entry_feat->eax |=3D HV_SYNTIMERS_AVAILABLE; } =20 - if (kvm_check_extension(cs->kvm_state, + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV_TLBFLUSH) > 0) { entry_recomm->eax |=3D HV_REMOTE_TLB_FLUSH_RECOMMENDED; entry_recomm->eax |=3D HV_EX_PROCESSOR_MASKS_RECOMMENDED; } =20 - if (kvm_check_extension(cs->kvm_state, + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV_ENLIGHTENED_VMCS) > 0) { entry_recomm->eax |=3D HV_ENLIGHTENED_VMCS_RECOMMENDED; } =20 - if (kvm_check_extension(cs->kvm_state, + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV_SEND_IPI) > 0) { entry_recomm->eax |=3D HV_CLUSTER_IPI_RECOMMENDED; entry_recomm->eax |=3D HV_EX_PROCESSOR_MASKS_RECOMMENDED; @@ -1200,7 +1200,7 @@ static int hyperv_handle_properties(CPUState *cs, } } =20 - if (kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_CPUID) > 0) { + if (kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_HYPERV_CPUID) > 0)= { cpuid =3D get_supported_hv_cpuid(cs); } else { cpuid =3D get_supported_hv_cpuid_legacy(cs); @@ -1504,7 +1504,7 @@ int kvm_arch_init_vcpu(CPUState *cs) * so that vcpu's TSC frequency can be migrated later via this field. */ if (!env->tsc_khz) { - r =3D kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ? + r =3D kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_GET_TSC_KHZ)= ? kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) : -ENOTSUP; if (r > 0) { @@ -1746,12 +1746,12 @@ int kvm_arch_init_vcpu(CPUState *cs) if (((env->cpuid_version >> 8)&0xF) >=3D 6 && (env->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) =3D=3D (CPUID_MCE | CPUID_MCA) - && kvm_check_extension(cs->kvm_state, KVM_CAP_MCE) > 0) { + && kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_MCE) > 0) { uint64_t mcg_cap, unsupported_caps; int banks; int ret; =20 - ret =3D kvm_get_mce_cap_supported(cs->kvm_state, &mcg_cap, &banks); + ret =3D kvm_get_mce_cap_supported(kvm_vcpu_state(cs), &mcg_cap, &b= anks); if (ret < 0) { fprintf(stderr, "kvm_get_mce_cap_supported: %s", strerror(-ret= )); return ret; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 298c1f882c6..d9a8f019a74 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -205,7 +205,7 @@ static int kvm_booke206_tlb_init(PowerPCCPU *cpu) int ret, i; =20 if (!kvm_enabled() || - !kvm_check_extension(cs->kvm_state, KVM_CAP_SW_TLB)) { + !kvm_check_extension(kvm_vcpu_state(cs), KVM_CAP_SW_TLB)) { return 0; } =20 @@ -303,7 +303,7 @@ target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, flags |=3D KVM_PPC_MMUV3_GTSE; } cfg.flags =3D flags; - ret =3D kvm_vm_ioctl(cs->kvm_state, KVM_PPC_CONFIGURE_V3_MMU, &cfg); + ret =3D kvm_vm_ioctl(kvm_vcpu_state(cs), KVM_PPC_CONFIGURE_V3_MMU, &cf= g); switch (ret) { case 0: return H_SUCCESS; @@ -483,7 +483,7 @@ int kvm_arch_init_vcpu(CPUState *cs) ret =3D kvm_booke206_tlb_init(cpu); break; case POWERPC_MMU_2_07: - if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) { + if (!cap_htm && !kvmppc_is_pr(kvm_vcpu_state(cs))) { /* * KVM-HV has transactional memory on POWER8 also without * the KVM_CAP_PPC_HTM extension, so enable it here @@ -1947,8 +1947,8 @@ static int kvmppc_get_pvinfo(CPUPPCState *env, struct= kvm_ppc_pvinfo *pvinfo) { CPUState *cs =3D env_cpu(env); =20 - if (kvm_vm_check_extension(cs->kvm_state, KVM_CAP_PPC_GET_PVINFO) && - !kvm_vm_ioctl(cs->kvm_state, KVM_PPC_GET_PVINFO, pvinfo)) { + if (kvm_vm_check_extension(kvm_vcpu_state(cs), KVM_CAP_PPC_GET_PVINFO)= && + !kvm_vm_ioctl(kvm_vcpu_state(cs), KVM_PPC_GET_PVINFO, pvinfo)) { return 0; } =20 @@ -2864,7 +2864,7 @@ int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, target= _ulong flags, int shift) return -ENOSYS; } =20 - return kvm_vm_ioctl(cs->kvm_state, KVM_PPC_RESIZE_HPT_PREPARE, &rhpt); + return kvm_vm_ioctl(kvm_vcpu_state(cs), KVM_PPC_RESIZE_HPT_PREPARE, &r= hpt); } =20 int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shif= t) @@ -2879,7 +2879,7 @@ int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_= ulong flags, int shift) return -ENOSYS; } =20 - return kvm_vm_ioctl(cs->kvm_state, KVM_PPC_RESIZE_HPT_COMMIT, &rhpt); + return kvm_vm_ioctl(kvm_vcpu_state(cs), KVM_PPC_RESIZE_HPT_COMMIT, &rh= pt); } =20 /* @@ -2909,7 +2909,7 @@ bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu) return false; } =20 - return !kvmppc_is_pr(cs->kvm_state); + return !kvmppc_is_pr(kvm_vcpu_state(cs)); } =20 void kvmppc_set_reg_ppc_online(PowerPCCPU *cpu, unsigned int online) --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795833; cv=none; d=zohomail.com; s=zohoarc; b=lr/Nxg5ONmnsCZeFfQUUdCtUGg+YzsibrDMV84cl6lFwS6z6Lhe4nj8tLqXGBznkYac68nTv2kfaBvs11E/3zn/1HaTfZbcyv6t0VDvbZXqsz/lmSeNSdk/8qUSVVMYlfLGpjkZDBbxzVVHQ72hrDx9fqpmaiyjD07K5F5HXbOc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795833; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=HpZXUiaC2c4IcwOvA2cs846pRcaPAAbCPhPXUPapPlg=; b=Fophld1RedlVdbYgQXnOR2aVPsv7KazKbity6ZBohGSNniDzZFB2NQxto3q3qoT8HzSs8wuqGJjXcuDmEd7bqLhzCM2Mrhk+1W2PfzJUg/TDcy1D/ol1gfPO14AP5WtYq8zB80/3gGB6/aLamZyN5vuTNkA0c4KxgYEnHHtzVgs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795833667171.51214049894577; Wed, 3 Mar 2021 10:23:53 -0800 (PST) Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-525-qNQUWfjHPMKFtafRN3iiLg-1; Wed, 03 Mar 2021 13:23:51 -0500 Received: by mail-wr1-f72.google.com with SMTP id e13so13134502wrg.4 for ; Wed, 03 Mar 2021 10:23:50 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id p14sm6718722wmc.30.2021.03.03.10.23.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795832; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HpZXUiaC2c4IcwOvA2cs846pRcaPAAbCPhPXUPapPlg=; b=hSJg74FqOG1CbtNJiNt0LNxqLkrhLpC+SQOYVi6ipfSA6v9tmS3L5QZvGmmi1BRdSTcnmv Z+iE7wRNglIO5wbUVVJye0dgKsCCE565lCPjLxkMs9KoLeR9TrKf8TO2Hsnp90HW/vs3i1 BvJBEuWd+wnpkEFnvzGuTr32TqGQtMo= X-MC-Unique: qNQUWfjHPMKFtafRN3iiLg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HpZXUiaC2c4IcwOvA2cs846pRcaPAAbCPhPXUPapPlg=; b=HcQHnVlZ3/mLEjhzJIQHuLtkv8ZXaxIEKHbTUg9PQwANXSKNoHII5BIl4yu/Ws18EN sjHJQEjXNXLLDR0f9Ulz46k0HOktEpIvq5PX8Xj6+CQ4SFN4TkzBkkY8nf8CpX4uKMrv n9LY4hwWI5sx4xAfQJovImHvHmDRcr3vYjk2pjSeSmJjTQHWJjQutrM05QvnbLNG/2QV PeiBlHtHg8S8WDXefkSwOIEmZIyiBBzDj2v++UE7D9ZJx4Mu4LMAig9uDe0Nj4rML0Vx 0k9Y32kU9m4i21tSXbygLrQUYXn4LUG9vkHLGaYVL70wWAroAyiNgFSCF2ebHdEBj4rh JqVQ== X-Gm-Message-State: AOAM5334q1vaN+urcI77kzS/nVOYkplZMYQfCFRQmxgX52jUG9c6y2zO 2ukpXmnsSKDAiGwxpHK9dqLzxgdQSD3vu9VGp40B9xq5YgL5tF0nRF4GLxh4NK/2evpWnpO9qyY OIwW8ZB8eHcdMsg== X-Received: by 2002:adf:9bd7:: with SMTP id e23mr38412wrc.48.1614795829845; Wed, 03 Mar 2021 10:23:49 -0800 (PST) X-Google-Smtp-Source: ABdhPJx5Hi2oRgLR+p5+nLOhzpKyBoO9bwdj0rvSDTYuP5mfCGdgF+ImQznX99ey9HDtd42t6mXMIw== X-Received: by 2002:adf:9bd7:: with SMTP id e23mr38385wrc.48.1614795829618; Wed, 03 Mar 2021 10:23:49 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 13/19] accel/kvm: Declare and allocate AccelvCPUState struct Date: Wed, 3 Mar 2021 19:22:13 +0100 Message-Id: <20210303182219.1631042-14-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) In preparation of moving KVM-specific fields from CPUState to the accelerator-specific AccelvCPUState structure, first declare it empty and allocate it. This will make the following commits easier to review. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/sysemu/kvm_int.h | 3 +++ accel/kvm/kvm-all.c | 5 +++++ target/s390x/kvm.c | 2 +- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index ccb8869f01b..f57be10adde 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -13,6 +13,9 @@ #include "qemu/accel.h" #include "sysemu/kvm.h" =20 +struct AccelvCPUState { +}; + typedef struct KVMSlot { hwaddr start_addr; diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 8259e89bbaf..4ccd12ea56a 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -399,6 +399,7 @@ void kvm_destroy_vcpu(CPUState *cpu) error_report("kvm_destroy_vcpu failed"); exit(EXIT_FAILURE); } + g_free(cpu->accel_vcpu); } =20 static int kvm_get_vcpu(KVMState *s, unsigned long vcpu_id) @@ -434,6 +435,7 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) goto err; } =20 + cpu->accel_vcpu =3D g_new(struct AccelvCPUState, 1); cpu->kvm_fd =3D ret; cpu->kvm_state =3D s; cpu->vcpu_dirty =3D true; @@ -468,6 +470,9 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) kvm_arch_vcpu_id(cpu)); } err: + if (ret < 0) { + g_free(cpu->accel_vcpu); + } return ret; } =20 diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index d8ac12dfc11..cf6790b2678 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -2085,7 +2085,7 @@ int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_= state) int ret; =20 /* the kvm part might not have been initialized yet */ - if (CPU(cpu)->kvm_state =3D=3D NULL) { + if (CPU(cpu)->accel_vcpu =3D=3D NULL) { return 0; } =20 --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795841; cv=none; d=zohomail.com; s=zohoarc; b=MwMhz9zTS8xVOh34uS4iYwGklGsGf/Kr+MVYltOKAgaJNDFOUa5D2TJPy6hxPhde8Im5y5mSdO6R2dhzlzJcybmEu4QEop83AcOd9sw4wAk7iUDyS7PGg04rAfZ7A1AU484wSaKmS2SJtB8IJe7QBtRV1DMyhsqQd9Tqgs9wi4A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795841; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=jSFJR2T0y61cEAykVjSlmIgXEHeIk/fhpqbk5zPRC7k=; b=P4dCgGRz9WtdBO7h8oXZWhQPMHab79WlMF+JaOxRq9NTN1VpqLdOOCh8y370TnalkPtd3KEOInVR/XjpSR67HOSP+1UVDa5TMhAXrYArr5ZRfwDfnv9WODJjkTnzUfQEgk0mwyg62jYH6ribyI5c55Wr7HZSrKQHmBo/YLykfG8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795841270388.45936882386354; Wed, 3 Mar 2021 10:24:01 -0800 (PST) Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-307-jUAQSdi3PJ2RHZwCE7llKg-1; Wed, 03 Mar 2021 13:23:56 -0500 Received: by mail-wr1-f70.google.com with SMTP id 75so817462wrl.3 for ; Wed, 03 Mar 2021 10:23:56 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id l15sm6604958wme.43.2021.03.03.10.23.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:23:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795840; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jSFJR2T0y61cEAykVjSlmIgXEHeIk/fhpqbk5zPRC7k=; b=gX7hae0anrTdXgTNqPq5aFnEKQlf62qJRRK7nuAGjbjvN89lnY/tKJrwY6LT9/mJsnSD4Z lwASpg4upTwkTinnbYCzJlcnagpJ3ApV05r0CK+zjLUbbI0S4IQk5tCLTr9ohV6WU0CmFl rWsCwLEMn9tEQF/WTX+DFbo0Lru/akI= X-MC-Unique: jUAQSdi3PJ2RHZwCE7llKg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jSFJR2T0y61cEAykVjSlmIgXEHeIk/fhpqbk5zPRC7k=; b=qNPbhwCm4XqCKfaFUDQ7kjV6PRkl2r+Q95+sRkHfBuaus9UT+mH/Yd36jlN0VAViwe rKC37vTzYXqi1xG2koxtYlwV47wGOz/ZhqGAovDPXWg+FlqaVIK4nzN7NOFpHtsa/7rC MmIMHv+CE7Qq3739biFNd2G4eqpXdJ2dKTpJhGu4wkehO8BY4MaiYWtNIXivCIVum1Yk ck0LCowQmUPqzy5J9aveFz3JZoiWtX1jOetpcLGSnf4B3CZfE1XR59Blo0lVgAcTuqfx fKkRIHTRxdxvEJK9bq3fAojpwbmIn3+uT1KieDicC8/aB0RW66WxGwB9KLnta8cSaGie eQkA== X-Gm-Message-State: AOAM530E8JOu1EKOU9QkdPqQKnzOQHehFPIVrB7CdSZZrWzeJ8KjcX8w DxDHpLw9vyx3rDJ0qeKtROhRGuI7KHVVx7MFCcd6vVVrQdytz5CrkPqKEiwLgvkOZjebETFdsm6 63Z+qRfLOcKXg1Q== X-Received: by 2002:adf:f941:: with SMTP id q1mr29310610wrr.189.1614795835227; Wed, 03 Mar 2021 10:23:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJz+U5MnteFFnH0DvjeZoCaADZkKnu3iy+W7Ik0whDtmDP3G8okupBtGMb7OSZvJC7sHUOE4eg== X-Received: by 2002:adf:f941:: with SMTP id q1mr29310594wrr.189.1614795835090; Wed, 03 Mar 2021 10:23:55 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 14/19] accel/kvm: Move the 'kvm_fd' field to AccelvCPUState Date: Wed, 3 Mar 2021 19:22:14 +0100 Message-Id: <20210303182219.1631042-15-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 2 -- include/sysemu/kvm_int.h | 4 ++++ accel/kvm/kvm-all.c | 8 ++++---- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 65ff8d86dbc..ca2526e6a23 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -314,7 +314,6 @@ struct AccelvCPUState; * @opaque: User data. * @mem_io_pc: Host Program Counter at which the memory was accessed. * @accel_vcpu: Pointer to accelerator-specific AccelvCPUState field. - * @kvm_fd: vCPU file descriptor for KVM. * @work_mutex: Lock to prevent multiple access to @work_list. * @work_list: List of pending asynchronous work. * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all ch= anges @@ -416,7 +415,6 @@ struct CPUState { =20 /* Accelerator-specific fields. */ struct AccelvCPUState *accel_vcpu; - int kvm_fd; struct KVMState *kvm_state; struct kvm_run *kvm_run; int hvf_fd; diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index f57be10adde..3bf75e62293 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -14,6 +14,10 @@ #include "sysemu/kvm.h" =20 struct AccelvCPUState { + /** + * @kvm_fd: vCPU file descriptor for KVM + */ + int kvm_fd; }; =20 typedef struct KVMSlot diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 4ccd12ea56a..1c08ff3fbe0 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -387,7 +387,7 @@ static int do_kvm_destroy_vcpu(CPUState *cpu) =20 vcpu =3D g_malloc0(sizeof(*vcpu)); vcpu->vcpu_id =3D kvm_arch_vcpu_id(cpu); - vcpu->kvm_fd =3D cpu->kvm_fd; + vcpu->kvm_fd =3D cpu->accel_vcpu->kvm_fd; QLIST_INSERT_HEAD(&kvm_state->kvm_parked_vcpus, vcpu, node); err: return ret; @@ -436,7 +436,7 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) } =20 cpu->accel_vcpu =3D g_new(struct AccelvCPUState, 1); - cpu->kvm_fd =3D ret; + cpu->accel_vcpu->kvm_fd =3D ret; cpu->kvm_state =3D s; cpu->vcpu_dirty =3D true; =20 @@ -449,7 +449,7 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) } =20 cpu->kvm_run =3D mmap(NULL, mmap_size, PROT_READ | PROT_WRITE, MAP_SHA= RED, - cpu->kvm_fd, 0); + cpu->accel_vcpu->kvm_fd, 0); if (cpu->kvm_run =3D=3D MAP_FAILED) { ret =3D -errno; error_setg_errno(errp, ret, @@ -2631,7 +2631,7 @@ int kvm_vcpu_ioctl(CPUState *cpu, int type, ...) va_end(ap); =20 trace_kvm_vcpu_ioctl(cpu->cpu_index, type, arg); - ret =3D ioctl(cpu->kvm_fd, type, arg); + ret =3D ioctl(cpu->accel_vcpu->kvm_fd, type, arg); if (ret =3D=3D -1) { ret =3D -errno; } --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795847; cv=none; d=zohomail.com; s=zohoarc; b=EFPn7XxOHJN0WwM2HAmvrSAUR/cyqAvt2UaGaeDnneUISRWRrubnkfbNHLgEa0uLce/Q9VbngYIWl7YA07mAmfYy2EuQAtHuKNbViMl4UZnNOmbwgZaRkOY0ytVpkJgvnFnV+aONjAERgWU75j9EU50xkGngp/iN6Dqz7+2iHcU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795847; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=M4K8ZUs7Kh4DBTFlI/pvongtlyoWjFjhXN1UWmJlGpA=; b=YQaNXC3hMwUTeoUpxBtnAmI76vocnu9OKO1CHuJuzv3cQ57uO613fkK8Hk20BzXh0FAKeIBNmbfG2AjPz5xV+XbSNRQ64v1tUi/5I5YUwPs5oHodL50BKJZVHSXwEP3z1QW2PHGvHIeCYT2TiPM/RD2U95m46uvnQR1IoHc3OkQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795847955163.98700520458056; Wed, 3 Mar 2021 10:24:07 -0800 (PST) Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-395-2ihyDVLMMj2tq7u_u1CTTA-1; Wed, 03 Mar 2021 13:24:02 -0500 Received: by mail-wr1-f70.google.com with SMTP id r12so9089736wro.15 for ; Wed, 03 Mar 2021 10:24:02 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id t14sm34525941wru.64.2021.03.03.10.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:24:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795847; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=M4K8ZUs7Kh4DBTFlI/pvongtlyoWjFjhXN1UWmJlGpA=; b=KkfkvbdyEtrfoRIFdr/qip6n6Z5VGQuiJCNWDUV16uSz1MY549R2h8avQwsrq23YTBZgMg GWFctVJ5S2+R/fEDBTE6frGRPO3sgAPFNqxYt+3K6KWyCnAkFU4Y07qzklMLcX6O4K4xdo k2XLJLYOV4xClSxiGbm9x4u1L3oeo1U= X-MC-Unique: 2ihyDVLMMj2tq7u_u1CTTA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M4K8ZUs7Kh4DBTFlI/pvongtlyoWjFjhXN1UWmJlGpA=; b=oO/mw8b7fZTqdjuPb73FVKMb8/s12Au04UwfO5OPVgQPNtEMz01Qpkt9d3aOZzt/7e HE7+/v6RIW4ACsi0HSvaxvh25sqHFHK0xTDD2C7YNWyIP8nwulqp9x6tBtYKL4Q9tc/B bEnq2LbrGH3LoHUnuy/E47k+4PFBCXLm92Kr03dGKXEBwiYbWLDSokby80Jdf4olA/rk m8++trC+5ySZCIUCS3W1BakhKR2FG7+HvQaoRtp/on03saMNDbvVNeNJaLHo3gexrdbI UPkCQMi1zjsWZNsmv2TQKpxWkAMUbTZ5GVHZL0CPyhuP9NmhqO2PsVd6yX5agMzu9H77 R2mQ== X-Gm-Message-State: AOAM530VcB+MfdLpvZKOrAz/TI9hix1Tk14/W+R13VbTwDd8ycx2OF6W ckQ69HGuW2b8tCimDB4XiULMHZuGoR6idVG4Lk4Qqfi11QrHEnqT0YgQxJmYdfjMvQaUfjL3klX 5n3r+rePh9ZuB7A== X-Received: by 2002:a1c:2049:: with SMTP id g70mr261150wmg.7.1614795841714; Wed, 03 Mar 2021 10:24:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJxKNSRqR8zLkOnVmlcq5ZuBoN3wSOkgPWh5iTNFfiCeOZ6YvIytWpn9Bxp5s21C1pEsD2GscQ== X-Received: by 2002:a1c:2049:: with SMTP id g70mr261066wmg.7.1614795840433; Wed, 03 Mar 2021 10:24:00 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 15/19] accel/kvm: Move the 'kvm_state' field to AccelvCPUState Date: Wed, 3 Mar 2021 19:22:15 +0100 Message-Id: <20210303182219.1631042-16-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 1 - include/sysemu/kvm_int.h | 1 + accel/kvm/kvm-all.c | 4 ++-- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index ca2526e6a23..4f280509f9b 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -415,7 +415,6 @@ struct CPUState { =20 /* Accelerator-specific fields. */ struct AccelvCPUState *accel_vcpu; - struct KVMState *kvm_state; struct kvm_run *kvm_run; int hvf_fd; /* shared by kvm, hax and hvf */ diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index 3bf75e62293..dc45b3c3afa 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -18,6 +18,7 @@ struct AccelvCPUState { * @kvm_fd: vCPU file descriptor for KVM */ int kvm_fd; + struct KVMState *kvm_state; }; =20 typedef struct KVMSlot diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 1c08ff3fbe0..737db3d3e0e 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -437,7 +437,7 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) =20 cpu->accel_vcpu =3D g_new(struct AccelvCPUState, 1); cpu->accel_vcpu->kvm_fd =3D ret; - cpu->kvm_state =3D s; + cpu->accel_vcpu->kvm_state =3D s; cpu->vcpu_dirty =3D true; =20 mmap_size =3D kvm_ioctl(s, KVM_GET_VCPU_MMAP_SIZE, 0); @@ -1985,7 +1985,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id) =20 KVMState *kvm_vcpu_state(CPUState *cpu) { - return cpu->kvm_state; + return cpu->accel_vcpu->kvm_state; } =20 static int kvm_init(MachineState *ms) --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795851; cv=none; d=zohomail.com; s=zohoarc; b=J/VFSd+z/4/MIQjLVkW3wtKJRAGBdWJpi+eDspByZ9HDt7luskAh075ETf69PJx1Quw+g0l7XCFQXVBdAs05TCqPEALy7VqxPof2q31AxoKJiTDczTi0xAe214z2pOj5QIaynFsprrmQC4wp0CcPbjPowtE6sIv8Cumu9z9Vq/A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795851; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=aZTO3x/pXi2BQffGU8Ahgki8e6dMOggVVDCSg/uLSOA=; b=c6JKFfoeMiuYKk+xUqT5jEIO2Wa5ZggsCYsmRDYKD1XuQkyc83oCkcHQLsjaPvxVPLsw2SWg6Uta/8Rbmxq2N/16obWAUsPxk/QYTTA2YGawGLt56OM4MufZeMxr6NC3Q5Kw51l/82QL5lZidq4xtozuw+9Qcy87+jtFetUk3V8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1614795851903173.25936650272104; Wed, 3 Mar 2021 10:24:11 -0800 (PST) Received: from mail-wr1-f69.google.com (mail-wr1-f69.google.com [209.85.221.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-220-mK4UcxCoN02paEadYmGntg-1; Wed, 03 Mar 2021 13:24:09 -0500 Received: by mail-wr1-f69.google.com with SMTP id n17so995637wrq.5 for ; Wed, 03 Mar 2021 10:24:09 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id h19sm6328046wmq.47.2021.03.03.10.24.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:24:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795850; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aZTO3x/pXi2BQffGU8Ahgki8e6dMOggVVDCSg/uLSOA=; b=LXurh+kw0YM6nQGPjKmV8lxoOnNHzMPu+reNYp86hqydxSdofhp5ztKnUL5Yud/do8Qtdx +lv3KfsNKXLbADL8U31/0HV1aEyoNS1kXiW3lIGxMpFJxW77XoUY2472RVDnYAjKhbF3zy +XIFLQJxKYuvuQDSWRQ4X8TUmKwwJq0= X-MC-Unique: mK4UcxCoN02paEadYmGntg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aZTO3x/pXi2BQffGU8Ahgki8e6dMOggVVDCSg/uLSOA=; b=rb7YPDnwESDwCXZnPFiDikeAPLPgmh+psEMutTC8CpRZWHkInSB0QZijl1TUnaYJw5 PNCgrDN6nPbSBBAisnmZhs8OEv5ymZfIAcMoP0+bPpk279X8BfGoVgFcRKqyTfQ2hLcW BJk3W0Of//CPPPtjMUH/3jF3Ol4yBd78n8KzCD42pCQYA70ktnqmharjnNQQmFz3Qh6l NeKGrCGaKd8iHte1cnvHVUZm5GZ9vRP3NaygZVqyJt/bGdGzn//gHMD02Fxe0QzJVofA lWnQerzzriBsaDiCErXrkbGBjoPh0eU0fn+lToDx73vnpSdDspkSzm7KwpPazF5sR5DX wqng== X-Gm-Message-State: AOAM533GrKNNtzpI2gr5eBECpGvz6faTMDKhxXeNx+DUuKidV1gJbzmB h/Qzm9BkW6agx/NGcAwg5JKtdFwqd3MADryaLmAnuOwhVUuANl6nD76KKR3Frp6mOulJD7c/RTK 1WiEPQSb+onwYVQ== X-Received: by 2002:adf:e482:: with SMTP id i2mr28326968wrm.392.1614795847429; Wed, 03 Mar 2021 10:24:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJysTIK0lXRu39FtCQ9OTCPkfsknp8BOt8AZSrD9mXO72PDaVrwkpYfYBypZC5XeuQMn16k2cw== X-Received: by 2002:adf:e482:: with SMTP id i2mr28326953wrm.392.1614795847187; Wed, 03 Mar 2021 10:24:07 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 16/19] accel/kvm: Move the 'kvm_run' field to AccelvCPUState Date: Wed, 3 Mar 2021 19:22:16 +0100 Message-Id: <20210303182219.1631042-17-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Patch created mechanically using: $ sed -i 's/->kvm_run/->accel_vcpu->kvm_run/' $(git grep -l kvm_run) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 1 - include/sysemu/kvm_int.h | 1 + accel/kvm/kvm-all.c | 16 ++++++++-------- hw/s390x/pv.c | 3 ++- target/i386/kvm/kvm.c | 2 +- target/s390x/kvm.c | 19 ++++++++++--------- 6 files changed, 22 insertions(+), 20 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 4f280509f9b..3268f1393f1 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -415,7 +415,6 @@ struct CPUState { =20 /* Accelerator-specific fields. */ struct AccelvCPUState *accel_vcpu; - struct kvm_run *kvm_run; int hvf_fd; /* shared by kvm, hax and hvf */ bool vcpu_dirty; diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index dc45b3c3afa..b83264847aa 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -19,6 +19,7 @@ struct AccelvCPUState { */ int kvm_fd; struct KVMState *kvm_state; + struct kvm_run *kvm_run; }; =20 typedef struct KVMSlot diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 737db3d3e0e..69df35497d2 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -380,7 +380,7 @@ static int do_kvm_destroy_vcpu(CPUState *cpu) goto err; } =20 - ret =3D munmap(cpu->kvm_run, mmap_size); + ret =3D munmap(cpu->accel_vcpu->kvm_run, mmap_size); if (ret < 0) { goto err; } @@ -448,9 +448,9 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) goto err; } =20 - cpu->kvm_run =3D mmap(NULL, mmap_size, PROT_READ | PROT_WRITE, MAP_SHA= RED, - cpu->accel_vcpu->kvm_fd, 0); - if (cpu->kvm_run =3D=3D MAP_FAILED) { + cpu->accel_vcpu->kvm_run =3D mmap(NULL, mmap_size, PROT_READ | PROT_WR= ITE, + MAP_SHARED, cpu->accel_vcpu->kvm_fd, 0= ); + if (cpu->accel_vcpu->kvm_run =3D=3D MAP_FAILED) { ret =3D -errno; error_setg_errno(errp, ret, "kvm_init_vcpu: mmap'ing vcpu state failed (%lu)", @@ -460,7 +460,7 @@ int kvm_init_vcpu(CPUState *cpu, Error **errp) =20 if (s->coalesced_mmio && !s->coalesced_mmio_ring) { s->coalesced_mmio_ring =3D - (void *)cpu->kvm_run + s->coalesced_mmio * PAGE_SIZE; + (void *)cpu->accel_vcpu->kvm_run + s->coalesced_mmio * PAGE_SI= ZE; } =20 ret =3D kvm_arch_init_vcpu(cpu); @@ -2382,7 +2382,7 @@ static __thread bool have_sigbus_pending; =20 static void kvm_cpu_kick(CPUState *cpu) { - qatomic_set(&cpu->kvm_run->immediate_exit, 1); + qatomic_set(&cpu->accel_vcpu->kvm_run->immediate_exit, 1); } =20 static void kvm_cpu_kick_self(void) @@ -2403,7 +2403,7 @@ static void kvm_eat_signals(CPUState *cpu) int r; =20 if (kvm_immediate_exit) { - qatomic_set(&cpu->kvm_run->immediate_exit, 0); + qatomic_set(&cpu->accel_vcpu->kvm_run->immediate_exit, 0); /* Write kvm_run->immediate_exit before the cpu->exit_request * write in kvm_cpu_exec. */ @@ -2431,7 +2431,7 @@ static void kvm_eat_signals(CPUState *cpu) =20 int kvm_cpu_exec(CPUState *cpu) { - struct kvm_run *run =3D cpu->kvm_run; + struct kvm_run *run =3D cpu->accel_vcpu->kvm_run; int ret, run_ret; =20 DPRINTF("kvm_cpu_exec()\n"); diff --git a/hw/s390x/pv.c b/hw/s390x/pv.c index 93eccfc05d5..061c92fc4e3 100644 --- a/hw/s390x/pv.c +++ b/hw/s390x/pv.c @@ -17,6 +17,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/kvm.h" +#include "sysemu/kvm_int.h" #include "qom/object_interfaces.h" #include "exec/confidential-guest-support.h" #include "hw/s390x/ipl.h" @@ -108,7 +109,7 @@ void s390_pv_unshare(void) =20 void s390_pv_inject_reset_error(CPUState *cs) { - int r1 =3D (cs->kvm_run->s390_sieic.ipa & 0x00f0) >> 4; + int r1 =3D (cs->accel_vcpu->kvm_run->s390_sieic.ipa & 0x00f0) >> 4; CPUS390XState *env =3D &S390_CPU(cs)->env; =20 /* Report that we are unable to enter protected mode */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index b2facf4f7c1..c0ccaf6b06a 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -4329,7 +4329,7 @@ static int kvm_handle_halt(X86CPU *cpu) static int kvm_handle_tpr_access(X86CPU *cpu) { CPUState *cs =3D CPU(cpu); - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; =20 apic_handle_tpr_access_report(cpu->apic_state, run->tpr_access.rip, run->tpr_access.is_write ? TPR_ACCESS_WR= ITE diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index cf6790b2678..7968b10fa52 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -460,14 +460,15 @@ void kvm_s390_reset_vcpu_normal(S390CPU *cpu) =20 static int can_sync_regs(CPUState *cs, int regs) { - return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) =3D=3D re= gs; + return cap_sync_regs + && (cs->accel_vcpu->kvm_run->kvm_valid_regs & regs) =3D=3D regs; } =20 int kvm_arch_put_registers(CPUState *cs, int level) { S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; struct kvm_sregs sregs; struct kvm_regs regs; struct kvm_fpu fpu =3D {}; @@ -624,7 +625,7 @@ int kvm_arch_get_registers(CPUState *cs) { S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; struct kvm_sregs sregs; struct kvm_regs regs; struct kvm_fpu fpu; @@ -1621,8 +1622,8 @@ void kvm_s390_set_diag318(CPUState *cs, uint64_t diag= 318_info) /* Feat bit is set only if KVM supports sync for diag318 */ if (s390_has_feat(S390_FEAT_DIAG_318)) { env->diag318_info =3D diag318_info; - cs->kvm_run->s.regs.diag318 =3D diag318_info; - cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_DIAG318; + cs->accel_vcpu->kvm_run->s.regs.diag318 =3D diag318_info; + cs->accel_vcpu->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_DIAG318; } } =20 @@ -1783,7 +1784,7 @@ static int handle_oper_loop(S390CPU *cpu, struct kvm_= run *run) static int handle_intercept(S390CPU *cpu) { CPUState *cs =3D CPU(cpu); - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; int icpt_code =3D run->s390_sieic.icptcode; int r =3D 0; =20 @@ -1844,7 +1845,7 @@ static int handle_intercept(S390CPU *cpu) static int handle_tsch(S390CPU *cpu) { CPUState *cs =3D CPU(cpu); - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; int ret; =20 ret =3D ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb, @@ -1934,7 +1935,7 @@ static void insert_stsi_3_2_2(S390CPU *cpu, __u64 add= r, uint8_t ar) static int handle_stsi(S390CPU *cpu) { CPUState *cs =3D CPU(cpu); - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; =20 switch (run->s390_stsi.fc) { case 3: @@ -1952,7 +1953,7 @@ static int handle_stsi(S390CPU *cpu) static int kvm_arch_handle_debug_exit(S390CPU *cpu) { CPUState *cs =3D CPU(cpu); - struct kvm_run *run =3D cs->kvm_run; + struct kvm_run *run =3D cs->accel_vcpu->kvm_run; =20 int ret =3D 0; struct kvm_debug_exit_arch *arch_info =3D &run->debug.arch; --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795857; cv=none; d=zohomail.com; s=zohoarc; b=LV0JXQchcUZeScrOXt7rUIyfxLiQSLdZUQGKrOb50S0ro71vFF57SiiZ152Cr4DtRHQeEuyF8G89wR1GGeF2IMr7MkMiEi3K9V5ienAnqy9+cuHnwWbCX6MZqNwrf0kTcgaesy0HOrUnCATdJArNiCXqiLnIUJOYSpBtoPBTlug= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795857; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=zbl5ln6j4TQbN8eSMfKjFDrfgLqqJBTprqPvaHJIAzA=; b=hJdUdskrZ5mxArMfWEB0p2rq5ilaL8xbjn/Z2o9eJhJIhJfg1cqlrrx1BVyAl/6cnEL8Gy58wi7cn6uS+NIudUaJ+AHv3y6YfYzwkUjY7R7/mLrKHT0MBk4iSowxxe5wl5suaM+3kLwiQipHJ8gU68p/ksd+2NT3dALpslksSWc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795857502911.5387294941925; Wed, 3 Mar 2021 10:24:17 -0800 (PST) Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-439-v3sSjhW0OlWxwOhhM07rOw-1; Wed, 03 Mar 2021 13:24:14 -0500 Received: by mail-wm1-f69.google.com with SMTP id v5so3387129wml.9 for ; Wed, 03 Mar 2021 10:24:14 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id h20sm6759660wmb.1.2021.03.03.10.24.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:24:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795856; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zbl5ln6j4TQbN8eSMfKjFDrfgLqqJBTprqPvaHJIAzA=; b=A18DFvuFsn5oSzrEsZxyoSA0CCCvuvhbVhWK1de9NkbuusTFyAwIPS8sHxj4ea8F2WTwUK HpOyePnJw3PGW7pp9hqLZkPgVVZZAGQGnu2vb4QnnA9K8VoCP0MV6JtyAA1sNRqhtet1P5 YrON5JYTrL3RiB3whaXUy0Bsry67DyE= X-MC-Unique: v3sSjhW0OlWxwOhhM07rOw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zbl5ln6j4TQbN8eSMfKjFDrfgLqqJBTprqPvaHJIAzA=; b=YqClkNrhnED4aPZbv4vZh9+BFjHDDVcrtA4zliD8flDrjXMb5UxtvAWWWfKnlObNT1 9AArWu+Fj+QASuPnIoDvTi+5Ay05avBINNlK3ISjSoYtnsXX1ObKKTIEIxvD/frtw3BM 8eVh1ch+S1sjw1Ag7TjCZfCNLiPaAMzmEG1XA4w10Xqlt7SUg4z7KoJg3uBSXMv5B/Al 6pCuYhTYYKkx3ORvBt2S7LY5MdagWa4jjTVUg3TWiJpiZS07XgoBGiaHWdhHb4MCpO3A DP1lVI8sxe1zKSq0PuvHrIFR4Iqpm7uviK+SwB7cJXndMaOouXTr/txL7E/Wp/ioqPeI 5y8Q== X-Gm-Message-State: AOAM531vOB1beq5PiHD6NQe/Q1kEGqTjsetiJz3yy4KBiyGzaSsqI7JT UKpWow6soRpv9SYfU9Lv/MebdS/D8GDV0KSzvm2ZNirLSyjzZ3Uuy2C5jRMEt6bS0yIO7lPfQb8 4v0AbrLENsF9zuA== X-Received: by 2002:a1c:df46:: with SMTP id w67mr270284wmg.176.1614795853184; Wed, 03 Mar 2021 10:24:13 -0800 (PST) X-Google-Smtp-Source: ABdhPJx28e4WRX9tuACTD8hzn37Sbo31xMuLH6rW9MrGPqhW3u/fo4zuJ5oZN3ZY4y1xZWsTnmDfOg== X-Received: by 2002:a1c:df46:: with SMTP id w67mr270263wmg.176.1614795852910; Wed, 03 Mar 2021 10:24:12 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 17/19] accel/hvf: Reduce deref by declaring 'hv_vcpuid_t hvf_fd' on stack Date: Wed, 3 Mar 2021 19:22:17 +0100 Message-Id: <20210303182219.1631042-18-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) In order to make the next commits easier to review, declare 'hvf_fd' on the stack when it is used in various places in a function. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/hvf/hvf.c | 95 ++++++++-------- target/i386/hvf/x86_descr.c | 19 ++-- target/i386/hvf/x86hvf.c | 209 ++++++++++++++++++------------------ 3 files changed, 166 insertions(+), 157 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 3c5c9c8197e..effee39ee9b 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -504,6 +504,7 @@ int hvf_init_vcpu(CPUState *cpu) =20 X86CPU *x86cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86cpu->env; + hv_vcpuid_t hvf_fd; int r; =20 /* init cpu signals */ @@ -532,9 +533,10 @@ int hvf_init_vcpu(CPUState *cpu) } } =20 - r =3D hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf_fd, HV_VCPU_DEFAULT); + r =3D hv_vcpu_create(&hvf_fd, HV_VCPU_DEFAULT); cpu->vcpu_dirty =3D true; assert_hvf_ok(r); + cpu->hvf_fd =3D (int)hvf_fd =20 if (hv_vmx_read_capability(HV_VMX_CAP_PINBASED, &hvf_state->hvf_caps->vmx_cap_pinbased)) { @@ -554,43 +556,43 @@ int hvf_init_vcpu(CPUState *cpu) } =20 /* set VMCS control fields */ - wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, + wvmcs(hvf_fd, VMCS_PIN_BASED_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_cap_pinbased, VMCS_PIN_BASED_CTLS_EXTINT | VMCS_PIN_BASED_CTLS_NMI | VMCS_PIN_BASED_CTLS_VNMI)); - wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, + wvmcs(hvf_fd, VMCS_PRI_PROC_BASED_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_cap_procbased, VMCS_PRI_PROC_BASED_CTLS_HLT | VMCS_PRI_PROC_BASED_CTLS_MWAIT | VMCS_PRI_PROC_BASED_CTLS_TSC_OFFSET | VMCS_PRI_PROC_BASED_CTLS_TPR_SHADOW) | VMCS_PRI_PROC_BASED_CTLS_SEC_CONTROL); - wvmcs(cpu->hvf_fd, VMCS_SEC_PROC_BASED_CTLS, + wvmcs(hvf_fd, VMCS_SEC_PROC_BASED_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_cap_procbased2, VMCS_PRI_PROC_BASED2_CTLS_APIC_ACCESSES)); =20 - wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_= cap_entry, + wvmcs(hvf_fd, VMCS_ENTRY_CTLS, cap2ctrl(hvf_state->hvf_caps->vmx_cap_e= ntry, 0)); - wvmcs(cpu->hvf_fd, VMCS_EXCEPTION_BITMAP, 0); /* Double fault */ + wvmcs(hvf_fd, VMCS_EXCEPTION_BITMAP, 0); /* Double fault */ =20 - wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, 0); + wvmcs(hvf_fd, VMCS_TPR_THRESHOLD, 0); =20 x86cpu =3D X86_CPU(cpu); x86cpu->env.xsave_buf =3D qemu_memalign(4096, 4096); =20 - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_STAR, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_LSTAR, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_CSTAR, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_FMASK, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_FSBASE, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_GSBASE, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_KERNELGSBASE, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_TSC_AUX, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_TSC, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_SYSENTER_CS, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_SYSENTER_EIP, 1); - hv_vcpu_enable_native_msr(cpu->hvf_fd, MSR_IA32_SYSENTER_ESP, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_STAR, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_LSTAR, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_CSTAR, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_FMASK, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_FSBASE, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_GSBASE, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_KERNELGSBASE, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_TSC_AUX, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_IA32_TSC, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_IA32_SYSENTER_CS, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_IA32_SYSENTER_EIP, 1); + hv_vcpu_enable_native_msr(hvf_fd, MSR_IA32_SYSENTER_ESP, 1); =20 return 0; } @@ -695,6 +697,7 @@ int hvf_vcpu_exec(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; int ret =3D 0; uint64_t rip =3D 0; =20 @@ -719,20 +722,20 @@ int hvf_vcpu_exec(CPUState *cpu) return EXCP_HLT; } =20 - hv_return_t r =3D hv_vcpu_run(cpu->hvf_fd); + hv_return_t r =3D hv_vcpu_run(hvf_fd); assert_hvf_ok(r); =20 /* handle VMEXIT */ - uint64_t exit_reason =3D rvmcs(cpu->hvf_fd, VMCS_EXIT_REASON); - uint64_t exit_qual =3D rvmcs(cpu->hvf_fd, VMCS_EXIT_QUALIFICATION); - uint32_t ins_len =3D (uint32_t)rvmcs(cpu->hvf_fd, + uint64_t exit_reason =3D rvmcs(hvf_fd, VMCS_EXIT_REASON); + uint64_t exit_qual =3D rvmcs(hvf_fd, VMCS_EXIT_QUALIFICATION); + uint32_t ins_len =3D (uint32_t)rvmcs(hvf_fd, VMCS_EXIT_INSTRUCTION_LENGTH); =20 - uint64_t idtvec_info =3D rvmcs(cpu->hvf_fd, VMCS_IDT_VECTORING_INF= O); + uint64_t idtvec_info =3D rvmcs(hvf_fd, VMCS_IDT_VECTORING_INFO); =20 hvf_store_events(cpu, ins_len, idtvec_info); - rip =3D rreg(cpu->hvf_fd, HV_X86_RIP); - env->eflags =3D rreg(cpu->hvf_fd, HV_X86_RFLAGS); + rip =3D rreg(hvf_fd, HV_X86_RIP); + env->eflags =3D rreg(hvf_fd, HV_X86_RFLAGS); =20 qemu_mutex_lock_iothread(); =20 @@ -762,7 +765,7 @@ int hvf_vcpu_exec(CPUState *cpu) case EXIT_REASON_EPT_FAULT: { hvf_slot *slot; - uint64_t gpa =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_PHYSICAL_ADDRES= S); + uint64_t gpa =3D rvmcs(hvf_fd, VMCS_GUEST_PHYSICAL_ADDRESS); =20 if (((idtvec_info & VMCS_IDT_VEC_VALID) =3D=3D 0) && ((exit_qual & EXIT_QUAL_NMIUDTI) !=3D 0)) { @@ -807,7 +810,7 @@ int hvf_vcpu_exec(CPUState *cpu) store_regs(cpu); break; } else if (!string && !in) { - RAX(env) =3D rreg(cpu->hvf_fd, HV_X86_RAX); + RAX(env) =3D rreg(hvf_fd, HV_X86_RAX); hvf_handle_io(env, port, &RAX(env), 1, size, 1); macvm_set_rip(cpu, rip + ins_len); break; @@ -823,21 +826,21 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case EXIT_REASON_CPUID: { - uint32_t rax =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RAX); - uint32_t rbx =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RBX); - uint32_t rcx =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RCX); - uint32_t rdx =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RDX); + uint32_t rax =3D (uint32_t)rreg(hvf_fd, HV_X86_RAX); + uint32_t rbx =3D (uint32_t)rreg(hvf_fd, HV_X86_RBX); + uint32_t rcx =3D (uint32_t)rreg(hvf_fd, HV_X86_RCX); + uint32_t rdx =3D (uint32_t)rreg(hvf_fd, HV_X86_RDX); =20 if (rax =3D=3D 1) { /* CPUID1.ecx.OSXSAVE needs to know CR4 */ - env->cr[4] =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_CR4); + env->cr[4] =3D rvmcs(hvf_fd, VMCS_GUEST_CR4); } hvf_cpu_x86_cpuid(env, rax, rcx, &rax, &rbx, &rcx, &rdx); =20 - wreg(cpu->hvf_fd, HV_X86_RAX, rax); - wreg(cpu->hvf_fd, HV_X86_RBX, rbx); - wreg(cpu->hvf_fd, HV_X86_RCX, rcx); - wreg(cpu->hvf_fd, HV_X86_RDX, rdx); + wreg(hvf_fd, HV_X86_RAX, rax); + wreg(hvf_fd, HV_X86_RBX, rbx); + wreg(hvf_fd, HV_X86_RCX, rcx); + wreg(hvf_fd, HV_X86_RDX, rdx); =20 macvm_set_rip(cpu, rip + ins_len); break; @@ -845,16 +848,16 @@ int hvf_vcpu_exec(CPUState *cpu) case EXIT_REASON_XSETBV: { X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; - uint32_t eax =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RAX); - uint32_t ecx =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RCX); - uint32_t edx =3D (uint32_t)rreg(cpu->hvf_fd, HV_X86_RDX); + uint32_t eax =3D (uint32_t)rreg(hvf_fd, HV_X86_RAX); + uint32_t ecx =3D (uint32_t)rreg(hvf_fd, HV_X86_RCX); + uint32_t edx =3D (uint32_t)rreg(hvf_fd, HV_X86_RDX); =20 if (ecx) { macvm_set_rip(cpu, rip + ins_len); break; } env->xcr0 =3D ((uint64_t)edx << 32) | eax; - wreg(cpu->hvf_fd, HV_X86_XCR0, env->xcr0 | 1); + wreg(hvf_fd, HV_X86_XCR0, env->xcr0 | 1); macvm_set_rip(cpu, rip + ins_len); break; } @@ -893,11 +896,11 @@ int hvf_vcpu_exec(CPUState *cpu) =20 switch (cr) { case 0x0: { - macvm_set_cr0(cpu->hvf_fd, RRX(env, reg)); + macvm_set_cr0(hvf_fd, RRX(env, reg)); break; } case 4: { - macvm_set_cr4(cpu->hvf_fd, RRX(env, reg)); + macvm_set_cr4(hvf_fd, RRX(env, reg)); break; } case 8: { @@ -933,7 +936,7 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case EXIT_REASON_TASK_SWITCH: { - uint64_t vinfo =3D rvmcs(cpu->hvf_fd, VMCS_IDT_VECTORING_INFO); + uint64_t vinfo =3D rvmcs(hvf_fd, VMCS_IDT_VECTORING_INFO); x68_segment_selector sel =3D {.sel =3D exit_qual & 0xffff}; vmx_handle_task_switch(cpu, sel, (exit_qual >> 30) & 0x3, vinfo & VMCS_INTR_VALID, vinfo & VECTORING_INFO_VECTOR_MASK, = vinfo @@ -946,8 +949,8 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case EXIT_REASON_RDPMC: - wreg(cpu->hvf_fd, HV_X86_RAX, 0); - wreg(cpu->hvf_fd, HV_X86_RDX, 0); + wreg(hvf_fd, HV_X86_RAX, 0); + wreg(hvf_fd, HV_X86_RDX, 0); macvm_set_rip(cpu, rip + ins_len); break; case VMX_REASON_VMCALL: diff --git a/target/i386/hvf/x86_descr.c b/target/i386/hvf/x86_descr.c index 9f539e73f6d..1c6220baa0d 100644 --- a/target/i386/hvf/x86_descr.c +++ b/target/i386/hvf/x86_descr.c @@ -75,20 +75,23 @@ void vmx_write_segment_selector(struct CPUState *cpu, x= 68_segment_selector selec =20 void vmx_read_segment_descriptor(struct CPUState *cpu, struct vmx_segment = *desc, X86Seg seg) { - desc->sel =3D rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector); - desc->base =3D rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].base); - desc->limit =3D rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].limit); - desc->ar =3D rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].ar_bytes); + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + + desc->sel =3D rvmcs(hvf_fd, vmx_segment_fields[seg].selector); + desc->base =3D rvmcs(hvf_fd, vmx_segment_fields[seg].base); + desc->limit =3D rvmcs(hvf_fd, vmx_segment_fields[seg].limit); + desc->ar =3D rvmcs(hvf_fd, vmx_segment_fields[seg].ar_bytes); } =20 void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc,= X86Seg seg) { const struct vmx_segment_field *sf =3D &vmx_segment_fields[seg]; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; =20 - wvmcs(cpu->hvf_fd, sf->base, desc->base); - wvmcs(cpu->hvf_fd, sf->limit, desc->limit); - wvmcs(cpu->hvf_fd, sf->selector, desc->sel); - wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); + wvmcs(hvf_fd, sf->base, desc->base); + wvmcs(hvf_fd, sf->limit, desc->limit); + wvmcs(hvf_fd, sf->selector, desc->sel); + wvmcs(hvf_fd, sf->ar_bytes, desc->ar); } =20 void x86_segment_descriptor_to_vmx(struct CPUState *cpu, x68_segment_selec= tor selector, struct x86_segment_descriptor *desc, struct vmx_segment *vmx_= desc) diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index 0d7533742eb..2f291f2ad53 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -89,21 +89,22 @@ void hvf_put_xsave(CPUState *cpu_state) void hvf_put_segments(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; struct vmx_segment seg; =20 - wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); - wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_BASE, env->idt.base); + wvmcs(hvf_fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); + wvmcs(hvf_fd, VMCS_GUEST_IDTR_BASE, env->idt.base); =20 - wvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_LIMIT, env->gdt.limit); - wvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_BASE, env->gdt.base); + wvmcs(hvf_fd, VMCS_GUEST_GDTR_LIMIT, env->gdt.limit); + wvmcs(hvf_fd, VMCS_GUEST_GDTR_BASE, env->gdt.base); =20 - /* wvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR2, env->cr[2]); */ - wvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR3, env->cr[3]); + /* wvmcs(hvf_fd, VMCS_GUEST_CR2, env->cr[2]); */ + wvmcs(hvf_fd, VMCS_GUEST_CR3, env->cr[3]); vmx_update_tpr(cpu_state); - wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IA32_EFER, env->efer); + wvmcs(hvf_fd, VMCS_GUEST_IA32_EFER, env->efer); =20 - macvm_set_cr4(cpu_state->hvf_fd, env->cr[4]); - macvm_set_cr0(cpu_state->hvf_fd, env->cr[0]); + macvm_set_cr4(hvf_fd, env->cr[4]); + macvm_set_cr0(hvf_fd, env->cr[0]); =20 hvf_set_segment(cpu_state, &seg, &env->segs[R_CS], false); vmx_write_segment_descriptor(cpu_state, &seg, R_CS); @@ -129,31 +130,29 @@ void hvf_put_segments(CPUState *cpu_state) hvf_set_segment(cpu_state, &seg, &env->ldt, false); vmx_write_segment_descriptor(cpu_state, &seg, R_LDTR); =20 - hv_vcpu_flush(cpu_state->hvf_fd); + hv_vcpu_flush(hvf_fd); } =20 void hvf_put_msrs(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; =20 - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_IA32_SYSENTER_CS, - env->sysenter_cs); - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_IA32_SYSENTER_ESP, - env->sysenter_esp); - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_IA32_SYSENTER_EIP, - env->sysenter_eip); + hv_vcpu_write_msr(hvf_fd, MSR_IA32_SYSENTER_CS, env->sysenter_cs); + hv_vcpu_write_msr(hvf_fd, MSR_IA32_SYSENTER_ESP, env->sysenter_esp); + hv_vcpu_write_msr(hvf_fd, MSR_IA32_SYSENTER_EIP, env->sysenter_eip); =20 - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_STAR, env->star); + hv_vcpu_write_msr(hvf_fd, MSR_STAR, env->star); =20 #ifdef TARGET_X86_64 - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_CSTAR, env->cstar); - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_KERNELGSBASE, env->kernelgsba= se); - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_FMASK, env->fmask); - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_LSTAR, env->lstar); + hv_vcpu_write_msr(hvf_fd, MSR_CSTAR, env->cstar); + hv_vcpu_write_msr(hvf_fd, MSR_KERNELGSBASE, env->kernelgsbase); + hv_vcpu_write_msr(hvf_fd, MSR_FMASK, env->fmask); + hv_vcpu_write_msr(hvf_fd, MSR_LSTAR, env->lstar); #endif =20 - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_GSBASE, env->segs[R_GS].base); - hv_vcpu_write_msr(cpu_state->hvf_fd, MSR_FSBASE, env->segs[R_FS].base); + hv_vcpu_write_msr(hvf_fd, MSR_GSBASE, env->segs[R_GS].base); + hv_vcpu_write_msr(hvf_fd, MSR_FSBASE, env->segs[R_FS].base); } =20 =20 @@ -173,7 +172,7 @@ void hvf_get_xsave(CPUState *cpu_state) void hvf_get_segments(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; - + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; struct vmx_segment seg; =20 env->interrupt_injected =3D -1; @@ -202,72 +201,74 @@ void hvf_get_segments(CPUState *cpu_state) vmx_read_segment_descriptor(cpu_state, &seg, R_LDTR); hvf_get_segment(&env->ldt, &seg); =20 - env->idt.limit =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_LIMIT); - env->idt.base =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_BASE); - env->gdt.limit =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_LIMIT); - env->gdt.base =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_BASE); + env->idt.limit =3D rvmcs(hvf_fd, VMCS_GUEST_IDTR_LIMIT); + env->idt.base =3D rvmcs(hvf_fd, VMCS_GUEST_IDTR_BASE); + env->gdt.limit =3D rvmcs(hvf_fd, VMCS_GUEST_GDTR_LIMIT); + env->gdt.base =3D rvmcs(hvf_fd, VMCS_GUEST_GDTR_BASE); =20 - env->cr[0] =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR0); + env->cr[0] =3D rvmcs(hvf_fd, VMCS_GUEST_CR0); env->cr[2] =3D 0; - env->cr[3] =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR3); - env->cr[4] =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR4); + env->cr[3] =3D rvmcs(hvf_fd, VMCS_GUEST_CR3); + env->cr[4] =3D rvmcs(hvf_fd, VMCS_GUEST_CR4); =20 - env->efer =3D rvmcs(cpu_state->hvf_fd, VMCS_GUEST_IA32_EFER); + env->efer =3D rvmcs(hvf_fd, VMCS_GUEST_IA32_EFER); } =20 void hvf_get_msrs(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; uint64_t tmp; =20 - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_IA32_SYSENTER_CS, &tmp); + hv_vcpu_read_msr(hvf_fd, MSR_IA32_SYSENTER_CS, &tmp); env->sysenter_cs =3D tmp; =20 - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_IA32_SYSENTER_ESP, &tmp); + hv_vcpu_read_msr(hvf_fd, MSR_IA32_SYSENTER_ESP, &tmp); env->sysenter_esp =3D tmp; =20 - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_IA32_SYSENTER_EIP, &tmp); + hv_vcpu_read_msr(hvf_fd, MSR_IA32_SYSENTER_EIP, &tmp); env->sysenter_eip =3D tmp; =20 - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_STAR, &env->star); + hv_vcpu_read_msr(hvf_fd, MSR_STAR, &env->star); =20 #ifdef TARGET_X86_64 - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_CSTAR, &env->cstar); - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_KERNELGSBASE, &env->kernelgsba= se); - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_FMASK, &env->fmask); - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_LSTAR, &env->lstar); + hv_vcpu_read_msr(hvf_fd, MSR_CSTAR, &env->cstar); + hv_vcpu_read_msr(hvf_fd, MSR_KERNELGSBASE, &env->kernelgsbase); + hv_vcpu_read_msr(hvf_fd, MSR_FMASK, &env->fmask); + hv_vcpu_read_msr(hvf_fd, MSR_LSTAR, &env->lstar); #endif =20 - hv_vcpu_read_msr(cpu_state->hvf_fd, MSR_IA32_APICBASE, &tmp); + hv_vcpu_read_msr(hvf_fd, MSR_IA32_APICBASE, &tmp); =20 - env->tsc =3D rdtscp() + rvmcs(cpu_state->hvf_fd, VMCS_TSC_OFFSET); + env->tsc =3D rdtscp() + rvmcs(hvf_fd, VMCS_TSC_OFFSET); } =20 int hvf_put_registers(CPUState *cpu_state) { X86CPU *x86cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &x86cpu->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; =20 - wreg(cpu_state->hvf_fd, HV_X86_RAX, env->regs[R_EAX]); - wreg(cpu_state->hvf_fd, HV_X86_RBX, env->regs[R_EBX]); - wreg(cpu_state->hvf_fd, HV_X86_RCX, env->regs[R_ECX]); - wreg(cpu_state->hvf_fd, HV_X86_RDX, env->regs[R_EDX]); - wreg(cpu_state->hvf_fd, HV_X86_RBP, env->regs[R_EBP]); - wreg(cpu_state->hvf_fd, HV_X86_RSP, env->regs[R_ESP]); - wreg(cpu_state->hvf_fd, HV_X86_RSI, env->regs[R_ESI]); - wreg(cpu_state->hvf_fd, HV_X86_RDI, env->regs[R_EDI]); - wreg(cpu_state->hvf_fd, HV_X86_R8, env->regs[8]); - wreg(cpu_state->hvf_fd, HV_X86_R9, env->regs[9]); - wreg(cpu_state->hvf_fd, HV_X86_R10, env->regs[10]); - wreg(cpu_state->hvf_fd, HV_X86_R11, env->regs[11]); - wreg(cpu_state->hvf_fd, HV_X86_R12, env->regs[12]); - wreg(cpu_state->hvf_fd, HV_X86_R13, env->regs[13]); - wreg(cpu_state->hvf_fd, HV_X86_R14, env->regs[14]); - wreg(cpu_state->hvf_fd, HV_X86_R15, env->regs[15]); - wreg(cpu_state->hvf_fd, HV_X86_RFLAGS, env->eflags); - wreg(cpu_state->hvf_fd, HV_X86_RIP, env->eip); + wreg(hvf_fd, HV_X86_RAX, env->regs[R_EAX]); + wreg(hvf_fd, HV_X86_RBX, env->regs[R_EBX]); + wreg(hvf_fd, HV_X86_RCX, env->regs[R_ECX]); + wreg(hvf_fd, HV_X86_RDX, env->regs[R_EDX]); + wreg(hvf_fd, HV_X86_RBP, env->regs[R_EBP]); + wreg(hvf_fd, HV_X86_RSP, env->regs[R_ESP]); + wreg(hvf_fd, HV_X86_RSI, env->regs[R_ESI]); + wreg(hvf_fd, HV_X86_RDI, env->regs[R_EDI]); + wreg(hvf_fd, HV_X86_R8, env->regs[8]); + wreg(hvf_fd, HV_X86_R9, env->regs[9]); + wreg(hvf_fd, HV_X86_R10, env->regs[10]); + wreg(hvf_fd, HV_X86_R11, env->regs[11]); + wreg(hvf_fd, HV_X86_R12, env->regs[12]); + wreg(hvf_fd, HV_X86_R13, env->regs[13]); + wreg(hvf_fd, HV_X86_R14, env->regs[14]); + wreg(hvf_fd, HV_X86_R15, env->regs[15]); + wreg(hvf_fd, HV_X86_RFLAGS, env->eflags); + wreg(hvf_fd, HV_X86_RIP, env->eip); =20 - wreg(cpu_state->hvf_fd, HV_X86_XCR0, env->xcr0); + wreg(hvf_fd, HV_X86_XCR0, env->xcr0); =20 hvf_put_xsave(cpu_state); =20 @@ -275,14 +276,14 @@ int hvf_put_registers(CPUState *cpu_state) =20 hvf_put_msrs(cpu_state); =20 - wreg(cpu_state->hvf_fd, HV_X86_DR0, env->dr[0]); - wreg(cpu_state->hvf_fd, HV_X86_DR1, env->dr[1]); - wreg(cpu_state->hvf_fd, HV_X86_DR2, env->dr[2]); - wreg(cpu_state->hvf_fd, HV_X86_DR3, env->dr[3]); - wreg(cpu_state->hvf_fd, HV_X86_DR4, env->dr[4]); - wreg(cpu_state->hvf_fd, HV_X86_DR5, env->dr[5]); - wreg(cpu_state->hvf_fd, HV_X86_DR6, env->dr[6]); - wreg(cpu_state->hvf_fd, HV_X86_DR7, env->dr[7]); + wreg(hvf_fd, HV_X86_DR0, env->dr[0]); + wreg(hvf_fd, HV_X86_DR1, env->dr[1]); + wreg(hvf_fd, HV_X86_DR2, env->dr[2]); + wreg(hvf_fd, HV_X86_DR3, env->dr[3]); + wreg(hvf_fd, HV_X86_DR4, env->dr[4]); + wreg(hvf_fd, HV_X86_DR5, env->dr[5]); + wreg(hvf_fd, HV_X86_DR6, env->dr[6]); + wreg(hvf_fd, HV_X86_DR7, env->dr[7]); =20 return 0; } @@ -291,41 +292,42 @@ int hvf_get_registers(CPUState *cpu_state) { X86CPU *x86cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &x86cpu->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; =20 - env->regs[R_EAX] =3D rreg(cpu_state->hvf_fd, HV_X86_RAX); - env->regs[R_EBX] =3D rreg(cpu_state->hvf_fd, HV_X86_RBX); - env->regs[R_ECX] =3D rreg(cpu_state->hvf_fd, HV_X86_RCX); - env->regs[R_EDX] =3D rreg(cpu_state->hvf_fd, HV_X86_RDX); - env->regs[R_EBP] =3D rreg(cpu_state->hvf_fd, HV_X86_RBP); - env->regs[R_ESP] =3D rreg(cpu_state->hvf_fd, HV_X86_RSP); - env->regs[R_ESI] =3D rreg(cpu_state->hvf_fd, HV_X86_RSI); - env->regs[R_EDI] =3D rreg(cpu_state->hvf_fd, HV_X86_RDI); - env->regs[8] =3D rreg(cpu_state->hvf_fd, HV_X86_R8); - env->regs[9] =3D rreg(cpu_state->hvf_fd, HV_X86_R9); - env->regs[10] =3D rreg(cpu_state->hvf_fd, HV_X86_R10); - env->regs[11] =3D rreg(cpu_state->hvf_fd, HV_X86_R11); - env->regs[12] =3D rreg(cpu_state->hvf_fd, HV_X86_R12); - env->regs[13] =3D rreg(cpu_state->hvf_fd, HV_X86_R13); - env->regs[14] =3D rreg(cpu_state->hvf_fd, HV_X86_R14); - env->regs[15] =3D rreg(cpu_state->hvf_fd, HV_X86_R15); + env->regs[R_EAX] =3D rreg(hvf_fd, HV_X86_RAX); + env->regs[R_EBX] =3D rreg(hvf_fd, HV_X86_RBX); + env->regs[R_ECX] =3D rreg(hvf_fd, HV_X86_RCX); + env->regs[R_EDX] =3D rreg(hvf_fd, HV_X86_RDX); + env->regs[R_EBP] =3D rreg(hvf_fd, HV_X86_RBP); + env->regs[R_ESP] =3D rreg(hvf_fd, HV_X86_RSP); + env->regs[R_ESI] =3D rreg(hvf_fd, HV_X86_RSI); + env->regs[R_EDI] =3D rreg(hvf_fd, HV_X86_RDI); + env->regs[8] =3D rreg(hvf_fd, HV_X86_R8); + env->regs[9] =3D rreg(hvf_fd, HV_X86_R9); + env->regs[10] =3D rreg(hvf_fd, HV_X86_R10); + env->regs[11] =3D rreg(hvf_fd, HV_X86_R11); + env->regs[12] =3D rreg(hvf_fd, HV_X86_R12); + env->regs[13] =3D rreg(hvf_fd, HV_X86_R13); + env->regs[14] =3D rreg(hvf_fd, HV_X86_R14); + env->regs[15] =3D rreg(hvf_fd, HV_X86_R15); =20 - env->eflags =3D rreg(cpu_state->hvf_fd, HV_X86_RFLAGS); - env->eip =3D rreg(cpu_state->hvf_fd, HV_X86_RIP); + env->eflags =3D rreg(hvf_fd, HV_X86_RFLAGS); + env->eip =3D rreg(hvf_fd, HV_X86_RIP); =20 hvf_get_xsave(cpu_state); - env->xcr0 =3D rreg(cpu_state->hvf_fd, HV_X86_XCR0); + env->xcr0 =3D rreg(hvf_fd, HV_X86_XCR0); =20 hvf_get_segments(cpu_state); hvf_get_msrs(cpu_state); =20 - env->dr[0] =3D rreg(cpu_state->hvf_fd, HV_X86_DR0); - env->dr[1] =3D rreg(cpu_state->hvf_fd, HV_X86_DR1); - env->dr[2] =3D rreg(cpu_state->hvf_fd, HV_X86_DR2); - env->dr[3] =3D rreg(cpu_state->hvf_fd, HV_X86_DR3); - env->dr[4] =3D rreg(cpu_state->hvf_fd, HV_X86_DR4); - env->dr[5] =3D rreg(cpu_state->hvf_fd, HV_X86_DR5); - env->dr[6] =3D rreg(cpu_state->hvf_fd, HV_X86_DR6); - env->dr[7] =3D rreg(cpu_state->hvf_fd, HV_X86_DR7); + env->dr[0] =3D rreg(hvf_fd, HV_X86_DR0); + env->dr[1] =3D rreg(hvf_fd, HV_X86_DR1); + env->dr[2] =3D rreg(hvf_fd, HV_X86_DR2); + env->dr[3] =3D rreg(hvf_fd, HV_X86_DR3); + env->dr[4] =3D rreg(hvf_fd, HV_X86_DR4); + env->dr[5] =3D rreg(hvf_fd, HV_X86_DR5); + env->dr[6] =3D rreg(hvf_fd, HV_X86_DR6); + env->dr[7] =3D rreg(hvf_fd, HV_X86_DR7); =20 x86_update_hflags(env); return 0; @@ -351,6 +353,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) { X86CPU *x86cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &x86cpu->env; + hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; =20 uint8_t vector; uint64_t intr_type; @@ -379,7 +382,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) uint64_t info =3D 0; if (have_event) { info =3D vector | intr_type | VMCS_INTR_VALID; - uint64_t reason =3D rvmcs(cpu_state->hvf_fd, VMCS_EXIT_REASON); + uint64_t reason =3D rvmcs(hvf_fd, VMCS_EXIT_REASON); if (env->nmi_injected && reason !=3D EXIT_REASON_TASK_SWITCH) { vmx_clear_nmi_blocking(cpu_state); } @@ -388,17 +391,17 @@ bool hvf_inject_interrupts(CPUState *cpu_state) info &=3D ~(1 << 12); /* clear undefined bit */ if (intr_type =3D=3D VMCS_INTR_T_SWINTR || intr_type =3D=3D VMCS_INTR_T_SWEXCEPTION) { - wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INST_LENGTH, env->ins_= len); + wvmcs(hvf_fd, VMCS_ENTRY_INST_LENGTH, env->ins_len); } =20 if (env->has_error_code) { - wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_EXCEPTION_ERROR, + wvmcs(hvf_fd, VMCS_ENTRY_EXCEPTION_ERROR, env->error_code); /* Indicate that VMCS_ENTRY_EXCEPTION_ERROR is valid */ info |=3D VMCS_INTR_DEL_ERRCODE; } /*printf("reinject %lx err %d\n", info, err);*/ - wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); + wvmcs(hvf_fd, VMCS_ENTRY_INTR_INFO, info); }; } =20 @@ -406,7 +409,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state) if (!(env->hflags2 & HF2_NMI_MASK) && !(info & VMCS_INTR_VALID)) { cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_NMI; info =3D VMCS_INTR_VALID | VMCS_INTR_T_NMI | EXCP02_NMI; - wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); + wvmcs(hvf_fd, VMCS_ENTRY_INTR_INFO, info); } else { vmx_set_nmi_window_exiting(cpu_state); } @@ -418,8 +421,8 @@ bool hvf_inject_interrupts(CPUState *cpu_state) int line =3D cpu_get_pic_interrupt(&x86cpu->env); cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_HARD; if (line >=3D 0) { - wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, line | - VMCS_INTR_VALID | VMCS_INTR_T_HWINTR); + wvmcs(hvf_fd, VMCS_ENTRY_INTR_INFO, + line | VMCS_INTR_VALID | VMCS_INTR_T_HWINTR); } } if (cpu_state->interrupt_request & CPU_INTERRUPT_HARD) { --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795862; cv=none; d=zohomail.com; s=zohoarc; b=bTTk9DnTZ6+DaVPFNp+0kkseQpPxM5VVR7GBJJtcOIopDnFjJKukZJ5lmAaym4ldJ8RDfDATsCUfFXGgRha6i23cMQs7ZMLqzlHD78spstvfPC5HiCmYythH89F+xIfcozXBYCYFqGBNGPndptmL2+ANVXM9rnz05+MAXb3h3mE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795862; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=Ozgu7uGJ7L5oIFikBv6nOOwVLHj62DaXoZ2b5Z4gqKA=; b=YGzsKIEpxtRCy+B+rSzniOYbm4YkSh78mGdzPQslMr9yjvQP8OIx5mlahV+nLrEnFl7YbIKMQOdzUU8Y9BE0ds/Bc+OhQBO6EF0ckV5aDlrBEgHdcGVuFWrWP3UYsjbQt3r9pqZFVcr0uwruJOYwCc2JwG/PUC8iafvqcrjPjns= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795862833688.8341867422168; Wed, 3 Mar 2021 10:24:22 -0800 (PST) Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-107-zArxAULBOQSqA9hXW3z2dQ-1; Wed, 03 Mar 2021 13:24:20 -0500 Received: by mail-wr1-f71.google.com with SMTP id v13so12196794wrs.21 for ; Wed, 03 Mar 2021 10:24:20 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id j12sm23071093wrt.27.2021.03.03.10.24.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:24:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795861; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ozgu7uGJ7L5oIFikBv6nOOwVLHj62DaXoZ2b5Z4gqKA=; b=eRROB36nxre1q/C+O+tuJr9iTgxv5XXPzshSnlERuP6CeqOX6C0payV3fKrwdlaQnTlijl Q+vbpCA3IPyTVIuaxCiThKvTkKn+zLKPAiu7CoDwezG+j0venutafj1pifAVEEx03qwdBx zvSyajsL6HucxUAkesBne+Qy31aQ1M4= X-MC-Unique: zArxAULBOQSqA9hXW3z2dQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ozgu7uGJ7L5oIFikBv6nOOwVLHj62DaXoZ2b5Z4gqKA=; b=aemch/UJBB/SqhTUW5dCG+KD7+UZgacYakSFUg5HqmZsSpIvQePtbVU9NEUbyp9SbV PYYpMCaYd4rcWZaMVnSs9rQfM0d4gvORuHTa6K3KlWFKwWm58Q8lvHv4R+Y1pdgUXdrS aMm6GGW5VQup816JRGqe7Ook9vco+8LJSVyM3uvuw09Tz7ykzIr5bnIUM5H/Cc2GMKJP fJa4OeScQ2yFYEGKjwp4FRFOnGtlo9eYbNpItav7hpddyaWdFJ5dGMeVukiIhZjXMZC1 1MR4RF7D0vid4p1M3maxSDTts3tE6vl8qDLJIVtRzg+GJRnQZRS6rRqRqDWfQfU8xXa4 PTaw== X-Gm-Message-State: AOAM53080CvTUmrcF+K1//T1c8PQERgaJA7mIsLIlKUewlR6rP2Ziee5 pYUNXI+2MMmMJLvSGplNkx4UPuBWrxhso0xOUP/x7B+mQBs4tqo2H6CCK9SGe4uwC3RFVlADCSk 06TkG3hZfr+OYXQ== X-Received: by 2002:a1c:2403:: with SMTP id k3mr290764wmk.130.1614795859088; Wed, 03 Mar 2021 10:24:19 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+bwiGrhW1JytZf41VJLAQvq5kfy08h7D0p9N1gS+u3y7+Y378geBpKVUXOU+Y1nVBjdtymg== X-Received: by 2002:a1c:2403:: with SMTP id k3mr290721wmk.130.1614795858585; Wed, 03 Mar 2021 10:24:18 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 18/19] accel/hvf: Declare and allocate AccelvCPUState struct Date: Wed, 3 Mar 2021 19:22:18 +0100 Message-Id: <20210303182219.1631042-19-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) In preparation of moving HVF-specific fields from CPUState to the accelerator-specific AccelvCPUState structure, first declare it empty and allocate it. This will make the following commits easier to review. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/hvf/hvf-i386.h | 3 +++ target/i386/hvf/hvf.c | 4 +++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h index 59cfca8875e..1f12eb647a0 100644 --- a/target/i386/hvf/hvf-i386.h +++ b/target/i386/hvf/hvf-i386.h @@ -51,6 +51,9 @@ struct HVFState { }; extern HVFState *hvf_state; =20 +struct AccelvCPUState { +}; + void hvf_set_phys_mem(MemoryRegionSection *, bool); void hvf_handle_io(CPUArchState *, uint16_t, void *, int, int, int); hvf_slot *hvf_find_overlap_slot(uint64_t, uint64_t); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index effee39ee9b..342659f1e15 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -451,6 +451,7 @@ void hvf_vcpu_destroy(CPUState *cpu) hv_return_t ret =3D hv_vcpu_destroy((hv_vcpuid_t)cpu->hvf_fd); g_free(env->hvf_mmio_buf); assert_hvf_ok(ret); + g_free(cpu->accel_vcpu); } =20 static void dummy_signal(int sig) @@ -534,9 +535,10 @@ int hvf_init_vcpu(CPUState *cpu) } =20 r =3D hv_vcpu_create(&hvf_fd, HV_VCPU_DEFAULT); - cpu->vcpu_dirty =3D true; assert_hvf_ok(r); + cpu->accel_vcpu =3D g_new(struct AccelvCPUState, 1); cpu->hvf_fd =3D (int)hvf_fd + cpu->vcpu_dirty =3D true; =20 if (hv_vmx_read_capability(HV_VMX_CAP_PINBASED, &hvf_state->hvf_caps->vmx_cap_pinbased)) { --=20 2.26.2 From nobody Fri May 17 10:44:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1614795875; cv=none; d=zohomail.com; s=zohoarc; b=ggo4NSwTpcbJR7ZW3vJ9Z6a4Q+vJuQ2pkh9DJBJ83Yaakamm/XLu/TFx/cY6gjL4OzZgMZpjxedztRe5jMkQiCX1KkLC4r1FWB88L4koaAEcHM7aMqHJ+X18XxrZ8JJYn7GLjRlk1B78Bt3TEv5Ju3ETHPm2iOsk21D9tfzPCEA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614795875; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=ghbrUZ4fIl9iFqhQfoGEU/zQLVSUujkFo/gkjqoyoig=; b=nCnNreZdSiei4j9iXTFX83ZX5cldiKmnpcYOQJkDI44jllKG8v9CGbgJqGsc303A1pqnwXGu+69TUoVl/mNIomE22e7eCvYKasP26lzR8nbptDw431iwwp4qXL4kwe/+RI8C62CxqisFKC83rC1WCSLiWwp2ZX8RbHeTiHknAr4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1614795875217301.33317810875974; Wed, 3 Mar 2021 10:24:35 -0800 (PST) Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-265-rJcxjqG1O5upPnL2B9I6Gw-1; Wed, 03 Mar 2021 13:24:32 -0500 Received: by mail-wm1-f70.google.com with SMTP id z26so3393846wml.4 for ; Wed, 03 Mar 2021 10:24:31 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id p6sm19168637wru.2.2021.03.03.10.24.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 10:24:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1614795874; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ghbrUZ4fIl9iFqhQfoGEU/zQLVSUujkFo/gkjqoyoig=; b=NA0gQdTBkrjgnYIkHuX+Fv3t/gJzJjZZ/4kEjFhADBle0OS3ydD2Q2hIXGUZyqha2YAeQa QIccOZN5Y0wap+5dxdfqqX6Hqbhor5Dc12qskqRxfb1lM4207pO45PiBB/n0uO1qyO8SSK 9cqa0+Yv7uN/DllB8TWSCeogXolXRSI= X-MC-Unique: rJcxjqG1O5upPnL2B9I6Gw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ghbrUZ4fIl9iFqhQfoGEU/zQLVSUujkFo/gkjqoyoig=; b=aTdRvT9EEKP7ma4EgahI09XeL3hShJe7lo0ctORbDASB1BhIkepaH5926QTdN1MYg1 eWQNusBNxd2i6/3aOCBNuuZZolfwGXDUru2BTU8j9hb4Z+hGJvItsmFyFobInRKp7IH5 2NTk7i5CCyiJmg9sP4LIUMy49FiMMEYmyp7LJ+fucS7VsXGAC6NPxRyWA2efBgVLVfmH dr3pb4/m0VHdRa+EzS4A28RHEW05zf6h0voZRd6syvPdQpIouS0YAQPq/b7IdVFLpWmG ree9N3aKpIrl2mhF4OQi9Jl/GHujZhaVaT5fns3PemANMK4Q8fpqvFrbOPaz4Ortltl0 dtXw== X-Gm-Message-State: AOAM533XAqq+gY6aEbeQsw6zJHwWFUKO5C9H3BF9/6UMbDNjpq3XkuZl +dCwAFxKxxHQh6/mCCRyM+J0B5u0GeA4hI2Im0k26yuRZbrGuRsaPTTydB4v4fiu3CJHZBPPUhV ny/LOmjkPMXLt9A== X-Received: by 2002:a1c:4e07:: with SMTP id g7mr270804wmh.29.1614795870019; Wed, 03 Mar 2021 10:24:30 -0800 (PST) X-Google-Smtp-Source: ABdhPJxy5yGsVkSbOtOt430gsXEGatm965cb95l6wAPlETjCXm0O71i55yGVkWF1cWjLgsw0RKx7+g== X-Received: by 2002:a1c:4e07:: with SMTP id g7mr270785wmh.29.1614795869699; Wed, 03 Mar 2021 10:24:29 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Cornelia Huck , Richard Henderson , Sunil Muthuswamy , Marcelo Tosatti , David Gibson , Marcel Apfelbaum , kvm@vger.kernel.org, Wenchao Wang , Thomas Huth , Cameron Esfahani , Paolo Bonzini , David Hildenbrand , Roman Bolshakov , Peter Maydell , Greg Kurz , qemu-arm@nongnu.org, Halil Pasic , Colin Xu , Claudio Fontana , qemu-ppc@nongnu.org, Christian Borntraeger , qemu-s390x@nongnu.org, haxm-team@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 19/19] accel/hvf: Move the 'hvf_fd' field to AccelvCPUState Date: Wed, 3 Mar 2021 19:22:19 +0100 Message-Id: <20210303182219.1631042-20-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303182219.1631042-1-philmd@redhat.com> References: <20210303182219.1631042-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Move the 'hvf_fd' field from CPUState to AccelvCPUState, and declare it with its correct type: hv_vcpuid_t. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 1 - target/i386/hvf/hvf-i386.h | 1 + target/i386/hvf/vmx.h | 28 +++++++++-------- target/i386/hvf/hvf.c | 23 +++++++------- target/i386/hvf/x86.c | 28 ++++++++--------- target/i386/hvf/x86_descr.c | 17 +++++----- target/i386/hvf/x86_emu.c | 62 ++++++++++++++++++------------------- target/i386/hvf/x86_mmu.c | 4 +-- target/i386/hvf/x86_task.c | 14 +++++---- target/i386/hvf/x86hvf.c | 32 ++++++++++--------- 10 files changed, 110 insertions(+), 100 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 3268f1393f1..69a456415c0 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -415,7 +415,6 @@ struct CPUState { =20 /* Accelerator-specific fields. */ struct AccelvCPUState *accel_vcpu; - int hvf_fd; /* shared by kvm, hax and hvf */ bool vcpu_dirty; =20 diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h index 1f12eb647a0..e17f9f42c0e 100644 --- a/target/i386/hvf/hvf-i386.h +++ b/target/i386/hvf/hvf-i386.h @@ -52,6 +52,7 @@ struct HVFState { extern HVFState *hvf_state; =20 struct AccelvCPUState { + hv_vcpuid_t hvf_fd; }; =20 void hvf_set_phys_mem(MemoryRegionSection *, bool); diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index 24c4cdf0be0..bed94856268 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -179,15 +179,15 @@ static inline void macvm_set_rip(CPUState *cpu, uint6= 4_t rip) uint64_t val; =20 /* BUG, should take considering overlap.. */ - wreg(cpu->hvf_fd, HV_X86_RIP, rip); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RIP, rip); env->eip =3D rip; =20 /* after moving forward in rip, we need to clean INTERRUPTABILITY */ - val =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY); if (val & (VMCS_INTERRUPTIBILITY_STI_BLOCKING | VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)) { env->hflags &=3D ~HF_INHIBIT_IRQ_MASK; - wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, val & ~(VMCS_INTERRUPTIBILITY_STI_BLOCKING | VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)); } @@ -199,9 +199,10 @@ static inline void vmx_clear_nmi_blocking(CPUState *cp= u) CPUX86State *env =3D &x86_cpu->env; =20 env->hflags2 &=3D ~HF2_NMI_MASK; - uint32_t gi =3D (uint32_t) rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBIL= ITY); + uint32_t gi =3D (uint32_t) rvmcs(cpu->accel_vcpu->hvf_fd, + VMCS_GUEST_INTERRUPTIBILITY); gi &=3D ~VMCS_INTERRUPTIBILITY_NMI_BLOCKING; - wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, gi); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, gi); } =20 static inline void vmx_set_nmi_blocking(CPUState *cpu) @@ -210,17 +211,18 @@ static inline void vmx_set_nmi_blocking(CPUState *cpu) CPUX86State *env =3D &x86_cpu->env; =20 env->hflags2 |=3D HF2_NMI_MASK; - uint32_t gi =3D (uint32_t)rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILI= TY); + uint32_t gi =3D (uint32_t)rvmcs(cpu->accel_vcpu->hvf_fd, + VMCS_GUEST_INTERRUPTIBILITY); gi |=3D VMCS_INTERRUPTIBILITY_NMI_BLOCKING; - wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, gi); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, gi); } =20 static inline void vmx_set_nmi_window_exiting(CPUState *cpu) { uint64_t val; - val =3D rvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); - wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | - VMCS_PRI_PROC_BASED_CTLS_NMI_WINDOW_EXITING); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, + val | VMCS_PRI_PROC_BASED_CTLS_NMI_WINDOW_EXITING); =20 } =20 @@ -228,9 +230,9 @@ static inline void vmx_clear_nmi_window_exiting(CPUStat= e *cpu) { =20 uint64_t val; - val =3D rvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); - wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val & - ~VMCS_PRI_PROC_BASED_CTLS_NMI_WINDOW_EXITING); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, + val & ~VMCS_PRI_PROC_BASED_CTLS_NMI_WINDOW_EXITING); } =20 #endif diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 342659f1e15..022975d093e 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -245,19 +245,19 @@ void vmx_update_tpr(CPUState *cpu) int tpr =3D cpu_get_apic_tpr(x86_cpu->apic_state) << 4; int irr =3D apic_get_highest_priority_irr(x86_cpu->apic_state); =20 - wreg(cpu->hvf_fd, HV_X86_TPR, tpr); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_TPR, tpr); if (irr =3D=3D -1) { - wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, 0); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_TPR_THRESHOLD, 0); } else { - wvmcs(cpu->hvf_fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : - irr >> 4); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_TPR_THRESHOLD, + (irr > tpr) ? tpr >> 4 : irr >> 4); } } =20 static void update_apic_tpr(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); - int tpr =3D rreg(cpu->hvf_fd, HV_X86_TPR) >> 4; + int tpr =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_TPR) >> 4; cpu_set_apic_tpr(x86_cpu->apic_state, tpr); } =20 @@ -448,7 +448,7 @@ void hvf_vcpu_destroy(CPUState *cpu) X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; =20 - hv_return_t ret =3D hv_vcpu_destroy((hv_vcpuid_t)cpu->hvf_fd); + hv_return_t ret =3D hv_vcpu_destroy(cpu->accel_vcpu->hvf_fd); g_free(env->hvf_mmio_buf); assert_hvf_ok(ret); g_free(cpu->accel_vcpu); @@ -537,7 +537,7 @@ int hvf_init_vcpu(CPUState *cpu) r =3D hv_vcpu_create(&hvf_fd, HV_VCPU_DEFAULT); assert_hvf_ok(r); cpu->accel_vcpu =3D g_new(struct AccelvCPUState, 1); - cpu->hvf_fd =3D (int)hvf_fd + cpu->accel_vcpu->hvf_fd =3D hvf_fd cpu->vcpu_dirty =3D true; =20 if (hv_vmx_read_capability(HV_VMX_CAP_PINBASED, @@ -635,16 +635,17 @@ static void hvf_store_events(CPUState *cpu, uint32_t = ins_len, uint64_t idtvec_in } if (idtvec_info & VMCS_IDT_VEC_ERRCODE_VALID) { env->has_error_code =3D true; - env->error_code =3D rvmcs(cpu->hvf_fd, VMCS_IDT_VECTORING_ERRO= R); + env->error_code =3D rvmcs(cpu->accel_vcpu->hvf_fd, + VMCS_IDT_VECTORING_ERROR); } } - if ((rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY) & + if ((rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY) & VMCS_INTERRUPTIBILITY_NMI_BLOCKING)) { env->hflags2 |=3D HF2_NMI_MASK; } else { env->hflags2 &=3D ~HF2_NMI_MASK; } - if (rvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY) & + if (rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY) & (VMCS_INTERRUPTIBILITY_STI_BLOCKING | VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING)) { env->hflags |=3D HF_INHIBIT_IRQ_MASK; @@ -699,7 +700,7 @@ int hvf_vcpu_exec(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; int ret =3D 0; uint64_t rip =3D 0; =20 diff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c index cd045183a81..23fbdb91eb0 100644 --- a/target/i386/hvf/x86.c +++ b/target/i386/hvf/x86.c @@ -62,11 +62,11 @@ bool x86_read_segment_descriptor(struct CPUState *cpu, } =20 if (GDT_SEL =3D=3D sel.ti) { - base =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_GDTR_BASE); - limit =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_GDTR_LIMIT); + base =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_GDTR_BASE); + limit =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_GDTR_LIMIT); } else { - base =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_BASE); - limit =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_LIMIT); + base =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_LDTR_BASE); + limit =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_LDTR_LIMIT); } =20 if (sel.index * 8 >=3D limit) { @@ -85,11 +85,11 @@ bool x86_write_segment_descriptor(struct CPUState *cpu, uint32_t limit; =20 if (GDT_SEL =3D=3D sel.ti) { - base =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_GDTR_BASE); - limit =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_GDTR_LIMIT); + base =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_GDTR_BASE); + limit =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_GDTR_LIMIT); } else { - base =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_BASE); - limit =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_LDTR_LIMIT); + base =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_LDTR_BASE); + limit =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_LDTR_LIMIT); } =20 if (sel.index * 8 >=3D limit) { @@ -103,8 +103,8 @@ bool x86_write_segment_descriptor(struct CPUState *cpu, bool x86_read_call_gate(struct CPUState *cpu, struct x86_call_gate *idt_de= sc, int gate) { - target_ulong base =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_IDTR_BASE); - uint32_t limit =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_IDTR_LIMIT); + target_ulong base =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_IDTR_= BASE); + uint32_t limit =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_IDTR_LIMI= T); =20 memset(idt_desc, 0, sizeof(*idt_desc)); if (gate * 8 >=3D limit) { @@ -118,7 +118,7 @@ bool x86_read_call_gate(struct CPUState *cpu, struct x8= 6_call_gate *idt_desc, =20 bool x86_is_protected(struct CPUState *cpu) { - uint64_t cr0 =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_CR0); + uint64_t cr0 =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR0); return cr0 & CR0_PE; } =20 @@ -136,7 +136,7 @@ bool x86_is_v8086(struct CPUState *cpu) =20 bool x86_is_long_mode(struct CPUState *cpu) { - return rvmcs(cpu->hvf_fd, VMCS_GUEST_IA32_EFER) & MSR_EFER_LMA; + return rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_IA32_EFER) & MSR_EFER= _LMA; } =20 bool x86_is_long64_mode(struct CPUState *cpu) @@ -149,13 +149,13 @@ bool x86_is_long64_mode(struct CPUState *cpu) =20 bool x86_is_paging_mode(struct CPUState *cpu) { - uint64_t cr0 =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_CR0); + uint64_t cr0 =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR0); return cr0 & CR0_PG; } =20 bool x86_is_pae_enabled(struct CPUState *cpu) { - uint64_t cr4 =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_CR4); + uint64_t cr4 =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR4); return cr4 & CR4_PAE; } =20 diff --git a/target/i386/hvf/x86_descr.c b/target/i386/hvf/x86_descr.c index 1c6220baa0d..4f716cc5942 100644 --- a/target/i386/hvf/x86_descr.c +++ b/target/i386/hvf/x86_descr.c @@ -48,34 +48,37 @@ static const struct vmx_segment_field { =20 uint32_t vmx_read_segment_limit(CPUState *cpu, X86Seg seg) { - return (uint32_t)rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].limit); + return (uint32_t)rvmcs(cpu->accel_vcpu->hvf_fd, + vmx_segment_fields[seg].limit); } =20 uint32_t vmx_read_segment_ar(CPUState *cpu, X86Seg seg) { - return (uint32_t)rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].ar_bytes); + return (uint32_t)rvmcs(cpu->accel_vcpu->hvf_fd, + vmx_segment_fields[seg].ar_bytes); } =20 uint64_t vmx_read_segment_base(CPUState *cpu, X86Seg seg) { - return rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].base); + return rvmcs(cpu->accel_vcpu->hvf_fd, vmx_segment_fields[seg].base); } =20 x68_segment_selector vmx_read_segment_selector(CPUState *cpu, X86Seg seg) { x68_segment_selector sel; - sel.sel =3D rvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector); + sel.sel =3D rvmcs(cpu->accel_vcpu->hvf_fd, vmx_segment_fields[seg].sel= ector); return sel; } =20 void vmx_write_segment_selector(struct CPUState *cpu, x68_segment_selector= selector, X86Seg seg) { - wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); + wvmcs(cpu->accel_vcpu->hvf_fd, vmx_segment_fields[seg].selector, + selector.sel); } =20 void vmx_read_segment_descriptor(struct CPUState *cpu, struct vmx_segment = *desc, X86Seg seg) { - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; =20 desc->sel =3D rvmcs(hvf_fd, vmx_segment_fields[seg].selector); desc->base =3D rvmcs(hvf_fd, vmx_segment_fields[seg].base); @@ -86,7 +89,7 @@ void vmx_read_segment_descriptor(struct CPUState *cpu, st= ruct vmx_segment *desc, void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc,= X86Seg seg) { const struct vmx_segment_field *sf =3D &vmx_segment_fields[seg]; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; =20 wvmcs(hvf_fd, sf->base, desc->base); wvmcs(hvf_fd, sf->limit, desc->limit); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index e52c39ddb1f..dd7dee6f880 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -674,7 +674,7 @@ void simulate_rdmsr(struct CPUState *cpu) =20 switch (msr) { case MSR_IA32_TSC: - val =3D rdtscp() + rvmcs(cpu->hvf_fd, VMCS_TSC_OFFSET); + val =3D rdtscp() + rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_TSC_OFFSET); break; case MSR_IA32_APICBASE: val =3D cpu_get_apic_base(X86_CPU(cpu)->apic_state); @@ -683,16 +683,16 @@ void simulate_rdmsr(struct CPUState *cpu) val =3D x86_cpu->ucode_rev; break; case MSR_EFER: - val =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_IA32_EFER); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_IA32_EFER); break; case MSR_FSBASE: - val =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_FS_BASE); break; case MSR_GSBASE: - val =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_GS_BASE); break; case MSR_KERNELGSBASE: - val =3D rvmcs(cpu->hvf_fd, VMCS_HOST_FS_BASE); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_HOST_FS_BASE); break; case MSR_STAR: abort(); @@ -780,13 +780,13 @@ void simulate_wrmsr(struct CPUState *cpu) cpu_set_apic_base(X86_CPU(cpu)->apic_state, data); break; case MSR_FSBASE: - wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, data); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_FS_BASE, data); break; case MSR_GSBASE: - wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, data); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_GS_BASE, data); break; case MSR_KERNELGSBASE: - wvmcs(cpu->hvf_fd, VMCS_HOST_FS_BASE, data); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_HOST_FS_BASE, data); break; case MSR_STAR: abort(); @@ -799,9 +799,9 @@ void simulate_wrmsr(struct CPUState *cpu) break; case MSR_EFER: /*printf("new efer %llx\n", EFER(cpu));*/ - wvmcs(cpu->hvf_fd, VMCS_GUEST_IA32_EFER, data); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_IA32_EFER, data); if (data & MSR_EFER_NXE) { - hv_vcpu_invalidate_tlb(cpu->hvf_fd); + hv_vcpu_invalidate_tlb(cpu->accel_vcpu->hvf_fd); } break; case MSR_MTRRphysBase(0): @@ -1425,21 +1425,21 @@ void load_regs(struct CPUState *cpu) CPUX86State *env =3D &x86_cpu->env; =20 int i =3D 0; - RRX(env, R_EAX) =3D rreg(cpu->hvf_fd, HV_X86_RAX); - RRX(env, R_EBX) =3D rreg(cpu->hvf_fd, HV_X86_RBX); - RRX(env, R_ECX) =3D rreg(cpu->hvf_fd, HV_X86_RCX); - RRX(env, R_EDX) =3D rreg(cpu->hvf_fd, HV_X86_RDX); - RRX(env, R_ESI) =3D rreg(cpu->hvf_fd, HV_X86_RSI); - RRX(env, R_EDI) =3D rreg(cpu->hvf_fd, HV_X86_RDI); - RRX(env, R_ESP) =3D rreg(cpu->hvf_fd, HV_X86_RSP); - RRX(env, R_EBP) =3D rreg(cpu->hvf_fd, HV_X86_RBP); + RRX(env, R_EAX) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RAX); + RRX(env, R_EBX) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RBX); + RRX(env, R_ECX) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RCX); + RRX(env, R_EDX) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RDX); + RRX(env, R_ESI) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RSI); + RRX(env, R_EDI) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RDI); + RRX(env, R_ESP) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RSP); + RRX(env, R_EBP) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RBP); for (i =3D 8; i < 16; i++) { - RRX(env, i) =3D rreg(cpu->hvf_fd, HV_X86_RAX + i); + RRX(env, i) =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RAX + i); } =20 - env->eflags =3D rreg(cpu->hvf_fd, HV_X86_RFLAGS); + env->eflags =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RFLAGS); rflags_to_lflags(env); - env->eip =3D rreg(cpu->hvf_fd, HV_X86_RIP); + env->eip =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RIP); } =20 void store_regs(struct CPUState *cpu) @@ -1448,20 +1448,20 @@ void store_regs(struct CPUState *cpu) CPUX86State *env =3D &x86_cpu->env; =20 int i =3D 0; - wreg(cpu->hvf_fd, HV_X86_RAX, RAX(env)); - wreg(cpu->hvf_fd, HV_X86_RBX, RBX(env)); - wreg(cpu->hvf_fd, HV_X86_RCX, RCX(env)); - wreg(cpu->hvf_fd, HV_X86_RDX, RDX(env)); - wreg(cpu->hvf_fd, HV_X86_RSI, RSI(env)); - wreg(cpu->hvf_fd, HV_X86_RDI, RDI(env)); - wreg(cpu->hvf_fd, HV_X86_RBP, RBP(env)); - wreg(cpu->hvf_fd, HV_X86_RSP, RSP(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RAX, RAX(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RBX, RBX(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RCX, RCX(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RDX, RDX(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RSI, RSI(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RDI, RDI(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RBP, RBP(env)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RSP, RSP(env)); for (i =3D 8; i < 16; i++) { - wreg(cpu->hvf_fd, HV_X86_RAX + i, RRX(env, i)); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RAX + i, RRX(env, i)); } =20 lflags_to_rflags(env); - wreg(cpu->hvf_fd, HV_X86_RFLAGS, env->eflags); + wreg(cpu->accel_vcpu->hvf_fd, HV_X86_RFLAGS, env->eflags); macvm_set_rip(cpu, env->eip); } =20 diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index 882a6237eea..deb3608f2be 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -128,7 +128,7 @@ static bool test_pt_entry(struct CPUState *cpu, struct = gpt_translation *pt, pt->err_code |=3D MMU_PAGE_PT; } =20 - uint32_t cr0 =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_CR0); + uint32_t cr0 =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR0); /* check protection */ if (cr0 & CR0_WP) { if (pt->write_access && !pte_write_access(pte)) { @@ -173,7 +173,7 @@ static bool walk_gpt(struct CPUState *cpu, target_ulong= addr, int err_code, { int top_level, level; bool is_large =3D false; - target_ulong cr3 =3D rvmcs(cpu->hvf_fd, VMCS_GUEST_CR3); + target_ulong cr3 =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR3); uint64_t page_mask =3D pae ? PAE_PTE_PAGE_MASK : LEGACY_PTE_PAGE_MASK; =20 memset(pt, 0, sizeof(*pt)); diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c index d66dfd76690..baa4c5ca87e 100644 --- a/target/i386/hvf/x86_task.c +++ b/target/i386/hvf/x86_task.c @@ -62,7 +62,7 @@ static void load_state_from_tss32(CPUState *cpu, struct x= 86_tss_segment32 *tss) X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; =20 - wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, tss->cr3); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR3, tss->cr3); =20 env->eip =3D tss->eip; env->eflags =3D tss->eflags | 2; @@ -111,11 +111,12 @@ static int task_switch_32(CPUState *cpu, x68_segment_= selector tss_sel, x68_segme =20 void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, i= nt reason, bool gate_valid, uint8_t gate, uint64_t gate_type) { - uint64_t rip =3D rreg(cpu->hvf_fd, HV_X86_RIP); + uint64_t rip =3D rreg(cpu->accel_vcpu->hvf_fd, HV_X86_RIP); if (!gate_valid || (gate_type !=3D VMCS_INTR_T_HWEXCEPTION && gate_type !=3D VMCS_INTR_T_HWINTR && gate_type !=3D VMCS_INTR_T_NMI)) { - int ins_len =3D rvmcs(cpu->hvf_fd, VMCS_EXIT_INSTRUCTION_LENGTH); + int ins_len =3D rvmcs(cpu->accel_vcpu->hvf_fd, + VMCS_EXIT_INSTRUCTION_LENGTH); macvm_set_rip(cpu, rip + ins_len); return; } @@ -174,12 +175,13 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segmen= t_selector tss_sel, int rea //ret =3D task_switch_16(cpu, tss_sel, old_tss_sel, old_tss_base, = &next_tss_desc); VM_PANIC("task_switch_16"); =20 - macvm_set_cr0(cpu->hvf_fd, rvmcs(cpu->hvf_fd, VMCS_GUEST_CR0) | CR0_TS= ); + macvm_set_cr0(cpu->accel_vcpu->hvf_fd, + rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_GUEST_CR0) | CR0_TS); x86_segment_descriptor_to_vmx(cpu, tss_sel, &next_tss_desc, &vmx_seg); vmx_write_segment_descriptor(cpu, &vmx_seg, R_TR); =20 store_regs(cpu); =20 - hv_vcpu_invalidate_tlb(cpu->hvf_fd); - hv_vcpu_flush(cpu->hvf_fd); + hv_vcpu_invalidate_tlb(cpu->accel_vcpu->hvf_fd); + hv_vcpu_flush(cpu->accel_vcpu->hvf_fd); } diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index 2f291f2ad53..c68400b9729 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -81,7 +81,8 @@ void hvf_put_xsave(CPUState *cpu_state) =20 x86_cpu_xsave_all_areas(X86_CPU(cpu_state), xsave); =20 - if (hv_vcpu_write_fpstate(cpu_state->hvf_fd, (void*)xsave, 4096)) { + if (hv_vcpu_write_fpstate(cpu_state->accel_vcpu->hvf_fd, + (void *)xsave, 4096)) { abort(); } } @@ -89,7 +90,7 @@ void hvf_put_xsave(CPUState *cpu_state) void hvf_put_segments(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; struct vmx_segment seg; =20 wvmcs(hvf_fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); @@ -136,7 +137,7 @@ void hvf_put_segments(CPUState *cpu_state) void hvf_put_msrs(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; =20 hv_vcpu_write_msr(hvf_fd, MSR_IA32_SYSENTER_CS, env->sysenter_cs); hv_vcpu_write_msr(hvf_fd, MSR_IA32_SYSENTER_ESP, env->sysenter_esp); @@ -162,7 +163,8 @@ void hvf_get_xsave(CPUState *cpu_state) =20 xsave =3D X86_CPU(cpu_state)->env.xsave_buf; =20 - if (hv_vcpu_read_fpstate(cpu_state->hvf_fd, (void*)xsave, 4096)) { + if (hv_vcpu_read_fpstate(cpu_state->accel_vcpu->hvf_fd, + (void *)xsave, 4096)) { abort(); } =20 @@ -172,7 +174,7 @@ void hvf_get_xsave(CPUState *cpu_state) void hvf_get_segments(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; struct vmx_segment seg; =20 env->interrupt_injected =3D -1; @@ -217,7 +219,7 @@ void hvf_get_segments(CPUState *cpu_state) void hvf_get_msrs(CPUState *cpu_state) { CPUX86State *env =3D &X86_CPU(cpu_state)->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; uint64_t tmp; =20 hv_vcpu_read_msr(hvf_fd, MSR_IA32_SYSENTER_CS, &tmp); @@ -247,7 +249,7 @@ int hvf_put_registers(CPUState *cpu_state) { X86CPU *x86cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &x86cpu->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; =20 wreg(hvf_fd, HV_X86_RAX, env->regs[R_EAX]); wreg(hvf_fd, HV_X86_RBX, env->regs[R_EBX]); @@ -292,7 +294,7 @@ int hvf_get_registers(CPUState *cpu_state) { X86CPU *x86cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &x86cpu->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; =20 env->regs[R_EAX] =3D rreg(hvf_fd, HV_X86_RAX); env->regs[R_EBX] =3D rreg(hvf_fd, HV_X86_RBX); @@ -336,24 +338,24 @@ int hvf_get_registers(CPUState *cpu_state) static void vmx_set_int_window_exiting(CPUState *cpu) { uint64_t val; - val =3D rvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); - wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | VMCS_PRI_PROC_BASED_CTLS_INT_WINDOW_EXITING); } =20 void vmx_clear_int_window_exiting(CPUState *cpu) { uint64_t val; - val =3D rvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); - wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val & - ~VMCS_PRI_PROC_BASED_CTLS_INT_WINDOW_EXITING); + val =3D rvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS); + wvmcs(cpu->accel_vcpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS,\ + val & ~VMCS_PRI_PROC_BASED_CTLS_INT_WINDOW_EXITING); } =20 bool hvf_inject_interrupts(CPUState *cpu_state) { X86CPU *x86cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &x86cpu->env; - hv_vcpuid_t hvf_fd =3D (hv_vcpuid_t)cpu_state->hvf_fd; + hv_vcpuid_t hvf_fd =3D cpu_state->accel_vcpu->hvf_fd; =20 uint8_t vector; uint64_t intr_type; @@ -437,7 +439,7 @@ int hvf_process_events(CPUState *cpu_state) X86CPU *cpu =3D X86_CPU(cpu_state); CPUX86State *env =3D &cpu->env; =20 - env->eflags =3D rreg(cpu_state->hvf_fd, HV_X86_RFLAGS); + env->eflags =3D rreg(cpu_state->accel_vcpu->hvf_fd, HV_X86_RFLAGS); =20 if (cpu_state->interrupt_request & CPU_INTERRUPT_INIT) { hvf_cpu_synchronize_state(cpu_state); --=20 2.26.2