From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708149; cv=none; d=zohomail.com; s=zohoarc; b=W24cBSb5srOogSS4D5Y8g73GhyIIOdTvawOgYfLPeGYGu//KRXl6+xsbBNXYLbDAJLyVg3U1gA6RlFy4Pb2OsWiAaVtekZqfyN5mjMajOWiEkSogZen4/diCS4a+NCKeA0XQ0GGAJhf182XQGTLBgZEuQaC+qwFT6ItgV0uL3M0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708149; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CuWrYyiZWdulIwmEpBK4yxV1iSuukhkkcBuC0p9tN6M=; b=J70Gs3ps7HY1Oo5ejNPxsmjG1rX/391E8boEfoY9dS89gPQnjO6LDauO1aoW1DiZ9iFR6MhHnx6afbJdLyERwhF3PBAgceETgB8CJzCkN1yYktnv7ic/Lpx6mRkx7KUtMNxbI2qV6uDgU+eOrJdwTMD/sk2ky7GglDKF6UIeJLU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708149400834.4981670843314; Tue, 2 Mar 2021 10:02:29 -0800 (PST) Received: from localhost ([::1]:40402 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9Ln-00007f-TK for importer@patchew.org; Tue, 02 Mar 2021 13:02:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59130) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HI-0002Kk-Hl for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:48 -0500 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]:45615) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HF-0007X9-JV for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:48 -0500 Received: by mail-pg1-x534.google.com with SMTP id p21so14332455pgl.12 for ; Tue, 02 Mar 2021 09:57:45 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CuWrYyiZWdulIwmEpBK4yxV1iSuukhkkcBuC0p9tN6M=; b=j7pwJAs7XIWGymdfrKSn7smaK5U52izSRh/1t7Fs4ajIGttuIGUBa8Mupsxug+wqVs ECBj5n0+X8p6V8BacYQYH3C1rgUSk6vcDZ6XseA6MnRJvV9ZzDUFLcollPKHCb94wGFv 6xc8Kyfxcj0CDwEM+IVeh4UKTETHTvvsnmxBtdzKiMLQrE98hcEdGeTAD+gNQKHolK5y cLAeJL8AKvzP+UNF0SbCf51EdRdW7vgsNCeVOKr5HDdoaw+FqOYyb4gmUPUDXk8W+kiD eEjRwpx7RpW7Ci+Eij6dTwc4cFFW+RDuzeFJ/mycBafnL0JDa+Ee4bLIekQ8xqsNpBdI udVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CuWrYyiZWdulIwmEpBK4yxV1iSuukhkkcBuC0p9tN6M=; b=HKbKwxiUHzmsAkdPZng4V2bpQ4raGQF3elHKQ8uJOkR+LwpuaEy8sI7od4YTffRKuw jME3S9cX4enxLeEt0UNEsoVqlABJFYTB6INu3LebxNZTe6WNUBz8/RGLuY7pGhLKVeZh 0sB5sN5UlMiclYs2kP8SO7NXw2WFInl5wzIBgRwZsqXkv/ciaSLBiv6KRCJXJL8JDKTK 4/KBwKfIjzPeDefFsxC90miuKYlEU5XbAYB0Zsod7XKa8/ofTR/ClSoxOMGfUa9fnhWw EJ0S2vy0lO/BUn1UdrQN7CM0QX07tsTjGfC8oI5qeLCj0V3FIm9stKLAs2evMpYBhaAU OsLA== X-Gm-Message-State: AOAM532BKAgQTa5UeAjgx+0lji/m9SvEA5wsaElCa5Pu4GTFLbK2R9+s bAK5RD0p8CyHUJTKGbeoXOOT3HUcZ+6YSg== X-Google-Smtp-Source: ABdhPJw9nB4YwO7/b9Fl1HOCrjLSk/tFqI7x6cIQU9Pm6mhqRuykI3zD9QiyhGyEHWFNxjXQD6cauQ== X-Received: by 2002:a63:755:: with SMTP id 82mr1826573pgh.75.1614707864233; Tue, 02 Mar 2021 09:57:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 01/27] tcg/aarch64: Fix constant subtraction in tcg_out_addsub2 Date: Tue, 2 Mar 2021 09:57:15 -0800 Message-Id: <20210302175741.1079851-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" An hppa guest executing 0x000000000000e05c: ldil L%10000,r4 0x000000000000e060: ldo 0(r4),r4 0x000000000000e064: sub r3,r4,sp produces ---- 000000000000e064 000000000000e068 sub2_i32 tmp0,tmp4,r3,$0x1,$0x10000,$0x0 after folding and constant propagation. Then we hit tcg-target.c.inc:640: tcg_out_insn_3401: Assertion `aimm <=3D 0xfff' failed. because aimm is in fact -16, but unsigned. The ((bl < 0) ^ sub) condition which negates bl is incorrect and will always lead to this abort. If the constant is positive, sub will make it negative; if the constant is negative, sub will keep it negative. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 1376cdc404..ec0a86d9d8 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1410,10 +1410,10 @@ static void tcg_out_addsubi(TCGContext *s, int ext,= TCGReg rd, } } =20 -static inline void tcg_out_addsub2(TCGContext *s, TCGType ext, TCGReg rl, - TCGReg rh, TCGReg al, TCGReg ah, - tcg_target_long bl, tcg_target_long bh, - bool const_bl, bool const_bh, bool sub) +static void tcg_out_addsub2(TCGContext *s, TCGType ext, TCGReg rl, + TCGReg rh, TCGReg al, TCGReg ah, + tcg_target_long bl, tcg_target_long bh, + bool const_bl, bool const_bh, bool sub) { TCGReg orig_rl =3D rl; AArch64Insn insn; @@ -1423,11 +1423,13 @@ static inline void tcg_out_addsub2(TCGContext *s, T= CGType ext, TCGReg rl, } =20 if (const_bl) { - insn =3D I3401_ADDSI; - if ((bl < 0) ^ sub) { - insn =3D I3401_SUBSI; + if (bl < 0) { bl =3D -bl; + insn =3D sub ? I3401_ADDSI : I3401_SUBSI; + } else { + insn =3D sub ? I3401_SUBSI : I3401_ADDSI; } + if (unlikely(al =3D=3D TCG_REG_XZR)) { /* ??? We want to allow al to be zero for the benefit of negation via subtraction. However, that leaves open the --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708281; cv=none; d=zohomail.com; s=zohoarc; b=l5Qdk0Hgs8PiS0cp6sWsypErtr58sngx27tswc3o2PPjIxCccrABdD+mS6zeRxxpkxwY6lFrc2byUmxNuQdWokl8kf2nLkSHgJEgvlXHNHqV+e2/a0SOkiqjiwfU5eE6VvcrXOWnk77TEUGixb7B6qDNSgW4g2+DHpzF6R9YKZk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708281; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=f+XOqZ5nVIKFE5Wvq06250YDVlIY9I1NmppdkJVW9Dc=; b=mk1V4oCCnCHN/PNjn8mHUzH35cm0MWq9T7CDMSIdDKySt0gKlpFNcHWbWYNI58IrpASIWEpcloxjf7s0BoQMgIQjiJ3gPUAIXL6xKVKoVd4ZWGIlhKRZ9wuclYf/Kdy9JSyI09woBdPOG7PTJLAj/0tJbXM+Td6YsNDD8AvK1g4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708281121631.3998689309576; Tue, 2 Mar 2021 10:04:41 -0800 (PST) Received: from localhost ([::1]:49384 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9Nw-0004NF-2N for importer@patchew.org; Tue, 02 Mar 2021 13:04:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59164) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HK-0002Ot-2N for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:50 -0500 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]:33377) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HG-0007XO-SU for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:49 -0500 Received: by mail-pg1-x530.google.com with SMTP id g4so14377155pgj.0 for ; Tue, 02 Mar 2021 09:57:46 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f+XOqZ5nVIKFE5Wvq06250YDVlIY9I1NmppdkJVW9Dc=; b=GLkbG6SROu0qIaSkatPGPbNpasT1A4UKBNbchTxiBuHGZvJoA864rqLKgOAevonXiS d4GcXtnMhvLHnDMWBClaxi42ZC13QaxteqcDAoNMn0+5HNxjSquHtzpyR2QLkOobm36V 2msgf99AVPMU94fUzFtdJQEVQ9lGza9eViHbR4bvD3GzRI4v8xiLC8Jz4wpXRklLR/ad rXcMeE5yTgDXLIHnRC7LUgx0evgh24upgf6TE9yh2bLduakalMquL4doc0V/wZXpeUR+ gZWt0icMV8KJZyld5LFvbJbz6L1AP73yQD82J3AYU+//93WO9JOrupZzK4tB6XWm2LTA 1Lbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f+XOqZ5nVIKFE5Wvq06250YDVlIY9I1NmppdkJVW9Dc=; b=OxP+DO4iGVgRBCVHUjTfuNPE71UEQCtghCjsj1VbupyDJuDSMer2n1aGMJZd/XUrl4 0eOyVIaGqK1qS4CMQon4jYAB+AzU+IyFDxWb3gyymFfoqX3HE8Rntq7GufopcoBhif9J Q1vkATT/PfENTwKcqJL4XjNc3+YYtpbmj+d0b0/lxwKdN4Yhc1E+yn2i9RO30qo1dCFd TRTjDdMLdJLP4bJDA8BTRas+QFhlxMTZOrt3h+lgSL/+ToIffGXdC4QLPDK6oW1XnKgg p0v4HWtdoLqKfG0SmQ+nyKHt7myeOTh1bUY9oTet2yJOxzV4kNYJ5evZAITXHviQq5ll zZ1Q== X-Gm-Message-State: AOAM531rY4ycqyoYw3Rbyy6SsabdkX3yznARP7eZWLsqycY3nt4SEGd0 rlEOiKBErRl5rpGifIJc+pRBL0J3QItjXw== X-Google-Smtp-Source: ABdhPJz5fL1+YloOYjaM4mwQ2LVFecXDF2miNAwTOuWk9h7AApu1cSuXqxjEF8PkAPUQOGtL+nZYoQ== X-Received: by 2002:a63:d5c:: with SMTP id 28mr19196839pgn.62.1614707864990; Tue, 02 Mar 2021 09:57:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 02/27] tcg/aarch64: Fix I3617_CMLE0 Date: Tue, 2 Mar 2021 09:57:16 -0800 Message-Id: <20210302175741.1079851-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Fix a typo in the encodeing of the cmle (zero) instruction. Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations") Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- tcg/aarch64/tcg-target.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index ec0a86d9d8..c8e41dd638 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -561,7 +561,7 @@ typedef enum { I3617_CMEQ0 =3D 0x0e209800, I3617_CMLT0 =3D 0x0e20a800, I3617_CMGE0 =3D 0x2e208800, - I3617_CMLE0 =3D 0x2e20a800, + I3617_CMLE0 =3D 0x2e209800, I3617_NOT =3D 0x2e205800, I3617_ABS =3D 0x0e20b800, I3617_NEG =3D 0x2e20b800, --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614707997; cv=none; d=zohomail.com; s=zohoarc; b=O3DfoG7rWPuGI5dYT5tcfxYTA7gVhqO/Jx/VGaOjVzT/k/hcgtfY4O4dfReidnAlYI2tQO0iPjc9P5VFOCMqxKuwUGh+9K8kOBDMEWDjXlx7OoLG67TeM6fBYmtMc71Ko/8IMgMVKuknBvw8BN6kZpsbZUG6u4XNpJkxEhk5zM0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614707997; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=FqzYpQQUR12rN4BKMEYAAfl4rSAyL7gT/RoypMfN2sE=; b=hsw7m5q3oGrFByEJ9skdxuC4Al3/bQlIZzxt2foCfKueVoNEgbDdmKEgg4Gdjp63FvpBxNxUJG1FMRYRaXDvgJv/d5wuF2WkfGzNDW39JD/w1Kq1cXJHQnctDKHKqMnTc5HQhlD2IVtS6f0Kh9lKW3XeuqJCDvNQ/fM/PIZIY2g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614707997052941.6727612642004; Tue, 2 Mar 2021 09:59:57 -0800 (PST) Received: from localhost ([::1]:60274 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9JK-0004wX-T8 for importer@patchew.org; Tue, 02 Mar 2021 12:59:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59178) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HK-0002QQ-Is for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:50 -0500 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]:45514) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HI-0007Xa-0m for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:50 -0500 Received: by mail-pl1-x62c.google.com with SMTP id u18so6280243plc.12 for ; Tue, 02 Mar 2021 09:57:47 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FqzYpQQUR12rN4BKMEYAAfl4rSAyL7gT/RoypMfN2sE=; b=gOYqLuNpaMpNnaP7YO3nm5zrnQNGeNyozazmjWmm2H+qJTPsQ7mkG/egAt8/3zkZFq 5INdok53vKuk/HhEfH7UoritjQ9qfLYfBaxxkc3yGoUdyqUP1iK36cMJauKo5+QUrBwf FYrg6BLJQ3Qnx6Qlb/q49MhFTkx4dnsyWbAqogK6kqnhebrIbJmYSx0PUwkDeNnzKrtO P4XIVIqJyKakUr0C/vTRKQMKl5w2nRxeNO50ZpAUn34A0M5bJvjoZabcvPHW2Up40cAd MnxESIFF+isyLS8WHHX5agtODZ/Bhp5mVBTK4BnRpvnYcoEusG8SFJi9hVnobMT3c5Kg v+Cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FqzYpQQUR12rN4BKMEYAAfl4rSAyL7gT/RoypMfN2sE=; b=ZA216azodYQYzjt8+RLCEGysHvUEVFWmF2/O31kv4bRqL9LY5vMDdYGbZi2fGDyFNl 4aTa7SU6C0dxRjjyXO0X4dYyIn90xbf14MS2rFc3owhynzs6+QsvKRjfYSHLsyI1Om/i /6E0sxE5uhOwKmqPOzvPXIs5fy1VhMMoj4hw8udut42duTzkujECHHMI6zChHXod4NPq 4sWQViHdPqqgGzVMZf0pGVKVexv+x4YErYyBgaut+pssBfFlVTBUMImM4uVBSH4uxheR SfXF7I9GObmIrBzv4VCuJ2RF6TavjoerHbF+JwYvI3GCre/S4TpCXD1FdOgWsUB0Ng/e HxrA== X-Gm-Message-State: AOAM531NRFZgtSYPzfNAZkklkWbVfQ+s7stUbdbFBXTSzbdKUQooxpvf jlbWU6hUVOOFSsYiwWBFMdYsclx1jaO8Lw== X-Google-Smtp-Source: ABdhPJxVPgimAuwGsjC7qHrh9Dp8ivCfnxeRu2X6nHs0JSawH0K2+AzfvFvhmUr+ybmr2SRprfAYYw== X-Received: by 2002:a17:902:8697:b029:e3:9724:e260 with SMTP id g23-20020a1709028697b02900e39724e260mr4557504plo.31.1614707866508; Tue, 02 Mar 2021 09:57:46 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 03/27] tcg/aarch64: Fix generation of "scalar" vector operations Date: Tue, 2 Mar 2021 09:57:17 -0800 Message-Id: <20210302175741.1079851-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Weil , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" For some vector operations, "1D" is not a valid type, and there are separate instructions for the 64-bit scalar operation. Tested-by: Stefan Weil Buglink: https://bugs.launchpad.net/qemu/+bug/1916112 Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations") Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- tcg/aarch64/tcg-target.c.inc | 211 ++++++++++++++++++++++++++++++----- 1 file changed, 181 insertions(+), 30 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index c8e41dd638..fcaa5aface 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -519,6 +519,39 @@ typedef enum { I3606_BIC =3D 0x2f001400, I3606_ORR =3D 0x0f001400, =20 + /* AdvSIMD scalar shift by immediate */ + I3609_SSHR =3D 0x5f000400, + I3609_SSRA =3D 0x5f001400, + I3609_SHL =3D 0x5f005400, + I3609_USHR =3D 0x7f000400, + I3609_USRA =3D 0x7f001400, + I3609_SLI =3D 0x7f005400, + + /* AdvSIMD scalar three same */ + I3611_SQADD =3D 0x5e200c00, + I3611_SQSUB =3D 0x5e202c00, + I3611_CMGT =3D 0x5e203400, + I3611_CMGE =3D 0x5e203c00, + I3611_SSHL =3D 0x5e204400, + I3611_ADD =3D 0x5e208400, + I3611_CMTST =3D 0x5e208c00, + I3611_UQADD =3D 0x7e200c00, + I3611_UQSUB =3D 0x7e202c00, + I3611_CMHI =3D 0x7e203400, + I3611_CMHS =3D 0x7e203c00, + I3611_USHL =3D 0x7e204400, + I3611_SUB =3D 0x7e208400, + I3611_CMEQ =3D 0x7e208c00, + + /* AdvSIMD scalar two-reg misc */ + I3612_CMGT0 =3D 0x5e208800, + I3612_CMEQ0 =3D 0x5e209800, + I3612_CMLT0 =3D 0x5e20a800, + I3612_ABS =3D 0x5e20b800, + I3612_CMGE0 =3D 0x7e208800, + I3612_CMLE0 =3D 0x7e209800, + I3612_NEG =3D 0x7e20b800, + /* AdvSIMD shift by immediate */ I3614_SSHR =3D 0x0f000400, I3614_SSRA =3D 0x0f001400, @@ -735,6 +768,25 @@ static void tcg_out_insn_3606(TCGContext *s, AArch64In= sn insn, bool q, | (imm8 & 0xe0) << (16 - 5) | (imm8 & 0x1f) << 5); } =20 +static void tcg_out_insn_3609(TCGContext *s, AArch64Insn insn, + TCGReg rd, TCGReg rn, unsigned immhb) +{ + tcg_out32(s, insn | immhb << 16 | (rn & 0x1f) << 5 | (rd & 0x1f)); +} + +static void tcg_out_insn_3611(TCGContext *s, AArch64Insn insn, + unsigned size, TCGReg rd, TCGReg rn, TCGReg = rm) +{ + tcg_out32(s, insn | (size << 22) | (rm & 0x1f) << 16 + | (rn & 0x1f) << 5 | (rd & 0x1f)); +} + +static void tcg_out_insn_3612(TCGContext *s, AArch64Insn insn, + unsigned size, TCGReg rd, TCGReg rn) +{ + tcg_out32(s, insn | (size << 22) | (rn & 0x1f) << 5 | (rd & 0x1f)); +} + static void tcg_out_insn_3614(TCGContext *s, AArch64Insn insn, bool q, TCGReg rd, TCGReg rn, unsigned immhb) { @@ -2236,23 +2288,38 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, unsigned vecl, unsigned vece, const TCGArg *args, const int *const_args) { - static const AArch64Insn cmp_insn[16] =3D { + static const AArch64Insn cmp_vec_insn[16] =3D { [TCG_COND_EQ] =3D I3616_CMEQ, [TCG_COND_GT] =3D I3616_CMGT, [TCG_COND_GE] =3D I3616_CMGE, [TCG_COND_GTU] =3D I3616_CMHI, [TCG_COND_GEU] =3D I3616_CMHS, }; - static const AArch64Insn cmp0_insn[16] =3D { + static const AArch64Insn cmp_scalar_insn[16] =3D { + [TCG_COND_EQ] =3D I3611_CMEQ, + [TCG_COND_GT] =3D I3611_CMGT, + [TCG_COND_GE] =3D I3611_CMGE, + [TCG_COND_GTU] =3D I3611_CMHI, + [TCG_COND_GEU] =3D I3611_CMHS, + }; + static const AArch64Insn cmp0_vec_insn[16] =3D { [TCG_COND_EQ] =3D I3617_CMEQ0, [TCG_COND_GT] =3D I3617_CMGT0, [TCG_COND_GE] =3D I3617_CMGE0, [TCG_COND_LT] =3D I3617_CMLT0, [TCG_COND_LE] =3D I3617_CMLE0, }; + static const AArch64Insn cmp0_scalar_insn[16] =3D { + [TCG_COND_EQ] =3D I3612_CMEQ0, + [TCG_COND_GT] =3D I3612_CMGT0, + [TCG_COND_GE] =3D I3612_CMGE0, + [TCG_COND_LT] =3D I3612_CMLT0, + [TCG_COND_LE] =3D I3612_CMLE0, + }; =20 TCGType type =3D vecl + TCG_TYPE_V64; unsigned is_q =3D vecl; + bool is_scalar =3D !is_q && vece =3D=3D MO_64; TCGArg a0, a1, a2, a3; int cmode, imm8; =20 @@ -2271,19 +2338,35 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, tcg_out_dupm_vec(s, type, vece, a0, a1, a2); break; case INDEX_op_add_vec: - tcg_out_insn(s, 3616, ADD, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, ADD, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, ADD, is_q, vece, a0, a1, a2); + } break; case INDEX_op_sub_vec: - tcg_out_insn(s, 3616, SUB, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, SUB, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, SUB, is_q, vece, a0, a1, a2); + } break; case INDEX_op_mul_vec: tcg_out_insn(s, 3616, MUL, is_q, vece, a0, a1, a2); break; case INDEX_op_neg_vec: - tcg_out_insn(s, 3617, NEG, is_q, vece, a0, a1); + if (is_scalar) { + tcg_out_insn(s, 3612, NEG, vece, a0, a1); + } else { + tcg_out_insn(s, 3617, NEG, is_q, vece, a0, a1); + } break; case INDEX_op_abs_vec: - tcg_out_insn(s, 3617, ABS, is_q, vece, a0, a1); + if (is_scalar) { + tcg_out_insn(s, 3612, ABS, vece, a0, a1); + } else { + tcg_out_insn(s, 3617, ABS, is_q, vece, a0, a1); + } break; case INDEX_op_and_vec: if (const_args[2]) { @@ -2337,16 +2420,32 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, tcg_out_insn(s, 3616, EOR, is_q, 0, a0, a1, a2); break; case INDEX_op_ssadd_vec: - tcg_out_insn(s, 3616, SQADD, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, SQADD, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, SQADD, is_q, vece, a0, a1, a2); + } break; case INDEX_op_sssub_vec: - tcg_out_insn(s, 3616, SQSUB, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, SQSUB, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, SQSUB, is_q, vece, a0, a1, a2); + } break; case INDEX_op_usadd_vec: - tcg_out_insn(s, 3616, UQADD, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, UQADD, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, UQADD, is_q, vece, a0, a1, a2); + } break; case INDEX_op_ussub_vec: - tcg_out_insn(s, 3616, UQSUB, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, UQSUB, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, UQSUB, is_q, vece, a0, a1, a2); + } break; case INDEX_op_smax_vec: tcg_out_insn(s, 3616, SMAX, is_q, vece, a0, a1, a2); @@ -2364,22 +2463,46 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a1); break; case INDEX_op_shli_vec: - tcg_out_insn(s, 3614, SHL, is_q, a0, a1, a2 + (8 << vece)); + if (is_scalar) { + tcg_out_insn(s, 3609, SHL, a0, a1, a2 + (8 << vece)); + } else { + tcg_out_insn(s, 3614, SHL, is_q, a0, a1, a2 + (8 << vece)); + } break; case INDEX_op_shri_vec: - tcg_out_insn(s, 3614, USHR, is_q, a0, a1, (16 << vece) - a2); + if (is_scalar) { + tcg_out_insn(s, 3609, USHR, a0, a1, (16 << vece) - a2); + } else { + tcg_out_insn(s, 3614, USHR, is_q, a0, a1, (16 << vece) - a2); + } break; case INDEX_op_sari_vec: - tcg_out_insn(s, 3614, SSHR, is_q, a0, a1, (16 << vece) - a2); + if (is_scalar) { + tcg_out_insn(s, 3609, SSHR, a0, a1, (16 << vece) - a2); + } else { + tcg_out_insn(s, 3614, SSHR, is_q, a0, a1, (16 << vece) - a2); + } break; case INDEX_op_aa64_sli_vec: - tcg_out_insn(s, 3614, SLI, is_q, a0, a2, args[3] + (8 << vece)); + if (is_scalar) { + tcg_out_insn(s, 3609, SLI, a0, a2, args[3] + (8 << vece)); + } else { + tcg_out_insn(s, 3614, SLI, is_q, a0, a2, args[3] + (8 << vece)= ); + } break; case INDEX_op_shlv_vec: - tcg_out_insn(s, 3616, USHL, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, USHL, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, USHL, is_q, vece, a0, a1, a2); + } break; case INDEX_op_aa64_sshl_vec: - tcg_out_insn(s, 3616, SSHL, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, SSHL, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, SSHL, is_q, vece, a0, a1, a2); + } break; case INDEX_op_cmp_vec: { @@ -2388,30 +2511,58 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, =20 if (cond =3D=3D TCG_COND_NE) { if (const_args[2]) { - tcg_out_insn(s, 3616, CMTST, is_q, vece, a0, a1, a1); + if (is_scalar) { + tcg_out_insn(s, 3611, CMTST, vece, a0, a1, a1); + } else { + tcg_out_insn(s, 3616, CMTST, is_q, vece, a0, a1, a= 1); + } } else { - tcg_out_insn(s, 3616, CMEQ, is_q, vece, a0, a1, a2); + if (is_scalar) { + tcg_out_insn(s, 3611, CMEQ, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, CMEQ, is_q, vece, a0, a1, a2= ); + } tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a0); } } else { if (const_args[2]) { - insn =3D cmp0_insn[cond]; - if (insn) { - tcg_out_insn_3617(s, insn, is_q, vece, a0, a1); - break; + if (is_scalar) { + insn =3D cmp0_scalar_insn[cond]; + if (insn) { + tcg_out_insn_3612(s, insn, vece, a0, a1); + break; + } + } else { + insn =3D cmp0_vec_insn[cond]; + if (insn) { + tcg_out_insn_3617(s, insn, is_q, vece, a0, a1); + break; + } } tcg_out_dupi_vec(s, type, MO_8, TCG_VEC_TMP, 0); a2 =3D TCG_VEC_TMP; } - insn =3D cmp_insn[cond]; - if (insn =3D=3D 0) { - TCGArg t; - t =3D a1, a1 =3D a2, a2 =3D t; - cond =3D tcg_swap_cond(cond); - insn =3D cmp_insn[cond]; - tcg_debug_assert(insn !=3D 0); + if (is_scalar) { + insn =3D cmp_scalar_insn[cond]; + if (insn =3D=3D 0) { + TCGArg t; + t =3D a1, a1 =3D a2, a2 =3D t; + cond =3D tcg_swap_cond(cond); + insn =3D cmp_scalar_insn[cond]; + tcg_debug_assert(insn !=3D 0); + } + tcg_out_insn_3611(s, insn, vece, a0, a1, a2); + } else { + insn =3D cmp_vec_insn[cond]; + if (insn =3D=3D 0) { + TCGArg t; + t =3D a1, a1 =3D a2, a2 =3D t; + cond =3D tcg_swap_cond(cond); + insn =3D cmp_vec_insn[cond]; + tcg_debug_assert(insn !=3D 0); + } + tcg_out_insn_3616(s, insn, is_q, vece, a0, a1, a2); } - tcg_out_insn_3616(s, insn, is_q, vece, a0, a1, a2); } } break; --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708218; cv=none; d=zohomail.com; s=zohoarc; b=Cog7NryEbuxbb42/gDlWlZUQQSXfiL5jr8Jp3cH2idzYcTlf6vbFOQ05r12Hq+vJEJ0lVOi6IsdXQZSpWI1Pc/mV4eiOs6kJh5Lyw3SnBydFI5PTYxafz/Xtqp/AFdNFm8i1dvk5Lc2LXB3oZtjk8rlRO8xrSV9jC38vrc2d4gk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708218; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qXvTR6xq0CezXE1eROwLDPe0hk6sXQteYv5BD9wz3/8=; b=vjtOp1HTg7i3Y3gGSXf/lIijJ2P79qCl+Qs4DLqcyvdc1ezkZiQ+ExLqZskcYVm1lS xU+fnHndYR9AOAxTS4OZgVG++W1Pbl9ULLhAQncUkoQ6taeGuv0W+aCEQNZmRIloiSSj BCOK1X5WPz5QDaiqXwWnlmOh7MO2BNeBCu+k1CXpJWyFJk/othT8ACynC59+7syYbuOA NrFyLNNisuHDjMCfqf6n1+Vaz3Z3fUMTLN3x51cbCceVpsOWljwuVfQHxZTJGNA4N6qu FOm+Md1d5pGUUhMYWNC6fYYUAR5qSe1AQabQBbteYNwrrRhvM7x1LPCbOpvMuYFI6MwN sakg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qXvTR6xq0CezXE1eROwLDPe0hk6sXQteYv5BD9wz3/8=; b=KsLeGubn+JgfQSh2Ua0uK/hfTyZkmicUOtHUQlQaK3eTpS7BSju89LF2YCCaOaeGOa jSuFafUkPtNlszmMQXYBqV9VEE5JF/DFpFxFLWT4TVaAo8baCiV2nyF2hhirFtVkpvqt hPEBw7iEHRZqPoTt/CCvlKqp3bEPtGtF8qfamnE3qMivRpr2b0Btr9sa3tuDcArVrXYA v+4fpS4wDmAC0vL5alggLrh4wXWSj1rNm0MaQp85AIzH1S9cSu7NPVA72/3oVNE4hbev F05r2b8v06VLOUNwNWeP1gmHqIm98e5E0Xeo0uVYWdPbgln9mipA1obZc3N1Wl4/Vgr1 jeZg== X-Gm-Message-State: AOAM532T1qvgL97DMCM4Yt8V4WrYIOWtMLql87juUPw/TPZPqXaI71zl GHTkevoRvXR5tV81lflp9IjHkQDGQ3iTfg== X-Google-Smtp-Source: ABdhPJwNJjfhaU4LzC3+dPBdk8gz0ULF8o3y0tLYVYZu8+cQP2KZK1xiWcS/3He0RmrOf5QC8y3M4g== X-Received: by 2002:a63:cd41:: with SMTP id a1mr19139870pgj.177.1614707867535; Tue, 02 Mar 2021 09:57:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 04/27] tcg/tci: Use exec/cpu_ldst.h interfaces Date: Tue, 2 Mar 2021 09:57:18 -0800 Message-Id: <20210302175741.1079851-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use the provided cpu_ldst.h interfaces. This fixes the build vs the unconverted uses of g2h(), adds missed memory trace events, and correctly recognizes when a SIGSEGV belongs to the guest via set_helper_retaddr(). Fixes: 3e8f1628e864 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Alex Benn=C3=A9e --- tcg/tci.c | 73 +++++++++++++++++++++---------------------------------- 1 file changed, 28 insertions(+), 45 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index fb3c97aaf1..1c667537fe 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -346,51 +346,34 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, T= CGCond condition) return result; } =20 -#ifdef CONFIG_SOFTMMU -# define qemu_ld_ub \ - helper_ret_ldub_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_ld_leuw \ - helper_le_lduw_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_ld_leul \ - helper_le_ldul_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_ld_leq \ - helper_le_ldq_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_ld_beuw \ - helper_be_lduw_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_ld_beul \ - helper_be_ldul_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_ld_beq \ - helper_be_ldq_mmu(env, taddr, oi, (uintptr_t)tb_ptr) -# define qemu_st_b(X) \ - helper_ret_stb_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -# define qemu_st_lew(X) \ - helper_le_stw_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -# define qemu_st_lel(X) \ - helper_le_stl_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -# define qemu_st_leq(X) \ - helper_le_stq_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -# define qemu_st_bew(X) \ - helper_be_stw_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -# define qemu_st_bel(X) \ - helper_be_stl_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -# define qemu_st_beq(X) \ - helper_be_stq_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) -#else -# define qemu_ld_ub ldub_p(g2h(taddr)) -# define qemu_ld_leuw lduw_le_p(g2h(taddr)) -# define qemu_ld_leul (uint32_t)ldl_le_p(g2h(taddr)) -# define qemu_ld_leq ldq_le_p(g2h(taddr)) -# define qemu_ld_beuw lduw_be_p(g2h(taddr)) -# define qemu_ld_beul (uint32_t)ldl_be_p(g2h(taddr)) -# define qemu_ld_beq ldq_be_p(g2h(taddr)) -# define qemu_st_b(X) stb_p(g2h(taddr), X) -# define qemu_st_lew(X) stw_le_p(g2h(taddr), X) -# define qemu_st_lel(X) stl_le_p(g2h(taddr), X) -# define qemu_st_leq(X) stq_le_p(g2h(taddr), X) -# define qemu_st_bew(X) stw_be_p(g2h(taddr), X) -# define qemu_st_bel(X) stl_be_p(g2h(taddr), X) -# define qemu_st_beq(X) stq_be_p(g2h(taddr), X) -#endif +#define qemu_ld_ub \ + cpu_ldub_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_ld_leuw \ + cpu_lduw_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_ld_leul \ + cpu_ldl_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_ld_leq \ + cpu_ldq_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_ld_beuw \ + cpu_lduw_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_ld_beul \ + cpu_ldl_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_ld_beq \ + cpu_ldq_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_b(X) \ + cpu_stb_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_lew(X) \ + cpu_stw_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_lel(X) \ + cpu_stl_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_leq(X) \ + cpu_stq_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_bew(X) \ + cpu_stw_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_bel(X) \ + cpu_stl_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#define qemu_st_beq(X) \ + cpu_stq_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) =20 #if TCG_TARGET_REG_BITS =3D=3D 64 # define CASE_32_64(x) \ --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=myPurBGQOJ9HRp/gWQglk2sYpbZ88UPxyO7dwBmpmMU=; b=fmZkbOnYawAdkOF7sk7wzSQGcR0VRtmZsALiro0upU06EGlblkw8nLvWpOVvNQuCg2 d/j1fAdat4CjP6fC2Uwo2pP9iVF5a16xxa//D4xg4Vt8GgA5z3qKhW9LznWGw7lgsVMg 39QbrVtpTMEmQH1cZ9hLvy+LuRqWr9zjt2rQUKEoeCbd7DNFDPvUq2lib1e2iIoCIWC+ tIKq32UtdriFXXAiETczRmcR5bXr8tUtjFLVUHMbmYG1/UENd9HxrOzmprnBkV9eT24n +geMWoIHLjREmMhXn4puS5twr/MbcRP4C1//sjUzvY2gL8Nyu2JZNv9o01l9BvHn6raJ C1TQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=myPurBGQOJ9HRp/gWQglk2sYpbZ88UPxyO7dwBmpmMU=; b=fccjRN0f4wdqq/hHJZR9OyjnKIknq31d7VeJDN6drFeysGhsi15jrFLngKksFQjiIE 55BVtBPWi4VzhA/pKqreV5wDfj4lcXXA0UfTNEolLi1DbHpN/1Ad8DF52geR6hNpp3yu KVFclF79PQ/r9Qx0+dS1OuLSr7Uxhu/pCVe0ihcKqqCcDZ1+FV/dhpa+h6g03fEfoETB WWSc23ASYbhOLgQzOu9zcwPH/FZeZpm8/SFPV2CSBpMyUrVb1fsqHlraDJ3f4vPhKzYm BSGq6xGyW0xumiyHyA9AEb0EnVtqnRSKX9yQmpoD/ozh5YpHcvNM/GwoF5UcVbBN/Z0Z yaTQ== X-Gm-Message-State: AOAM532DxdGs5mMXWDYaEX14gZoMEsgqwQDsMskvQ63ogOzPjw9eAVhn qTocqQP4Omngn9QwODrOelvbbOFtXeoMNg== X-Google-Smtp-Source: ABdhPJxaijNWBp/8edIbKm4kgqgiP3xRaUA8ajxueqizdScqGtEbzOjIKW5LlsDrybdieLFdqx92Sg== X-Received: by 2002:a62:1b48:0:b029:1ed:a400:9c52 with SMTP id b69-20020a621b480000b02901eda4009c52mr4316540pfb.14.1614707868509; Tue, 02 Mar 2021 09:57:48 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 05/27] tcg: Split out tcg_raise_tb_overflow Date: Tue, 2 Mar 2021 09:57:19 -0800 Message-Id: <20210302175741.1079851-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Allow other places in tcg to restart with a smaller tb. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tcg.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 63a12b197b..bbe3dcee03 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -346,6 +346,12 @@ static void set_jmp_reset_offset(TCGContext *s, int wh= ich) s->tb_jmp_reset_offset[which] =3D tcg_current_code_size(s); } =20 +/* Signal overflow, starting over with fewer guest insns. */ +static void QEMU_NORETURN tcg_raise_tb_overflow(TCGContext *s) +{ + siglongjmp(s->jmp_trans, -2); +} + #define C_PFX1(P, A) P##A #define C_PFX2(P, A, B) P##A##_##B #define C_PFX3(P, A, B, C) P##A##_##B##_##C @@ -1310,8 +1316,7 @@ static TCGTemp *tcg_temp_alloc(TCGContext *s) int n =3D s->nb_temps++; =20 if (n >=3D TCG_MAX_TEMPS) { - /* Signal overflow, starting over with fewer guest insns. */ - siglongjmp(s->jmp_trans, -2); + tcg_raise_tb_overflow(s); } return memset(&s->temps[n], 0, sizeof(TCGTemp)); } --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708389; cv=none; d=zohomail.com; s=zohoarc; b=llrl8n6LEEHskO2gSiekpOuijl9s3/3Se8d4LXi0hSSVwjqJm5n6Z/qPzGKQ5YoO7nl+PxgQm58LWTVUcr+P4dac9dCz2IYMuT4H2SREt4NuSMWwvt4Dg72bj6y4+aipj6tXuCSl4CRmATNlugPgYul/IghH7xlNBaW3Tnr2L5Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708389; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vXWtOAbqO0IiL4x1PJ+ry/MmusWHvhWYDh4bY00za1s=; b=VXSFHdv+fvQhf120yp5rL2MjnhozARJW7nx4wCiFgFbn8ZpHRj4wUub2nsf6+KZpONioem3N5IGayAY9JHWdCjeYz64gnLe1M3wGFw1h5+1HD+OfUXm1PxDTAZsUnRFJX40erKXh0G8t2jhdBZwrK73FH8m6hHum2rY5IYr146Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708389152719.740453944567; Tue, 2 Mar 2021 10:06:29 -0800 (PST) Received: from localhost ([::1]:53848 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9Pf-0006M6-07 for importer@patchew.org; Tue, 02 Mar 2021 13:06:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59208) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HM-0002WB-LD for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:52 -0500 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:46338) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HK-0007Y6-UL for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:52 -0500 Received: by mail-pf1-x42f.google.com with SMTP id r5so14293109pfh.13 for ; Tue, 02 Mar 2021 09:57:50 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vXWtOAbqO0IiL4x1PJ+ry/MmusWHvhWYDh4bY00za1s=; b=Cc3LBM8V8Ek1Q8YhY1+KbK+WNzMUFUqih7/YcAGAeltZ7/z9FvYcrbWQfwO6dUQZfN jHtZKQ5QlvulfDkvpI0EbJ0E2XOtQ9bHuY+YBMNsDIg1u43pF+tpENC/WBWSElCvUUvp SKrYx1h3GAv3vJdo3kGuV0T1NaBylSwCD2ZOvzSfBYXKXOSwHlYSUsPi7nuQ1AXHiM47 F8sEpQItRAWJBaE568lCqvBaeKKF690DAqpkQvWvLuGuIlQsvm2EUILWuWNCqof9aTBv o4J99jYnOCwcQ9KfLLEY1DL4qkFA2oyBUCzNw8zjnMRbHQmVrFCUw2wgJelVcEH38PDH iODA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vXWtOAbqO0IiL4x1PJ+ry/MmusWHvhWYDh4bY00za1s=; b=rI/p9u6Z3/5BBXIiP5uA9aiDKHCpFOG8h8QhbwUgxJDoYU/xB/d+ww3Vf9sKendeUJ I2wIrbog2+JzOa9s+DmVIWv61XX9M8vCXdBDPAwrCBoB3F3SKAhpKlqb59oni4Rs26Hl 0LD8m6kWcmZmCQu6qr+cOywVl7/5Y6vfzytu9TbTWZ2VOLGITLdTB2KmTXKa7Kn4wltP NFwEFbnJWTo9heCw0Xgvg2a0emcY6EeB6siJxsqO+P+SGW7Z5RSBAkq/vux0Xk//HxYP +N1zsQXHZPDkAl5KbE8Y0R6MZG0iWeX2HDzUkM6uUDhx2KoqCcbEP6A1PdWmZM8ZDQPs +CvA== X-Gm-Message-State: AOAM530FIRnisa99wWlW0Is6idKCqgGN5BjPPQfhIjpKD7jTGLUYY4ix JgLwUsrY5aHLygYQgMqALx13fT7o6TyP9w== X-Google-Smtp-Source: ABdhPJz78bsB1cvbHL/p1k2R3jX60hg+l9KVd2mryUQeSRfmXOcyWoJxb7HSD4l/RuTrL8aR3ZIihw== X-Received: by 2002:a05:6a00:886:b029:1ed:b546:6d1f with SMTP id q6-20020a056a000886b02901edb5466d1fmr4363215pfj.22.1614707869514; Tue, 02 Mar 2021 09:57:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Date: Tue, 2 Mar 2021 09:57:20 -0800 Message-Id: <20210302175741.1079851-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The use in tcg_tb_lookup is given a random pc that comes from the pc of a signal handler. Do not assert that the pointer is already within the code gen buffer at all, much less the writable mirror of it. Fixes: db0c51a3803 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tcg.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index bbe3dcee03..2991112829 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -513,11 +513,21 @@ static void tcg_region_trees_init(void) } } =20 -static struct tcg_region_tree *tc_ptr_to_region_tree(const void *cp) +static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p) { - void *p =3D tcg_splitwx_to_rw(cp); size_t region_idx; =20 + /* + * Like tcg_splitwx_to_rw, with no assert. The pc may come from + * a signal handler over which the caller has no control. + */ + if (!in_code_gen_buffer(p)) { + p -=3D tcg_splitwx_diff; + if (!in_code_gen_buffer(p)) { + return NULL; + } + } + if (p < region.start_aligned) { region_idx =3D 0; } else { @@ -536,6 +546,7 @@ void tcg_tb_insert(TranslationBlock *tb) { struct tcg_region_tree *rt =3D tc_ptr_to_region_tree(tb->tc.ptr); =20 + g_assert(rt !=3D NULL); qemu_mutex_lock(&rt->lock); g_tree_insert(rt->tree, &tb->tc, tb); qemu_mutex_unlock(&rt->lock); @@ -545,6 +556,7 @@ void tcg_tb_remove(TranslationBlock *tb) { struct tcg_region_tree *rt =3D tc_ptr_to_region_tree(tb->tc.ptr); =20 + g_assert(rt !=3D NULL); qemu_mutex_lock(&rt->lock); g_tree_remove(rt->tree, &tb->tc); qemu_mutex_unlock(&rt->lock); @@ -561,6 +573,10 @@ TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr) TranslationBlock *tb; struct tb_tc s =3D { .ptr =3D (void *)tc_ptr }; =20 + if (rt =3D=3D NULL) { + return NULL; + } + qemu_mutex_lock(&rt->lock); tb =3D g_tree_lookup(rt->tree, &s); qemu_mutex_unlock(&rt->lock); --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708461; cv=none; d=zohomail.com; s=zohoarc; b=aXw2QPLyKVaWAnueIum1PKWXrqq2hbOODWHMe1sBbtdcFOQa7b5zr4CWl+PbijSKo7FzmVUTN17Dsvp2CNSrZPI6tyxZyjrI+Jgl9zJ8ows+SBC8zBbxkP2gcUT5QW0/0dLEIy4si4KOs2844KKoMyOw1nH4cgeHmtZjcfCOB7U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708461; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=3oEIKQLfBmHUmZruF1WOanf+8RYMbOoh2V8q7ZF9vas=; b=CNVZEZ7EBFT6XrpfM6U4KsN0SFzYl/yBVEN+GM4L0L3PRJGxErb4/5ZTG0X+FfdSoYsGNz6cUAX+aU4s5Ec+GzMf8RKwsCy48UQw0cCy8wYhiqvJIYXMlKzxCH6OuLoZiXCM7XvoYXs8z4zUT8KOQqDWG/jNGir2BbaxqV8JaQ0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708461827764.8973008638926; Tue, 2 Mar 2021 10:07:41 -0800 (PST) Received: from localhost ([::1]:58384 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9Qp-0000mO-I4 for importer@patchew.org; Tue, 02 Mar 2021 13:07:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59230) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HN-0002ZU-TM for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:53 -0500 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]:46383) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HL-0007YG-Rs for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:53 -0500 Received: by mail-pg1-x529.google.com with SMTP id h4so14313054pgf.13 for ; Tue, 02 Mar 2021 09:57:51 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3oEIKQLfBmHUmZruF1WOanf+8RYMbOoh2V8q7ZF9vas=; b=NA5IY7WjuHn+kN+KBip6z9d02qYrtcUvCCIqgRwXcQ82kcKLZVEA3/8bJwNee3XjJN WBiDC4soeyvQLvK+hHqjK4HlokSZW6rmUAzL1frSNR141WCDpN2rf//2Z1EyBALKf8Qr O1Ne7HX6PiuN2RiQhqgewvwTrs8KICptDN8hjqWyIs/STfqP30Gm4Q3r8xZllQ0Qjdpa S0+uaZBMqRY0xulE2K4H8bSrrMKGF3C6H/Kf1s0Mn4G8ujxuYh5qQcCEk8mFu0T1N/8S vY2klQJUMUWmOkLn7SeAlgI2pk9+YobFCq5IpV6lr3tWYDJAHCmISbL6qHlm+H3rIV7q u1GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3oEIKQLfBmHUmZruF1WOanf+8RYMbOoh2V8q7ZF9vas=; b=XM3A4P/YrFsLosXJcvUkbwYjD0IbS0MLgrisgJSp1Hb8TV8cIRwp1J5W8b5ZnKorLF F5eD4Mebi2R/GFXnsFL3rsK/ftb77znXinlBC/pDDwTcZM1X0Zy+aFCfsasfPXb/jDkz jzm0BQ0ACGjpN0zByqhIY3AXC8NKqsih9zWChoAAP5wi5osnr5cHEQ93825afBegWlyo h+nCUcRJ/0VgJqVoGm4Ps1gOgIEy/A4Suk96SI+SpR9fBZveGeAEf1xFsYiB4xb8jtVL yAYrU4oVtm5ZXMwrsyb9Uy6N2zonfHS04owpe695lZrQP6QK1dtx9diNJ+8/WPTBawbr sdDg== X-Gm-Message-State: AOAM532P6UQ7sjs3Vq+vlwXo9JU7FM39oZOgc2E/3SWxc0YLIg8kExyC 5TroCtgllq6hjJmK/pE0C9DlRtD2L60x6g== X-Google-Smtp-Source: ABdhPJxD3awSbGJiJPQHpIAxjeJmQUrDUvV/ZyOFhD/HmaUtql6wkp0CVkatOGRdsMqVjLzlRQ7L+Q== X-Received: by 2002:aa7:86d9:0:b029:1ee:c1e0:63f8 with SMTP id h25-20020aa786d90000b02901eec1e063f8mr2017398pfo.55.1614707870532; Tue, 02 Mar 2021 09:57:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 07/27] tcg/tci: Merge identical cases in generation (arithmetic opcodes) Date: Tue, 2 Mar 2021 09:57:21 -0800 Message-Id: <20210302175741.1079851-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use CASE_32_64 and CASE_64 to reduce ifdefs and merge cases that are identical between 32-bit and 64-bit hosts. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org> [PMD: Split patch as 1/5] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210218232840.1760806-2-f4bug@amsat.org> Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 85 +++++++++++++++++----------------------- 1 file changed, 37 insertions(+), 48 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index feac4659cc..ea42775cb0 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -380,6 +380,18 @@ static inline void tcg_out_call(TCGContext *s, const t= cg_insn_unit *arg) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +#if TCG_TARGET_REG_BITS =3D=3D 64 +# define CASE_32_64(x) \ + case glue(glue(INDEX_op_, x), _i64): \ + case glue(glue(INDEX_op_, x), _i32): +# define CASE_64(x) \ + case glue(glue(INDEX_op_, x), _i64): +#else +# define CASE_32_64(x) \ + case glue(glue(INDEX_op_, x), _i32): +# define CASE_64(x) +#endif + static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) { @@ -391,6 +403,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, case INDEX_op_exit_tb: tcg_out64(s, args[0]); break; + case INDEX_op_goto_tb: if (s->tb_jmp_insn_offset) { /* Direct jump method. */ @@ -456,22 +469,27 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_debug_assert(args[2] =3D=3D (int32_t)args[2]); tcg_out32(s, args[2]); break; - case INDEX_op_add_i32: - case INDEX_op_sub_i32: - case INDEX_op_mul_i32: - case INDEX_op_and_i32: - case INDEX_op_andc_i32: /* Optional (TCG_TARGET_HAS_andc_i32). */ - case INDEX_op_eqv_i32: /* Optional (TCG_TARGET_HAS_eqv_i32). */ - case INDEX_op_nand_i32: /* Optional (TCG_TARGET_HAS_nand_i32). */ - case INDEX_op_nor_i32: /* Optional (TCG_TARGET_HAS_nor_i32). */ - case INDEX_op_or_i32: - case INDEX_op_orc_i32: /* Optional (TCG_TARGET_HAS_orc_i32). */ - case INDEX_op_xor_i32: - case INDEX_op_shl_i32: - case INDEX_op_shr_i32: - case INDEX_op_sar_i32: - case INDEX_op_rotl_i32: /* Optional (TCG_TARGET_HAS_rot_i32). */ - case INDEX_op_rotr_i32: /* Optional (TCG_TARGET_HAS_rot_i32). */ + + CASE_32_64(add) + CASE_32_64(sub) + CASE_32_64(mul) + CASE_32_64(and) + CASE_32_64(or) + CASE_32_64(xor) + CASE_32_64(andc) /* Optional (TCG_TARGET_HAS_andc_*). */ + CASE_32_64(orc) /* Optional (TCG_TARGET_HAS_orc_*). */ + CASE_32_64(eqv) /* Optional (TCG_TARGET_HAS_eqv_*). */ + CASE_32_64(nand) /* Optional (TCG_TARGET_HAS_nand_*). */ + CASE_32_64(nor) /* Optional (TCG_TARGET_HAS_nor_*). */ + CASE_32_64(shl) + CASE_32_64(shr) + CASE_32_64(sar) + CASE_32_64(rotl) /* Optional (TCG_TARGET_HAS_rot_*). */ + CASE_32_64(rotr) /* Optional (TCG_TARGET_HAS_rot_*). */ + CASE_32_64(div) /* Optional (TCG_TARGET_HAS_div_*). */ + CASE_32_64(divu) /* Optional (TCG_TARGET_HAS_div_*). */ + CASE_32_64(rem) /* Optional (TCG_TARGET_HAS_div_*). */ + CASE_32_64(remu) /* Optional (TCG_TARGET_HAS_div_*). */ tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); @@ -487,30 +505,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, break; =20 #if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_add_i64: - case INDEX_op_sub_i64: - case INDEX_op_mul_i64: - case INDEX_op_and_i64: - case INDEX_op_andc_i64: /* Optional (TCG_TARGET_HAS_andc_i64). */ - case INDEX_op_eqv_i64: /* Optional (TCG_TARGET_HAS_eqv_i64). */ - case INDEX_op_nand_i64: /* Optional (TCG_TARGET_HAS_nand_i64). */ - case INDEX_op_nor_i64: /* Optional (TCG_TARGET_HAS_nor_i64). */ - case INDEX_op_or_i64: - case INDEX_op_orc_i64: /* Optional (TCG_TARGET_HAS_orc_i64). */ - case INDEX_op_xor_i64: - case INDEX_op_shl_i64: - case INDEX_op_shr_i64: - case INDEX_op_sar_i64: - case INDEX_op_rotl_i64: /* Optional (TCG_TARGET_HAS_rot_i64). */ - case INDEX_op_rotr_i64: /* Optional (TCG_TARGET_HAS_rot_i64). */ - case INDEX_op_div_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - case INDEX_op_divu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - case INDEX_op_rem_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - case INDEX_op_remu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - break; case INDEX_op_deposit_i64: /* Optional (TCG_TARGET_HAS_deposit_i64). = */ tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); @@ -551,14 +545,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); break; - case INDEX_op_div_i32: /* Optional (TCG_TARGET_HAS_div_i32). */ - case INDEX_op_divu_i32: /* Optional (TCG_TARGET_HAS_div_i32). */ - case INDEX_op_rem_i32: /* Optional (TCG_TARGET_HAS_div_i32). */ - case INDEX_op_remu_i32: /* Optional (TCG_TARGET_HAS_div_i32). */ - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - break; + #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: @@ -628,8 +615,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, } tcg_out_i(s, *args++); break; + case INDEX_op_mb: break; + case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: case INDEX_op_call: /* Always emitted via tcg_out_call. */ --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y3W2C4gQqJ3gt54X13AfM/Luzq4svOq0hI3JMg2PfDU=; b=m2CrYa8l+vJy6F2LdGopVy+8Fh/JpEW6cZcTrf0JH5JLiC6M+aa/ZEawpwRS4R7U6W PQa06UPlwqx2HmK4NZB+02dvvmhr5r1EQ4EhAD7ASZX/zBugveEsvECzXYRgDsKL32uC WW1E6qKS7sAPF/mbc5is2bQQyMjILn2Q5DRzaNJmqf+hFyf1QIf3p3/JeA4AU6cCRBBm h0MYeG6frOLwInzOasUQY5Vf5HV1BgPHjTbU/RW3wsNBggJ5j50/tgp3XmFd3wAyk2lL sxK3RjN07yTvupCpEsFdyFX/Dteqt4ebM0Qh2ujuTPfY5y9XHZwrjbn7cI8mAbMyLeHd hLwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y3W2C4gQqJ3gt54X13AfM/Luzq4svOq0hI3JMg2PfDU=; b=Hump87TEs9+p9WtNyv5CpIJE11/vqLGGLbRa8dr2zVpLrsuTPq2qKbmciU11yHbc1p CibVLIiCibsPCUbKw51f39zsmJIZhH5j+nn2CxOswdxhrNTovw9Jwyc45fp4OQX0Qu6a vwJFSKSep/bfHwbKBuehmbE8bHADGmcfHSoEESGGqTlwfg5Z/Q6MqZZxRWLZHhPLRHTk ksT3uvyBRdiXHovNR8FWD/ODlSXevX2xHCW0xhMjYqVzbtO4RNwVzBK+xkg74d/MSibA mjabMMdaFBn0cohXdrlnbaR/uEgZGs7Ox0wqgcuKdH6A4tcVDM2kwG0rFXi7weLSJJ+u QE/Q== X-Gm-Message-State: AOAM5310oJkW9x6TtamOHI1FvkuNH5S2tKSXuOXJVCegDNWYAxa2e8yq lxHlWaXOvWYG2RloPEy0NymkyR3dcrxmpA== X-Google-Smtp-Source: ABdhPJzjrC/ApKezbzutoEqhlF89upU8ACyx+u9rNB7T8E6JM4u0JMSFVHhpLoz+bkxSvT0lvurLGQ== X-Received: by 2002:a62:2f83:0:b029:1ec:48b2:73da with SMTP id v125-20020a622f830000b02901ec48b273damr4312057pfv.1.1614707872036; Tue, 02 Mar 2021 09:57:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 08/27] tcg/tci: Merge identical cases in generation (exchange opcodes) Date: Tue, 2 Mar 2021 09:57:22 -0800 Message-Id: <20210302175741.1079851-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use CASE_32_64 and CASE_64 to reduce ifdefs and merge cases that are identical between 32-bit and 64-bit hosts. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org> [PMD: Split patch as 2/5] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210218232840.1760806-3-f4bug@amsat.org> Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 35 ++++++++++++++--------------------- 1 file changed, 14 insertions(+), 21 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index ea42775cb0..1896efd100 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -520,28 +520,21 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out8(s, args[2]); /* condition */ tci_out_label(s, arg_label(args[3])); break; - case INDEX_op_bswap16_i64: /* Optional (TCG_TARGET_HAS_bswap16_i64). = */ - case INDEX_op_bswap32_i64: /* Optional (TCG_TARGET_HAS_bswap32_i64). = */ - case INDEX_op_bswap64_i64: /* Optional (TCG_TARGET_HAS_bswap64_i64). = */ - case INDEX_op_not_i64: /* Optional (TCG_TARGET_HAS_not_i64). */ - case INDEX_op_neg_i64: /* Optional (TCG_TARGET_HAS_neg_i64). */ - case INDEX_op_ext8s_i64: /* Optional (TCG_TARGET_HAS_ext8s_i64). */ - case INDEX_op_ext8u_i64: /* Optional (TCG_TARGET_HAS_ext8u_i64). */ - case INDEX_op_ext16s_i64: /* Optional (TCG_TARGET_HAS_ext16s_i64). */ - case INDEX_op_ext16u_i64: /* Optional (TCG_TARGET_HAS_ext16u_i64). */ - case INDEX_op_ext32s_i64: /* Optional (TCG_TARGET_HAS_ext32s_i64). */ - case INDEX_op_ext32u_i64: /* Optional (TCG_TARGET_HAS_ext32u_i64). */ - case INDEX_op_ext_i32_i64: - case INDEX_op_extu_i32_i64: #endif /* TCG_TARGET_REG_BITS =3D=3D 64 */ - case INDEX_op_neg_i32: /* Optional (TCG_TARGET_HAS_neg_i32). */ - case INDEX_op_not_i32: /* Optional (TCG_TARGET_HAS_not_i32). */ - case INDEX_op_ext8s_i32: /* Optional (TCG_TARGET_HAS_ext8s_i32). */ - case INDEX_op_ext16s_i32: /* Optional (TCG_TARGET_HAS_ext16s_i32). */ - case INDEX_op_ext8u_i32: /* Optional (TCG_TARGET_HAS_ext8u_i32). */ - case INDEX_op_ext16u_i32: /* Optional (TCG_TARGET_HAS_ext16u_i32). */ - case INDEX_op_bswap16_i32: /* Optional (TCG_TARGET_HAS_bswap16_i32). = */ - case INDEX_op_bswap32_i32: /* Optional (TCG_TARGET_HAS_bswap32_i32). = */ + + CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ + CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */ + CASE_32_64(ext8s) /* Optional (TCG_TARGET_HAS_ext8s_*). */ + CASE_32_64(ext8u) /* Optional (TCG_TARGET_HAS_ext8u_*). */ + CASE_32_64(ext16s) /* Optional (TCG_TARGET_HAS_ext16s_*). */ + CASE_32_64(ext16u) /* Optional (TCG_TARGET_HAS_ext16u_*). */ + CASE_64(ext32s) /* Optional (TCG_TARGET_HAS_ext32s_i64). */ + CASE_64(ext32u) /* Optional (TCG_TARGET_HAS_ext32u_i64). */ + CASE_64(ext_i32) + CASE_64(extu_i32) + CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */ + CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */ + CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */ tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); break; --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614707994; cv=none; d=zohomail.com; s=zohoarc; b=R+lEPIpLuTWDFXe/g0VqgUIN8pj1McFl0Pd9DMgtMBkW8bdVI1cfT7jWUQI+b6kpx/6xodNqaW1Abq7+8hTzlu03FEqySw3Ywi7UTU6NVdj/GvJ+AfhFqGYndy9vSsgUhIhdqcJ9N5VEPaGuBkfan9CWinsL8R2Ztdr4oXpfHR8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614707994; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yoPJEjHaD9Y/eQNAtgp4CmM0ipXsKYPy7ttmPn2mZ+I=; b=i04q7jZXNOWBH2FUh3RDeQWoDwVod87ToiUMgjqKAA+aEBPO4JFBvm0J5mo0Ppgy7yKngA9ci2akqsNhRk8IdifoRSGyhlCmt56WyrdupYipdKsQpTSl6Icg+oFvyp2QQESK/fARhdo+2ympNbBMd634m4hYAgB9owTCrMiAmRI= ARC-Authentication-Results: i=1; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yoPJEjHaD9Y/eQNAtgp4CmM0ipXsKYPy7ttmPn2mZ+I=; b=ldB3JEcLNusjsvRHdtM+mPXQ89YHosARLBEjfJ4QF+qrNzohCV0kXulhNtPj7irx+F czztwZQV8swiOXYsbLG5QD3egxH18oLokkLdTidayPDHIpRSqDZq2m+jv1b1P0/KcWza 2zbkTUTfN8FeSvjZ3HloKay0e5UOJtX0E8vi8VOraNj//ybC9ygLHIW4J2XKayCCNTx5 8J3uiXRwLAcIg+qJDqASHihsWCG3MFhH6cutPF8U4rzEl3rMPpF6coJivl9Eoo08uXcz G996kY5VD6rzV1T/5Nq19lHLfxY/RYnhGKhUv7eHGObcB9B2MBstDpbF0F7CBntTasor eT7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yoPJEjHaD9Y/eQNAtgp4CmM0ipXsKYPy7ttmPn2mZ+I=; b=sDnAMKbBAgI2XWZq0n6tm6/kvhpYr07nzY0v5faMMOZLtbcq32I6aKGcC4DfqX74BD iTHaqkAq5SeQjhg4C6hM3tckUSK+4Cz72xR3xtCiszzF1FPF2921JYjJOEJ3AF2dW5Ne pBq3StSZxRevBBsM+biZ4vxItTJTkYI+5OBhsPuNWahS9HQ9/NaA6pbqOfuNe3LFWmrn 3t4jJ2sBELwFSO6+U03vcirDhozUbMowI8TaIb6/KO9eKR6QaThoWy7BDAv2UsKCffhK i9TS04CMoH2Yisp6GdaofOB1i0YWIQx1ofRFAE6js4hwpGZsNZlJzH0BDNID5k65UmYg 8F+A== X-Gm-Message-State: AOAM531hjtjodk2Nzn20S+3qPRkEDMfSywL8JpUWNuZaTmc21hojyU+K 31geEluDpYsZS0DQLv9Md47FdRThcWrSfQ== X-Google-Smtp-Source: ABdhPJxg32iN36d1+3O0mmfKuH7WgMsWzjv+uCOvGnoiHG+qBhe9jjnduzQh/id1brztn7UGrGwQKw== X-Received: by 2002:a62:fc45:0:b029:1ed:bdd2:a07d with SMTP id e66-20020a62fc450000b02901edbdd2a07dmr4413982pfh.0.1614707873016; Tue, 02 Mar 2021 09:57:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 09/27] tcg/tci: Merge identical cases in generation (deposit opcode) Date: Tue, 2 Mar 2021 09:57:23 -0800 Message-Id: <20210302175741.1079851-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use CASE_32_64 and CASE_64 to reduce ifdefs and merge cases that are identical between 32-bit and 64-bit hosts. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org> [PMD: Split patch as 3/5] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210218232840.1760806-4-f4bug@amsat.org> Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 1896efd100..4a86a3bb46 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -494,7 +494,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); break; - case INDEX_op_deposit_i32: /* Optional (TCG_TARGET_HAS_deposit_i32). = */ + + CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */ tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); @@ -505,15 +506,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, break; =20 #if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_deposit_i64: /* Optional (TCG_TARGET_HAS_deposit_i64). = */ - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_debug_assert(args[3] <=3D UINT8_MAX); - tcg_out8(s, args[3]); - tcg_debug_assert(args[4] <=3D UINT8_MAX); - tcg_out8(s, args[4]); - break; case INDEX_op_brcond_i64: tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708722; cv=none; d=zohomail.com; s=zohoarc; b=E/yeuTZBBC5ze0gIA8mp0+1nBqA+71zccuXaV5F+Y2QqAXMFvlr7AmBMqwCHW8z2JJEXypH9EHkCKteIiLO3D8xybCuLTLv/foa6TFmIrZA8CMXkUuH3QdrKRsh6IOgRFvZHTy/ScHySYPmkXRIgxRpBY+rxLkUW3xElBlNGtuQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708722; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=A6vR6ziB3b9O465GIDkN5AIXP0cK+f5XI51tj6udrHk=; b=hiYI+vQtn6x8nBiCNwZhb+iwabv35cH6W3++K0IEXOs0M48oPaESmtoqKduWcFxnmd0xz5eDYygoEVVXW7QLdBy9+bpcTLAQQTSLq/lUj5M4EOSk7H5AE5my0ijvbL6sCoOEUWn1jO2OlwFruaOdW350rmJIErO5TiAil7j4X0w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708722463896.5846220365388; Tue, 2 Mar 2021 10:12:02 -0800 (PST) Received: from localhost ([::1]:46622 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9V3-0007j1-Cn for importer@patchew.org; Tue, 02 Mar 2021 13:12:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59278) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HQ-0002hk-Sy for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:56 -0500 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]:33149) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HP-0007a0-5E for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:56 -0500 Received: by mail-pl1-x634.google.com with SMTP id c16so2999192ply.0 for ; Tue, 02 Mar 2021 09:57:54 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A6vR6ziB3b9O465GIDkN5AIXP0cK+f5XI51tj6udrHk=; b=IMJod9K1Aamq8qy9e51d0r7hXEmp14yTCO5huTyy3iIpood4ZK2cIflpgYj9OWMZ8w MIK9zbyDQH1kboZTgnsfTVUZuSD/PjwJh2CLfzqKEH4y4sJ38fL9dftotKrWKlRLxU0/ fHRFnPuJL2f9URUTTNCTsL9AUMk855REG74WWH9z8V9mVWEzOT/4KfcTZxWMa6it2Xle v826l6OnxGV14BCkPsSKd/ujid/U8L3VG1SuljX3qXhIR3xgVHG+j0gNuMY448jq+TE4 koskkldRbCbpKklzMxiH+T2c4B24ocsqkccXh3SjUnqU48d7aKLrQfcaaWGsSBapGprN 0G3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A6vR6ziB3b9O465GIDkN5AIXP0cK+f5XI51tj6udrHk=; b=SxY0jqA9PCyhqsMks0vfLSiNh7pP5aBKYIxsLjln/V5re4e4BcObCE5cwr7Qa8W8Bn xmX13iG1xQ+uWCBmGeCx6kBz5dceVF0msdRe17AK/yEDrUdwBplvLkpnaHaSSUffCjOX 6r/xh8N3durLr8mj9CcJogyCoVeiVnvYr4K/Fys6DY1s4iN3OGB+8fg48ixt/0kLTo77 sO6piNRp4wlHY9EG7DVLHxs6uMdwXRSn98fuxMQfSygQustGmR1j+97AEmJ4u5vkBl00 f+y7OP8H37MXlRUQjuJBJPm1kEPoaM0QOCdLAud8WFXADe08uXyflzEx4RpD8TI9Rx2X PwkQ== X-Gm-Message-State: AOAM532kRY1qwdwiYoNqL6sAIWdJ9WeNA2V/h2vdEc0pWWLIMsbFrUs2 NuDcQsi7JVee1CbiIm5JXdC6sAvUejtpTg== X-Google-Smtp-Source: ABdhPJwrwvASzEDWr0wYR3z9BBi546eehyLaX2GY1hByII8g8Hcf3HGAplrhNhVdoc/YCw6mn1VoUA== X-Received: by 2002:a17:90a:8d85:: with SMTP id d5mr5600995pjo.49.1614707873850; Tue, 02 Mar 2021 09:57:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 10/27] tcg/tci: Merge identical cases in generation (conditional opcodes) Date: Tue, 2 Mar 2021 09:57:24 -0800 Message-Id: <20210302175741.1079851-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use CASE_32_64 and CASE_64 to reduce ifdefs and merge cases that are identical between 32-bit and 64-bit hosts. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org> [PMD: Split patch as 4/5] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210218232840.1760806-5-f4bug@amsat.org> Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 23 ++++++----------------- 1 file changed, 6 insertions(+), 17 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 4a86a3bb46..f9893b9539 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -417,15 +417,18 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, } set_jmp_reset_offset(s, args[0]); break; + case INDEX_op_br: tci_out_label(s, arg_label(args[0])); break; - case INDEX_op_setcond_i32: + + CASE_32_64(setcond) tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out8(s, args[3]); /* condition */ break; + #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: /* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */ @@ -436,13 +439,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_out_r(s, args[4]); tcg_out8(s, args[5]); /* condition */ break; -#elif TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_setcond_i64: - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out8(s, args[3]); /* condition */ - break; #endif case INDEX_op_ld8u_i32: case INDEX_op_ld8s_i32: @@ -505,14 +501,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out8(s, args[4]); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_brcond_i64: + CASE_32_64(brcond) tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out8(s, args[2]); /* condition */ tci_out_label(s, arg_label(args[3])); break; -#endif /* TCG_TARGET_REG_BITS =3D=3D 64 */ =20 CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */ @@ -556,12 +550,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_out_r(s, args[3]); break; #endif - case INDEX_op_brcond_i32: - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out8(s, args[2]); /* condition */ - tci_out_label(s, arg_label(args[3])); - break; + case INDEX_op_qemu_ld_i32: tcg_out_r(s, *args++); tcg_out_r(s, *args++); --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708869; cv=none; d=zohomail.com; s=zohoarc; b=S1Radcvaqy3RnSO5JRYU7qpsdAA/nt1+EeFY7nFwT1Ug5tCBphBKYMt6Q9ioeD9c/O9qj+ypCMZeyxXIWqLmYu68XLZKrTmSow1YEmhfzziD7mnAfOpcSIOJxILORExEaMLGFrSC+7T5krWekxhFlXQAASucPFzHfJPf88+w6/w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708869; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xk1GB79AaGUkcV+qDEpBrBCVOi2EqtNfKQnf1wr+BmM=; b=RSde3tN1wafT2jHInvj9C2m+5+mKPJ8S0yhYwf7YmLaom2Lbe12DuwM4hFVS+Vq8BESxy35QNX+aX82+hNEpCiLXXsg32kPJSvj5Lro3bSoY3I2J3vW28tWmu3x28MOk4vpgKukMT22Z0fhOpFXXvYM3BPjYO681Ds/JRG8lPRE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708869936806.5202191091452; Tue, 2 Mar 2021 10:14:29 -0800 (PST) Received: from localhost ([::1]:54848 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9XO-0002gj-SA for importer@patchew.org; Tue, 02 Mar 2021 13:14:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59288) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HR-0002jj-Ol for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:57 -0500 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]:43817) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HQ-0007a7-0H for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:57 -0500 Received: by mail-pl1-x62c.google.com with SMTP id d8so2050708plg.10 for ; Tue, 02 Mar 2021 09:57:55 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xk1GB79AaGUkcV+qDEpBrBCVOi2EqtNfKQnf1wr+BmM=; b=hOlRkx6EHGPS0/y7ls9iGJf8odN04UtUfgkhhcKEFza1WT1gj8Wi7XOOwjklvJun3B EtrIcg2/QCP6MKNC7iJ48qddcMjhgerkImcKMg4ZSVYMVxhUXptnq8RZiAgqlxf6ILS3 UdNumjmuqlifcFH845pVE6BzYh+aWsPUkXcoMSlNK8+YgHq5Se23yqokB56/z7uAB+yg kgjX0tjr2b+N00uh0aWhdKqlKwQKUtxunN+MKXNo2kVAq6ptUwPKGVBXP2P+Ttau4ebX t+j9Ix1KiLDrSPHNJuRruAXJtdZMW0A15vUSsBZTtXO5JFfVXnk1IOtQvbIOV5zB1dUb TFHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xk1GB79AaGUkcV+qDEpBrBCVOi2EqtNfKQnf1wr+BmM=; b=Z7Zn/8JZncaayqAQKKI80FpXhCUkK+jfT5c/fHPAxRhnEs3zMJDpEBr1GIMxeBOQLF 0XTmOypH5qXpyzqFJuNQtjmY0kdoZwJ2OGiQxvIvVdiNnrHe1MK7S+s+LcVfmUJOixGY j2WPA607tE6rLukC17e/xRoUFqhqwocesua/ChKGG9QDO3qKVgcHJ4I2oJId42rw06Ih dkMHJSKUbeR/Qtet08DTEJPQajXhafAFv0NmwCytjCWv013kIvbuTlqI5NiOrlXYWdml wAfVq0zLERuLZvRpjWmNTmdE08JTVfNplMb+ULkMbj9AyA7wRQjq2ItSCDmgTfAfG+Qu S9vw== X-Gm-Message-State: AOAM5303sWG8BnbcrQrBwvXfyB59+Udx24ZzEZezK0qp/p7KwWpj9Kas RaFYmrLwYzlfy/cBVkhsHxmWjEl3IPlG9A== X-Google-Smtp-Source: ABdhPJyu/hzGc/FN4S1uV/1ZmRrLo5xkBGMzV78s5zykqXYf78UrGxkaSeOgsTrWKr4qoj/6WbaxJQ== X-Received: by 2002:a17:90a:ce82:: with SMTP id g2mr5583307pju.193.1614707874834; Tue, 02 Mar 2021 09:57:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 11/27] tcg/tci: Merge identical cases in generation (load/store opcodes) Date: Tue, 2 Mar 2021 09:57:25 -0800 Message-Id: <20210302175741.1079851-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use CASE_32_64 and CASE_64 to reduce ifdefs and merge cases that are identical between 32-bit and 64-bit hosts. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org> [PMD: Split patch as 5/5] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210218232840.1760806-6-f4bug@amsat.org> Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 49 ++++++++++++---------------------------- 1 file changed, 14 insertions(+), 35 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index f9893b9539..c79f9c32d8 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -440,25 +440,20 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out8(s, args[5]); /* condition */ break; #endif - case INDEX_op_ld8u_i32: - case INDEX_op_ld8s_i32: - case INDEX_op_ld16u_i32: - case INDEX_op_ld16s_i32: + + CASE_32_64(ld8u) + CASE_32_64(ld8s) + CASE_32_64(ld16u) + CASE_32_64(ld16s) case INDEX_op_ld_i32: - case INDEX_op_st8_i32: - case INDEX_op_st16_i32: + CASE_64(ld32u) + CASE_64(ld32s) + CASE_64(ld) + CASE_32_64(st8) + CASE_32_64(st16) case INDEX_op_st_i32: - case INDEX_op_ld8u_i64: - case INDEX_op_ld8s_i64: - case INDEX_op_ld16u_i64: - case INDEX_op_ld16s_i64: - case INDEX_op_ld32u_i64: - case INDEX_op_ld32s_i64: - case INDEX_op_ld_i64: - case INDEX_op_st8_i64: - case INDEX_op_st16_i64: - case INDEX_op_st32_i64: - case INDEX_op_st_i64: + CASE_64(st32) + CASE_64(st) stack_bounds_check(args[1], args[2]); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); @@ -552,24 +547,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, #endif =20 case INDEX_op_qemu_ld_i32: - tcg_out_r(s, *args++); - tcg_out_r(s, *args++); - if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { - tcg_out_r(s, *args++); - } - tcg_out_i(s, *args++); - break; - case INDEX_op_qemu_ld_i64: - tcg_out_r(s, *args++); - if (TCG_TARGET_REG_BITS =3D=3D 32) { - tcg_out_r(s, *args++); - } - tcg_out_r(s, *args++); - if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { - tcg_out_r(s, *args++); - } - tcg_out_i(s, *args++); - break; case INDEX_op_qemu_st_i32: tcg_out_r(s, *args++); tcg_out_r(s, *args++); @@ -578,6 +555,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, } tcg_out_i(s, *args++); break; + + case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_st_i64: tcg_out_r(s, *args++); if (TCG_TARGET_REG_BITS =3D=3D 32) { --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708556; cv=none; d=zohomail.com; s=zohoarc; b=FWAf3rzmGMIMsxL2W36yNNnadfNNBPWvFd2nZYIkZe2lWEyKFTi8i5K9gnzuaXchQH05gBGYzBZC+lwWDrakvLivi5Pm9bVpq8dTu637WOg7tudL9tXl27qOx4uLelQoaObX4vgSemYZUgno9XiC/uyd4E8ANdiDBR628AO7wVM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708556; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=fptILMWrA+pDg1XvV+KF1NfoqcnNqb93ja/TFgoMbqs=; b=fE2jQunP/eny1hlzR41sfiiZhXSvhVZPf8BvKVDEeWX/8ZP2zECigZzChvHKoemBl45ngoJ/mDQPsoWnjgOch/gkPe0b0vX2a4bS8WDjcbnaSzdK6U2x32pExldfLMuY3PKN35YFnSwg/OWxTuX0yqyv3MyEKMFXXF+YhxNeueo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708556463941.4119911327713; Tue, 2 Mar 2021 10:09:16 -0800 (PST) Received: from localhost ([::1]:34354 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9SN-0002bF-1R for importer@patchew.org; Tue, 02 Mar 2021 13:09:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59302) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HS-0002nD-Ss for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:58 -0500 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]:40809) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HR-0007aK-6L for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:57:58 -0500 Received: by mail-pj1-x102b.google.com with SMTP id o6so2524533pjf.5 for ; Tue, 02 Mar 2021 09:57:56 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fptILMWrA+pDg1XvV+KF1NfoqcnNqb93ja/TFgoMbqs=; b=uDDAzS8xJS34EnCEhip/ijO5wTOlGvx30rn3MYETdiHM77Kg+ffb27YRLWyRDZf0is BiVHVu/cuyR+ZwBMD1pbAcapOmuFil4rw6CPIkH9WhTAGC2n1c2JWGQKF3Ts0HOTUV+c gaENihJQmRK2DatJesGjLo7YoTRufjBvGeHBgdQRu0mYXZfwwLWyjxk+8XLkkwpoZO9s j9LEbMUD2RpMFbY2DZjw/Z/qdLMjuErRX5s1Qe0Bodg1RT6N5qGsgYgqtKUZV3Wx1zfr oLz+RO/TWkTSBp7zW8LJA3n9F+YIk3RKWIs43l9f5iYRefq3RX+qTmdmtzVxlchAT5j2 lNAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fptILMWrA+pDg1XvV+KF1NfoqcnNqb93ja/TFgoMbqs=; b=VX+Uf7SS5tYjI1xtpuwpLFPfeqI7j/afd7kXIl2lJeGkOVqLQaeXLRhAqfUYlwOe5Q 0DG8CDXicOO8NZQR6xL8hbwZ/DNH5Lvd1yssu/fNaz3kHMQfKcJkZos66tdr+vfkZx3q Fszlv7mnWzNe+u9u7wbiVdM8fxgGcfm0qBhO3N/i+JnyVEb+MQYTSVjjP4EG7D1Z906g 7LL9wWqZX+tGO9KKqwrMK2K4WKfTwaReaG6ZvGJAIOCxTpWuh8E3+ZhCM1S9pIHhtTQ/ bFjf6yaLCsDFwz+X5xDjMVrJk85vhMDmL+pqcuOt5f5nVgrovwddAcV2KbSezvEFu1YT GOZg== X-Gm-Message-State: AOAM532ofJzcX5nKvkj+FbHCRyhreMa8sRch8mrWG1QzvO9wLH8CEDvD RVRbpJWsSTrZut1DrfMi4rnAEUIJW8XfyA== X-Google-Smtp-Source: ABdhPJxpAzQHc1VXpCNojJUSnWvimTD+/aJ+gmBLj1K22y03K2LffewE+ITSa81ic8HWzEgw4hYuKg== X-Received: by 2002:a17:90a:e647:: with SMTP id ep7mr2168579pjb.122.1614707875889; Tue, 02 Mar 2021 09:57:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 12/27] tcg/tci: Remove tci_read_r8 Date: Tue, 2 Mar 2021 09:57:26 -0800 Message-Id: <20210302175741.1079851-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use explicit casts for ext8u opcodes, and allow truncation to happen with the store for st8 opcodes. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 1c667537fe..4ade0ccaf9 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -78,11 +78,6 @@ static int32_t tci_read_reg32s(const tcg_target_ulong *r= egs, TCGReg index) } #endif =20 -static uint8_t tci_read_reg8(const tcg_target_ulong *regs, TCGReg index) -{ - return (uint8_t)tci_read_reg(regs, index); -} - static uint16_t tci_read_reg16(const tcg_target_ulong *regs, TCGReg index) { return (uint16_t)tci_read_reg(regs, index); @@ -169,14 +164,6 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t= **tb_ptr) return value; } =20 -/* Read indexed register (8 bit) from bytecode. */ -static uint8_t tci_read_r8(const tcg_target_ulong *regs, const uint8_t **t= b_ptr) -{ - uint8_t value =3D tci_read_reg8(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} - #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 /* Read indexed register (8 bit signed) from bytecode. */ static int8_t tci_read_r8s(const tcg_target_ulong *regs, const uint8_t **t= b_ptr) @@ -533,7 +520,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); break; CASE_32_64(st8) - t0 =3D tci_read_r8(regs, &tb_ptr); + t0 =3D tci_read_r(regs, &tb_ptr); t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint8_t *)(t1 + t2) =3D t0; @@ -722,8 +709,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext8u_i32 case INDEX_op_ext8u_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r8(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint8_t)t1); break; #endif #if TCG_TARGET_HAS_ext16u_i32 @@ -916,8 +903,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext8u_i64 case INDEX_op_ext8u_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r8(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint8_t)t1); break; #endif #if TCG_TARGET_HAS_ext8s_i64 --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614709056; cv=none; d=zohomail.com; s=zohoarc; b=JR2Z5Y6HP1mLwv1QSbx3TtDz3fhlEoePQQ6EGZ2HldnxnsuqE2P4vurWgkuHmUTSfE8OeZjFVY6iLg8FaqERAsx/xs7yvtnKlMjviVs60bJ+Sih9PxJzvB+i7rh4UaH1CYAEo01mTxlzzDcw62FW2v2yXK0e39qzJ40A3A4AW7s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614709056; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=IYlMX6zlz5iaj2ojk5WvGQj9gx5INTxGM9zOOFclYMU=; b=Q22cj8HaJDQU9x57/61uBjOt2g353WbcvPIfdCTvENoIuryLwpwnjqXp9h/E3d97cxrxeROceILXvxZfHM5UvJHerP+38crPyG/tRCUtzXkd63av+qMAkfNnFUTPQ521odI5q64v3qaJG+mbm8vvapUMl8CVvXw6NA9vlFdtQnI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614709056894105.64953152154271; Tue, 2 Mar 2021 10:17:36 -0800 (PST) Received: from localhost ([::1]:34816 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9aR-0006BT-Nh for importer@patchew.org; Tue, 02 Mar 2021 13:17:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59336) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HU-0002sP-SD for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:00 -0500 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]:34300) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HS-0007aY-Bl for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:00 -0500 Received: by mail-pl1-x633.google.com with SMTP id ba1so12484173plb.1 for ; Tue, 02 Mar 2021 09:57:57 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IYlMX6zlz5iaj2ojk5WvGQj9gx5INTxGM9zOOFclYMU=; b=oLtE3ubpg/Gj+aGsUF5aSLaFGEu+ChGvx+gtUT3rYRK7WoFe8QTsEF1FlrJ/T/s2hq J/Y4oIeunf939arax4xXehWm8EjzK0oYAzS3sJOWsExmgWmXWN2YLjWcaeC3G73ibFg2 5DsmdvuCWgbQXKGMyZA/DGp6Eu01lSedcFnKjz78Nw63i8vQyL42o5eP1/jVxYh57x5+ 0hMoF6ojHLQBqUgFzZXYB2Gojf79w7aNKEfGSaQ9Q+JgpHAne7e9xX/Hzz+gbUJuC5qG kPUgaEBoPcDc4vMC7wzNCvAeMBV2TopJsYCUanhvqIMjQM8rGs4fouoRGq5LlyCY6IJb mfMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IYlMX6zlz5iaj2ojk5WvGQj9gx5INTxGM9zOOFclYMU=; b=LDX/36Ww+cTigGGqjMCBgmsaoucR+3A/Np4o+x1Ac8w9iGDHo5EV3XktIaC3RsVTya q72qmnyfGGWETCjmgLFmUtZ4WtenDGFWw6bNur3R2ucBDRtNpvIIrTPWvmQ1f+IhSVdz h36ErdlMIMzlgiIJLqsHHHrAI3rItcL5FV7+wkmbUIcze4DkBTav8IQ2W5ewM4//qfK2 mINNd46NqS7h+pxFxss+yN7ssPAar4M5X8oOpc1DHYbXjQ163tY/g5/3TFHFtVEEH3UV y9iP5XtnVZy5CkM2+PYlEOcw3d/rdzdR7DdCqlhEM03nk6p7pKCQpYy8to04+lzy2JK2 Wqeg== X-Gm-Message-State: AOAM532SVXvMVPywWy/teRJXUI3hKjA/1EElhob4DdPeEkCnvH+FPM2K UiznCeWkXWnlRZgETvHAlpEWvcaRhywYkw== X-Google-Smtp-Source: ABdhPJwk5eFE/+aCRidLLkPVQkWK9tH5NKLFiSk1TGH4INQRelSJjOIKBC4SYWQrd0+P5wKM8eD0pw== X-Received: by 2002:a17:90a:f2d5:: with SMTP id gt21mr5863139pjb.197.1614707877118; Tue, 02 Mar 2021 09:57:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 13/27] tcg/tci: Remove tci_read_r8s Date: Tue, 2 Mar 2021 09:57:27 -0800 Message-Id: <20210302175741.1079851-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use explicit casts for ext8s opcodes. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 25 ++++--------------------- 1 file changed, 4 insertions(+), 21 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 4ade0ccaf9..7325c8bfd0 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -57,13 +57,6 @@ static tcg_target_ulong tci_read_reg(const tcg_target_ul= ong *regs, TCGReg index) return regs[index]; } =20 -#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 -static int8_t tci_read_reg8s(const tcg_target_ulong *regs, TCGReg index) -{ - return (int8_t)tci_read_reg(regs, index); -} -#endif - #if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 static int16_t tci_read_reg16s(const tcg_target_ulong *regs, TCGReg index) { @@ -164,16 +157,6 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t= **tb_ptr) return value; } =20 -#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 -/* Read indexed register (8 bit signed) from bytecode. */ -static int8_t tci_read_r8s(const tcg_target_ulong *regs, const uint8_t **t= b_ptr) -{ - int8_t value =3D tci_read_reg8s(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} -#endif - /* Read indexed register (16 bit) from bytecode. */ static uint16_t tci_read_r16(const tcg_target_ulong *regs, const uint8_t **tb_ptr) @@ -695,8 +678,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext8s_i32 case INDEX_op_ext8s_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r8s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int8_t)t1); break; #endif #if TCG_TARGET_HAS_ext16s_i32 @@ -910,8 +893,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext8s_i64 case INDEX_op_ext8s_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r8s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int8_t)t1); break; #endif #if TCG_TARGET_HAS_ext16s_i64 --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708378; cv=none; d=zohomail.com; s=zohoarc; b=I2gNuC24w1lNiF4dMDhzlMK3O1sqYz8CZ2g/DiFX11zbyLyDNAunuWZ0buVu6cgYyRJCKLIVtqDsucWhpdxEMDHkbQdpvo2FfaRr2QO8k9XTAsox7Hlx4VE6TmroGb4BU1jmCmZ6uCzQ7ASlboZOH/cbDVbUS5auFovRukwJJ3c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708378; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=YPOjQOCVvXckcnkr+oLmPc3XWSAdSsFw06IiSJpsEjQ=; b=F8s1Y+4w0uefgREX4p8YZDWWX6wPJVgQNqarBXytZrrdksrUKYoxBwPZLpWBwGl1UlXk1aUmRVFmAHsUj4QCvBwira5UwJlgrl1NmLBrkgkpuxCRJp0UygXEFe8zyqm+4WlFsUIyUyusqMbFJ8aS0/SWGPMBSZ8qjeq08OErcO8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708378610212.1018705510022; Tue, 2 Mar 2021 10:06:18 -0800 (PST) Received: from localhost ([::1]:52780 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9PV-0005pr-B1 for importer@patchew.org; Tue, 02 Mar 2021 13:06:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59344) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HV-0002u5-Fh for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:01 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]:44445) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HT-0007ar-FL for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:01 -0500 Received: by mail-pl1-x62d.google.com with SMTP id a24so12449897plm.11 for ; Tue, 02 Mar 2021 09:57:59 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YPOjQOCVvXckcnkr+oLmPc3XWSAdSsFw06IiSJpsEjQ=; b=BbOFdjviD9d2QxC+9B731QJ+SDX5VlprfwZk2YqbUrPm2u7UaT6qDMCNT/1/prjjmE y6PCdH73WS6cBRUM01tGRP76MbN4sZLM+onvyo1+OUbny5RyGyw9ksl79UPBB5hWhmAo TOyPF2wRVtZ+cR60ptDrgYU+NIhcFMR3lOYMoerJI20b322l5StKVzT30yn2aGmuv7ki ZcGibHcmSiDMVqV8zUK2JtOJSm2k9xrZrJKDoWg/8Xtws7TICxkC70Fw+2w55PrKwa9Z qJYljAGf87ySdcn8wNDQlEq2Om+wmO7zNzGSXglA9tRd4/lRGoo+dgSjfy87Lhc4zWlv 2B/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YPOjQOCVvXckcnkr+oLmPc3XWSAdSsFw06IiSJpsEjQ=; b=lHi6QmkwzdH41GFLSzbNEi6b02D15v3XiKhzq6IsHG3xhFqF2aYb0w/uRImFkaX8r7 jjqbOaRBNvfsiJiL0GRyTfM9BJfSb3MK5KrJ8cJhxxXTET99MAiIMkRl52CA14B5dKHq ppsEUBShGISHr5bJ3Um/pkbAU6AoF6jvNjxD28b+gN7JSdZTu4mpsOuoZ/Rdof+f8Ycz F4ZOJueTDHtq1RpuNEaIeGEQPGppYahbpcmQaTsKi3mhf9hdS33jpV46W8dx7z0TNsGQ nGJ4E738ThpA2+PjplHmfvwd4l1jxUM5kZybnz/q/eg5SnAvwL5MxcakxABQW8LKZUA9 fhQA== X-Gm-Message-State: AOAM532MeIcs1GfLFSM9aJRYZZU4+5c+3evm7O0DwQOb1hxccpxDW6MI pwJ3+9cNgxIMiHnuPwfuLkZREjJG4kqpUg== X-Google-Smtp-Source: ABdhPJyOORgyZusTt78sG/F8YK6Ne2Eu3KUJcLtguOzNRpsugKj/1u41S8Qad7Wo9IdKjMgSk0V4rA== X-Received: by 2002:a17:90a:fb8e:: with SMTP id cp14mr5638766pjb.52.1614707878188; Tue, 02 Mar 2021 09:57:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 14/27] tcg/tci: Remove tci_read_r16 Date: Tue, 2 Mar 2021 09:57:28 -0800 Message-Id: <20210302175741.1079851-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use explicit casts for ext16u opcodes, and allow truncation to happen with the store for st16 opcodes, and with the call for bswap16 opcodes. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 7325c8bfd0..2440da1746 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -71,11 +71,6 @@ static int32_t tci_read_reg32s(const tcg_target_ulong *r= egs, TCGReg index) } #endif =20 -static uint16_t tci_read_reg16(const tcg_target_ulong *regs, TCGReg index) -{ - return (uint16_t)tci_read_reg(regs, index); -} - static uint32_t tci_read_reg32(const tcg_target_ulong *regs, TCGReg index) { return (uint32_t)tci_read_reg(regs, index); @@ -157,15 +152,6 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t= **tb_ptr) return value; } =20 -/* Read indexed register (16 bit) from bytecode. */ -static uint16_t tci_read_r16(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - uint16_t value =3D tci_read_reg16(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} - #if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 /* Read indexed register (16 bit signed) from bytecode. */ static int16_t tci_read_r16s(const tcg_target_ulong *regs, @@ -509,7 +495,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, *(uint8_t *)(t1 + t2) =3D t0; break; CASE_32_64(st16) - t0 =3D tci_read_r16(regs, &tb_ptr); + t0 =3D tci_read_r(regs, &tb_ptr); t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint16_t *)(t1 + t2) =3D t0; @@ -699,14 +685,14 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, #if TCG_TARGET_HAS_ext16u_i32 case INDEX_op_ext16u_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r16(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint16_t)t1); break; #endif #if TCG_TARGET_HAS_bswap16_i32 case INDEX_op_bswap16_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r16(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap16(t1)); break; #endif @@ -907,8 +893,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext16u_i64 case INDEX_op_ext16u_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r16(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint16_t)t1); break; #endif #if TCG_TARGET_HAS_ext32s_i64 @@ -930,7 +916,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_bswap16_i64 case INDEX_op_bswap16_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r16(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap16(t1)); break; #endif --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RiZhAqk94IR59YM6JHo6AIRSs7mF45dtttOIiGxjJYA=; b=qxEhmFbrt0nEyAU7yz9m4v7TbFuLtFbIww1jwBtR8M2QFhKcbRoKT9IDKnQOHKNoqI /xSReAZDdqomKe7JlNAjPc4/kSlfrYVke/R/w0pi+nU7VVlXDH1qrzaQ3wRrGCUB+GA9 r8yzJ8AGqWyufUnWDoa7tS/iMFYhg86Xruqm9vp+bmJQVyKik40yIkMeQ8LtjK5wRarP 4nPuUZalj8BeCsNwgtKYep96zUMvNgGDZ32OznA5PschdTPpzbqkTM6NDW2c9ve17LLg /3D1L3K4n4scTTs36u6oOzJDPk6PDWyD+eDZt76lERtxVBD+g2zCw1rCCkb7OGw+/yzz QvJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RiZhAqk94IR59YM6JHo6AIRSs7mF45dtttOIiGxjJYA=; b=tEwKB98EFzEhRo2QIpMPuLiIMoywUBxbYIA5949sJaEnYK5M09pKK//0CQSQGXNp/d 31HoA3asLII+YsMek/+iAnT/D+gBf0K7nD7COkSfLM7YQDa5AHX9v0AuoJ5daGs7JJir JTc92KDmOHw5axEFmxd5YKaetjxzIZaiKDDXKWABA+zrjqt9rrfRbGMKOxPO7a3B7It2 hqvaAS3t+8WTrLjhKE8VX7CVFY/cHMqCpJ1HCsWGOyrfshe8FwTG0TA93PciTjVo64uP yhWPlXVY1fZoQHFh4Ng8cA9vG49X13nu7JHUSvWsyCLtrbB3eeTepA3pwlE6/plS3iyZ eBqg== X-Gm-Message-State: AOAM530yi00HfvXN8sgBZmcnSj671Vni+uo957P5UoJ0exenx/wj/vEA 8uVKrWct+nr9T5v2Td9RvK835i7WhYrJLA== X-Google-Smtp-Source: ABdhPJx8jPYChfPX22unVyWqOJGYNCvMhqWXRBirArn7PjYVv7BFh8++CAnjOLxMRVhK0emUsqVC7Q== X-Received: by 2002:a05:6a00:2345:b029:1ee:481d:4179 with SMTP id j5-20020a056a002345b02901ee481d4179mr4272186pfj.42.1614707879589; Tue, 02 Mar 2021 09:57:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 15/27] tcg/tci: Remove tci_read_r16s Date: Tue, 2 Mar 2021 09:57:29 -0800 Message-Id: <20210302175741.1079851-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use explicit casts for ext16s opcodes. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 2440da1746..8b91e6efc3 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -57,13 +57,6 @@ static tcg_target_ulong tci_read_reg(const tcg_target_ul= ong *regs, TCGReg index) return regs[index]; } =20 -#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 -static int16_t tci_read_reg16s(const tcg_target_ulong *regs, TCGReg index) -{ - return (int16_t)tci_read_reg(regs, index); -} -#endif - #if TCG_TARGET_REG_BITS =3D=3D 64 static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index) { @@ -152,17 +145,6 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t= **tb_ptr) return value; } =20 -#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 -/* Read indexed register (16 bit signed) from bytecode. */ -static int16_t tci_read_r16s(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - int16_t value =3D tci_read_reg16s(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} -#endif - /* Read indexed register (32 bit) from bytecode. */ static uint32_t tci_read_r32(const tcg_target_ulong *regs, const uint8_t **tb_ptr) @@ -671,8 +653,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext16s_i32 case INDEX_op_ext16s_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r16s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int16_t)t1); break; #endif #if TCG_TARGET_HAS_ext8u_i32 @@ -886,8 +868,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_ext16s_i64 case INDEX_op_ext16s_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r16s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int16_t)t1); break; #endif #if TCG_TARGET_HAS_ext16u_i64 --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708150; cv=none; d=zohomail.com; s=zohoarc; b=kt1IP2qMLZl9kQGQflcALx1V+iUJKWSbj0kvxBgm+YhiX71/kTGInFNw5/2BqpBfeIpiLEGyRDVWohesCWrjLhxAU15Muhbib7ao4SuI0Y5iucxdIlcTw6XeB1xZQzkKNJ+lo6zrgjK1Qe4WyUoGQ5q8tNmX57uQifRxvUEZDAc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708150; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=+dmSE8N34SoJjro0pmrBj+i1Q6RRI4T10gidnvhwlpU=; b=HLqCrNazXVyP2+3sFaV0bvTEB16SzOWm+whe5pBzztdrggH70tr8hro4WM7OvJFnXFHbnHprQTX+IZ253gZf51H4EDcwrYspcO62cdLcvZIlFEHTJQ7ccw7WxOnNvZBt+jBre15/WEohSB6Ek/vtPjW8BQQcyyZRmxZGLnuf3tQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708150107108.57135124808792; Tue, 2 Mar 2021 10:02:30 -0800 (PST) Received: from localhost ([::1]:40444 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9Lo-00008e-HM for importer@patchew.org; Tue, 02 Mar 2021 13:02:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59388) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HX-00030q-TE for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:03 -0500 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]:40248) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HV-0007bJ-Ov for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:03 -0500 Received: by mail-pl1-x636.google.com with SMTP id z7so12462508plk.7 for ; Tue, 02 Mar 2021 09:58:01 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:57:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+dmSE8N34SoJjro0pmrBj+i1Q6RRI4T10gidnvhwlpU=; b=ZvSPVF6lZxeECdYfAGs+y7cnEfnS+TwGZnY2anZzrTooUSUBtiBzJ/1rf8wCcFJe6i 1fgePkbtAzKOnW5uxHxj31AsdvqEeo33qurDdEQw4GJ3K7bQeGrr0S6GsfkgS/tvB5NA IsSfG0V5s+aqYTlNtHnpzzsqrQ41vHq+83bGoizdlO0+RH9C9gpmmDqUnLO7tgk+iCaQ CNZZKbekpoApHWQGk0MyPevpUGYUQEBL/rDIFRN1nqYvI2Os6W96jtFc1q3TIJsfEoMU 4h3U64bGhbwIRu4cC+9uT4ZdZzmRVsy3PPVD83fXhjn8gN3BHBeOMWmM6rpLF6423GZ8 f0Lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+dmSE8N34SoJjro0pmrBj+i1Q6RRI4T10gidnvhwlpU=; b=ZNDQNLStiSf+L/eup+kb5lquVOBnWUooqBZvFUu7g+cI0LUNVOpXrOeoNXEKB9Pk5j LIG/xxto7GyRDb2ISsXLxRkd9lI7CmXyy0CmiJVIhePNxBxWeIGeW4v4+oeRWQs3AZ0V c7wAUP3qrr4zk19eGl49Thjhtn9C5pXulVZ0nr0Wbs9UJ5omMh86O6mVviFM6pNnhf5V ImfixhfToSYRUjUYeHPHSHOMnoSyuNbLbspgKPZWNO9w2TNdG4D5nI6xhuLMt47rtepB 5/PwzX17+BoLZ4QaBf/Uln2M0YXu2A13xdQs/5sDo9xWZPq7xZgltxGFWJlb5ZZ1PDWh M7Nw== X-Gm-Message-State: AOAM5330z7fgFYT4U2dt6vxInyX41/W1ol3eznpjcyessj49LRuta9o+ mlZum25puFW9FocuyIFWu6ZjFL35BZTwMA== X-Google-Smtp-Source: ABdhPJyin2ogFExAQnGyBQlFXd9SEPggVgKd0s5hZ5+BQPH7o0zMO+91O3dZhEXanUC426SZlL65+w== X-Received: by 2002:a17:90a:4fc1:: with SMTP id q59mr5809150pjh.129.1614707880415; Tue, 02 Mar 2021 09:58:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 16/27] tcg/tci: Remove tci_read_r32 Date: Tue, 2 Mar 2021 09:57:30 -0800 Message-Id: <20210302175741.1079851-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use explicit casts for ext32u opcodes, and allow truncation to happen for other users. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 122 ++++++++++++++++++++++++------------------------------ 1 file changed, 54 insertions(+), 68 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 8b91e6efc3..a5aaa763f8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -64,11 +64,6 @@ static int32_t tci_read_reg32s(const tcg_target_ulong *r= egs, TCGReg index) } #endif =20 -static uint32_t tci_read_reg32(const tcg_target_ulong *regs, TCGReg index) -{ - return (uint32_t)tci_read_reg(regs, index); -} - #if TCG_TARGET_REG_BITS =3D=3D 64 static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index) { @@ -145,22 +140,13 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_= t **tb_ptr) return value; } =20 -/* Read indexed register (32 bit) from bytecode. */ -static uint32_t tci_read_r32(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - uint32_t value =3D tci_read_reg32(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} - #if TCG_TARGET_REG_BITS =3D=3D 32 /* Read two indexed registers (2 * 32 bit) from bytecode. */ static uint64_t tci_read_r64(const tcg_target_ulong *regs, const uint8_t **tb_ptr) { - uint32_t low =3D tci_read_r32(regs, tb_ptr); - return tci_uint64(tci_read_r32(regs, tb_ptr), low); + uint32_t low =3D tci_read_r(regs, tb_ptr); + return tci_uint64(tci_read_r(regs, tb_ptr), low); } #elif TCG_TARGET_REG_BITS =3D=3D 64 /* Read indexed register (32 bit signed) from bytecode. */ @@ -404,8 +390,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, continue; case INDEX_op_setcond_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); condition =3D *tb_ptr++; tci_write_reg(regs, t0, tci_compare32(t1, t2, condition)); break; @@ -428,7 +414,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #endif case INDEX_op_mov_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1); break; case INDEX_op_tci_movi_i32: @@ -484,7 +470,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; case INDEX_op_st_i32: CASE_64(st32) - t0 =3D tci_read_r32(regs, &tb_ptr); + t0 =3D tci_read_r(regs, &tb_ptr); t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint32_t *)(t1 + t2) =3D t0; @@ -494,62 +480,62 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_add_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 + t2); break; case INDEX_op_sub_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 - t2); break; case INDEX_op_mul_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; case INDEX_op_div_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2); break; case INDEX_op_divu_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 / t2); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint32_t)t1 / (uint32_t)t2); break; case INDEX_op_rem_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2); break; case INDEX_op_remu_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 % t2); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2); break; case INDEX_op_and_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 & t2); break; case INDEX_op_or_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 | t2); break; case INDEX_op_xor_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 ^ t2); break; =20 @@ -557,41 +543,41 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_shl_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 << (t2 & 31)); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint32_t)t1 << (t2 & 31)); break; case INDEX_op_shr_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 >> (t2 & 31)); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint32_t)t1 >> (t2 & 31)); break; case INDEX_op_sar_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg(regs, t0, ((int32_t)t1 >> (t2 & 31))); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int32_t)t1 >> (t2 & 31)); break; #if TCG_TARGET_HAS_rot_i32 case INDEX_op_rotl_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, rol32(t1, t2 & 31)); break; case INDEX_op_rotr_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, ror32(t1, t2 & 31)); break; #endif #if TCG_TARGET_HAS_deposit_i32 case INDEX_op_deposit_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - t2 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tmp16 =3D *tb_ptr++; tmp8 =3D *tb_ptr++; tmp32 =3D (((1 << tmp8) - 1) << tmp16); @@ -599,8 +585,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif case INDEX_op_brcond_i32: - t0 =3D tci_read_r32(regs, &tb_ptr); - t1 =3D tci_read_r32(regs, &tb_ptr); + t0 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); condition =3D *tb_ptr++; label =3D tci_read_label(&tb_ptr); if (tci_compare32(t0, t1, condition)) { @@ -638,9 +624,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, case INDEX_op_mulu2_i32: t0 =3D *tb_ptr++; t1 =3D *tb_ptr++; - t2 =3D tci_read_r32(regs, &tb_ptr); - tmp64 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg64(regs, t1, t0, t2 * tmp64); + t2 =3D tci_read_r(regs, &tb_ptr); + tmp64 =3D (uint32_t)tci_read_r(regs, &tb_ptr); + tci_write_reg64(regs, t1, t0, (uint32_t)t2 * tmp64); break; #endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ #if TCG_TARGET_HAS_ext8s_i32 @@ -681,21 +667,21 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, #if TCG_TARGET_HAS_bswap32_i32 case INDEX_op_bswap32_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap32(t1)); break; #endif #if TCG_TARGET_HAS_not_i32 case INDEX_op_not_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, ~t1); break; #endif #if TCG_TARGET_HAS_neg_i32 case INDEX_op_neg_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, -t1); break; #endif @@ -892,8 +878,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #endif case INDEX_op_extu_i32_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (uint32_t)t1); break; #if TCG_TARGET_HAS_bswap16_i64 case INDEX_op_bswap16_i64: @@ -905,7 +891,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_HAS_bswap32_i64 case INDEX_op_bswap32_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap32(t1)); break; #endif --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CWFm3ag7LIImv7AYnXLhQJhOkm+Ptc6YBLG0M9ot5EY=; b=gt7UnfEP0pNrXs+6tVWNdwtmsuEug8fmhFW3kzP+QmzJ6zvVCV/vPedK+IT61noD2a MELaAQ5JV5fDk41q89KmRs27EhtOSc4J39nROWZLoScA4bHqBuneKX82l5F6Zqh6btaB ubP5yxeDK6Zo0lqjJIiRH7QOM0d4xHYTPrCB1n76mZOxdNHjZhthM0K1gzbvq5lcYkdh tuMe68yENBAq4H+CVR7oJ5br9+2U1Cy3M7k5Q4Y+DR2spsCp04QV1s2gtVFQ2wC8/vth THXifg7mDdTZIBDtiOSM3KzWMdw3PcCGVQybzXgvqdA+XWQWF74g9mZcEIUjEfWBYeFQ uuWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CWFm3ag7LIImv7AYnXLhQJhOkm+Ptc6YBLG0M9ot5EY=; b=pliEk2R1kQRqgYomu1kTG0Mql3XlH7XgOc3X1cQkBe/XB9DxSLUoD5sS8O3kYrkPvK yCb01rxN4rBNq0MYcBF8EJ0ul1rBQh6hNgkLhe3tT137o24TcZc0Yc58GdmCmy40v686 kNuPTiZC28R6Xx/mU62Gwp4IymEnUsdqv/ty4Qd+NtbckR+J4qKfw/5OPPCkW+0C/wrQ juUn37km3jRPKljJo+MuPahhsmiWZmL0u1oOdt3tGeH818Kk42KC/i0Pfmpn9dkQmDHe 3tZPclY2XuiDlc2uNNE4Djywcpt9N8Id9jELglAIMRURHXkwcfbI1Jyh+gER3SdVpFZo sWEA== X-Gm-Message-State: AOAM531LtwmWXXIIemSR6bKf/h3ZjpVJfuRj9g35FNc2eIQW2ncAG6gV Rj7yrh9Pe+U0UvB4ierkglYOuDngoDpo6A== X-Google-Smtp-Source: ABdhPJzzeJpKDhBe9GoG3+OdF6ev/5nRCuDdVjCu/rDtZecQxMa1DCMcq1l1qvbHJOmQ0KsLL5EuSg== X-Received: by 2002:a62:ae05:0:b029:1ed:9384:3e6f with SMTP id q5-20020a62ae050000b02901ed93843e6fmr20602260pff.44.1614707881398; Tue, 02 Mar 2021 09:58:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 17/27] tcg/tci: Remove tci_read_r32s Date: Tue, 2 Mar 2021 09:57:31 -0800 Message-Id: <20210302175741.1079851-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use explicit casts for ext32s opcodes. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index a5aaa763f8..cef12f263d 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -57,13 +57,6 @@ static tcg_target_ulong tci_read_reg(const tcg_target_ul= ong *regs, TCGReg index) return regs[index]; } =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 -static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index) -{ - return (int32_t)tci_read_reg(regs, index); -} -#endif - #if TCG_TARGET_REG_BITS =3D=3D 64 static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index) { @@ -149,15 +142,6 @@ static uint64_t tci_read_r64(const tcg_target_ulong *r= egs, return tci_uint64(tci_read_r(regs, tb_ptr), low); } #elif TCG_TARGET_REG_BITS =3D=3D 64 -/* Read indexed register (32 bit signed) from bytecode. */ -static int32_t tci_read_r32s(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - int32_t value =3D tci_read_reg32s(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} - /* Read indexed register (64 bit) from bytecode. */ static uint64_t tci_read_r64(const tcg_target_ulong *regs, const uint8_t **tb_ptr) @@ -870,8 +854,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #endif case INDEX_op_ext_i32_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r32s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int32_t)t1); break; #if TCG_TARGET_HAS_ext32u_i64 case INDEX_op_ext32u_i64: --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614709445; cv=none; d=zohomail.com; s=zohoarc; b=cRKqLmntt4lXb7m2IBiHhhNzvRy8ru0Rgc0yHK+YDHGiIUC0vuwY0OIJ4/pyueig66gIsU8LR0rXMtCJ2uncaf34snF8wYp8mJLUwtfg4+9osvzUCE6dhea5gEnBoeOtPAOcWNAzLK3gfVIunXyBZnWNGjdtK3imILXDZiWpO78= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614709445; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=v2unlqfJMNyj9BFPXRcywsgxR3r17wjB0hRJKjBA1xY=; b=SD8Gqz7DCUa5n5CNtpDlKfEWdjdXANwsnxsCRjrfvqGDmAJ5VGKCTD6yfhxhExiz4Cn06EUw4bjj7LGe7eHk9aCeDa/87/UMcZWtGeSUnb995DZQkq/fTVH12nyMEnHh1aeW+PKf8L3PjjCFxsmh02Venx+fwQeBIVSwXsas/tg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161470944530845.66400520817183; Tue, 2 Mar 2021 10:24:05 -0800 (PST) Received: from localhost ([::1]:58574 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9gh-0007WK-RX for importer@patchew.org; Tue, 02 Mar 2021 13:24:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59412) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9HZ-00036f-T7 for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:05 -0500 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]:39176) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9HX-0007bk-Qp for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:05 -0500 Received: by mail-pl1-x635.google.com with SMTP id k22so12467881pll.6 for ; Tue, 02 Mar 2021 09:58:03 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v2unlqfJMNyj9BFPXRcywsgxR3r17wjB0hRJKjBA1xY=; b=JtXcUd1klUFsE6pso+rRtO4uJNRmQ0M8FaP3j7r9g8VAL8RkEvDUhzYR7Rq9sJsfjt XE18KVG06wu+x46ZGlXLF6+05SDxGmbG3R5yg+IDlte9aBR9hLk2V2f3/B9kNGzWhGkj 7zMh/mVvAZD7VnPjHFwKOzRDIzcUIqCvoJKr5kbDd7PVe8vhM9RROxcbQ29bE+IyPECr tpTS69PK3qMKgmH0BonzTTFx14gZpfhbT3NenHF+iH043r5Smj5jQdP6Jjz9ZWsJc99v URc6X+QvOiLhsZPq7+l9M17t0jiSvnkrEjFUpxPMHhCamCsG4izAFxIBCNCrbwzZZ4ZE Vv7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v2unlqfJMNyj9BFPXRcywsgxR3r17wjB0hRJKjBA1xY=; b=r55NSuKgtWaZEdIeVdXIRzm3Zfv2A2K3p9BZIhZLUiyY9P5aC2TOg6rm3tHKkGITas sprri2elp8wCe/9IPg/NLLSLPdyifGYxfivpfVW1jSKAOsdd5a0vNfP1reEwcgE9KIV1 1BGy2QME5wBPy5DzDYJPfhOEqVEIMUQkewLFyreaF3pnWrBN4vDVjflWs85GBOEoi4Fs Ir0MA3mvxUFBxXUyYfVU975D3riucAvYUkFJ+EximiQvNAaP9qgwujFU4oIqKrdOCMql WLnd1khE9O5/niXEKEWtPMDb8kOy0FyEh1j2kYJxMSYRnvlRPIkt9BeFfbqOrQBdzHNv qhKQ== X-Gm-Message-State: AOAM533+Q4oVYxtVbikmNZ5BFb6ChQnCAbixirosU49luRWuL1jz/C/y t8z8POs5E2qFL+UZC6THVx0U7xy4TRwizQ== X-Google-Smtp-Source: ABdhPJwmWR+dxsk3O2oB1wksXYQ3YMBgWT7snD18t1OHayqjmwsvMCdBOCyOULrKLu8p3f5BTSvEdw== X-Received: by 2002:a17:90a:5914:: with SMTP id k20mr5535871pji.199.1614707882471; Tue, 02 Mar 2021 09:58:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 18/27] tcg/tci: Reduce use of tci_read_r64 Date: Tue, 2 Mar 2021 09:57:32 -0800 Message-Id: <20210302175741.1079851-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) In all cases restricted to 64-bit hosts, tcg_read_r is identical. We retain the 64-bit symbol for the single case of INDEX_op_qemu_st_i64. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 93 +++++++++++++++++++++++++------------------------------ 1 file changed, 42 insertions(+), 51 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index cef12f263d..9efe69d05f 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -57,13 +57,6 @@ static tcg_target_ulong tci_read_reg(const tcg_target_ul= ong *regs, TCGReg index) return regs[index]; } =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 -static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index) -{ - return tci_read_reg(regs, index); -} -#endif - static void tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) { @@ -146,9 +139,7 @@ static uint64_t tci_read_r64(const tcg_target_ulong *re= gs, static uint64_t tci_read_r64(const tcg_target_ulong *regs, const uint8_t **tb_ptr) { - uint64_t value =3D tci_read_reg64(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; + return tci_read_r(regs, tb_ptr); } #endif =20 @@ -390,8 +381,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #elif TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_setcond_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); condition =3D *tb_ptr++; tci_write_reg(regs, t0, tci_compare64(t1, t2, condition)); break; @@ -672,7 +663,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #if TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_mov_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1); break; case INDEX_op_tci_movi_i64: @@ -696,7 +687,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); break; case INDEX_op_st_i64: - t0 =3D tci_read_r64(regs, &tb_ptr); + t0 =3D tci_read_r(regs, &tb_ptr); t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint64_t *)(t1 + t2) =3D t0; @@ -706,62 +697,62 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_add_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 + t2); break; case INDEX_op_sub_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 - t2); break; case INDEX_op_mul_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; case INDEX_op_div_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int64_t)t1 / (int64_t)t2); break; case INDEX_op_divu_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint64_t)t1 / (uint64_t)t2); break; case INDEX_op_rem_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int64_t)t1 % (int64_t)t2); break; case INDEX_op_remu_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2); break; case INDEX_op_and_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 & t2); break; case INDEX_op_or_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 | t2); break; case INDEX_op_xor_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 ^ t2); break; =20 @@ -769,41 +760,41 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_shl_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 << (t2 & 63)); break; case INDEX_op_shr_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 >> (t2 & 63)); break; case INDEX_op_sar_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, ((int64_t)t1 >> (t2 & 63))); break; #if TCG_TARGET_HAS_rot_i64 case INDEX_op_rotl_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, rol64(t1, t2 & 63)); break; case INDEX_op_rotr_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, ror64(t1, t2 & 63)); break; #endif #if TCG_TARGET_HAS_deposit_i64 case INDEX_op_deposit_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); - t2 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); tmp16 =3D *tb_ptr++; tmp8 =3D *tb_ptr++; tmp64 =3D (((1ULL << tmp8) - 1) << tmp16); @@ -811,8 +802,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif case INDEX_op_brcond_i64: - t0 =3D tci_read_r64(regs, &tb_ptr); - t1 =3D tci_read_r64(regs, &tb_ptr); + t0 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); condition =3D *tb_ptr++; label =3D tci_read_label(&tb_ptr); if (tci_compare64(t0, t1, condition)) { @@ -882,21 +873,21 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, #if TCG_TARGET_HAS_bswap64_i64 case INDEX_op_bswap64_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap64(t1)); break; #endif #if TCG_TARGET_HAS_not_i64 case INDEX_op_not_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, ~t1); break; #endif #if TCG_TARGET_HAS_neg_i64 case INDEX_op_neg_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r64(regs, &tb_ptr); + t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, -t1); break; #endif --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614709632; cv=none; d=zohomail.com; s=zohoarc; b=dD/rsi9vVLGFYQ5MwfQSBKjw4dTzh623TafO7j+izn+F0EpmKeAqW/YSbIdVhZnw1ht6v71DAVau9hS48fZLhhjIX6jyMwiQCI9+R+NDxzE6WN1S7+IalEf2biwVYuAM0OZoLGj5LyE2VPDpr9Kxw5MZ7Euwfp6eUhmEajzMeZc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614709632; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5opNq1HXc5ZvZ4ePdaKdxyOS1mjysh0i6AOuC6K4OYo=; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5opNq1HXc5ZvZ4ePdaKdxyOS1mjysh0i6AOuC6K4OYo=; b=sqyPBjCoVxLbslvGCYHMNFiXINmIiAPZC90r3dIBeUgYK0IFBJoJZU7WXLYv2zTm9F OUfCo2hAwGfMqTq54zbFLZBF3cBUok/PXWDsTVws0DscVlqMzGhWtJ3GqQwoppJC1YH2 W9aE3E6NX4NDMbjg/pCpeNZIAqvCnpr1cxNaOwi/9ccidwpvRBLJcSvqetscWUeyStT1 Z/4VJVIfBFndl8j+VUZpVGRrOl3aj5MU+hnN7/vXJvxydXik140CJFryOVUxOzTxDThR 7dWqQV1nJd75CuZWH3uDVVACF1+qmMdDtyE4PXqCukCDrSpInC3H/DBHlBh9khbrdeX6 Q6Lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5opNq1HXc5ZvZ4ePdaKdxyOS1mjysh0i6AOuC6K4OYo=; b=Z5pzjX+lClWLCjRPpWWosxfhInFEFKYUcIui9ZDHE1gYPjj2T8hEpO9FBs7dyF+x7U MlXjfYMbZIda1yj6paX5I5CjWjrHYH16pQnKTe4Il9rXcFavm48IElT05pRqKt//UYTM wfjHLo/KQf/G+5C9zyaGaCul6sh+wLRH78OMUvH2ty1qVdFn/ve5H75hu9QKv4D93pIs 4FuQcIvMgNDpdJkRH39wTZuBjiju3LkYZAwwjrkV4JjpEYIy/dWx5S99xgQxirmz0yRJ woiVjJflPGh6D2ykoyGqwZt5MgUtfd/3vvEosfLzJ1PNk6IKIjk3ahvw5dihZxhknGYj oTJQ== X-Gm-Message-State: AOAM5314OE+9ZzXo1OsV9zAVuj+4LUmigjdqwXVND9kTgXsv0c/RT1eO zvfcTZhxhx74EG4kC13nSSHLjdU0/j+/yg== X-Google-Smtp-Source: ABdhPJyZrlJDeeEsG6r5LMMQaGTBIQgd6M6FCWk6C5o5G3kfLeMXGw3bOD4EcRyWbdR+g1FaHEGK0w== X-Received: by 2002:a05:6a00:1506:b029:1bc:6f53:8eb8 with SMTP id q6-20020a056a001506b02901bc6f538eb8mr4318869pfu.36.1614707883903; Tue, 02 Mar 2021 09:58:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 19/27] tcg/tci: Merge basic arithmetic operations Date: Tue, 2 Mar 2021 09:57:33 -0800 Message-Id: <20210302175741.1079851-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) This includes add, sub, mul, and, or, xor. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 83 +++++++++++++++++-------------------------------------- 1 file changed, 25 insertions(+), 58 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 9efe69d05f..d0bf810781 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -451,26 +451,47 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, *(uint32_t *)(t1 + t2) =3D t0; break; =20 - /* Arithmetic operations (32 bit). */ + /* Arithmetic operations (mixed 32/64 bit). */ =20 - case INDEX_op_add_i32: + CASE_32_64(add) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 + t2); break; - case INDEX_op_sub_i32: + CASE_32_64(sub) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 - t2); break; - case INDEX_op_mul_i32: + CASE_32_64(mul) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; + CASE_32_64(and) + t0 =3D *tb_ptr++; + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, t1 & t2); + break; + CASE_32_64(or) + t0 =3D *tb_ptr++; + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, t1 | t2); + break; + CASE_32_64(xor) + t0 =3D *tb_ptr++; + t1 =3D tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, t1 ^ t2); + break; + + /* Arithmetic operations (32 bit). */ + case INDEX_op_div_i32: t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); @@ -495,24 +516,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2); break; - case INDEX_op_and_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 & t2); - break; - case INDEX_op_or_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 | t2); - break; - case INDEX_op_xor_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 ^ t2); - break; =20 /* Shift/rotate operations (32 bit). */ =20 @@ -695,24 +698,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, =20 /* Arithmetic operations (64 bit). */ =20 - case INDEX_op_add_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 + t2); - break; - case INDEX_op_sub_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 - t2); - break; - case INDEX_op_mul_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 * t2); - break; case INDEX_op_div_i64: t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); @@ -737,24 +722,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, t2 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2); break; - case INDEX_op_and_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 & t2); - break; - case INDEX_op_or_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 | t2); - break; - case INDEX_op_xor_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 ^ t2); - break; =20 /* Shift/rotate operations (64 bit). */ =20 --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rDTef7VWE7fxk2i0+V52DytmGBNiPfjpzsN2oBg9LYg=; b=R9XqPa+Hd5FSBHWbwXU6eOpqFaUZmwTbA8KdNewankvuiv7ZGgOrP4KQ4CENGqz30g B36mCWYxAGEmwXs06vtFgnUSlCvWvSzeRd0Uee7m/w1stPjG+5BRybKEEfCZjmvNxybD fUZOhDvIP0GyqgpFYaKzJFlrNVBL1R4sQXLjwC5KWcyOGidZPY4iHSxpUp6yVdLKch9J pPNirimYC69A+vBkvutrRem4sXB/Cw6HwmRqpUvd86CsOehA40Zic2/kVkFISEk2Ns2Y NuZS3F5Af7v6bri6Y+FzW8lnpnJ3aZsN6WhnYLGlLYW6QJE4UO/QuweFLPvq6LQWmPfR +iLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rDTef7VWE7fxk2i0+V52DytmGBNiPfjpzsN2oBg9LYg=; b=UiJDvsowtNe29T5AydOtungS9UqxT9J/4A4e8yInuhL9ejIn3/TQOCf6n4EkCiPFEQ bFV/rKF1B4Onnu0Kjie4avldPYGKXsaoYMp0JtvsrS3m2yL9vJDj1BUgPn5MywGLoh9q Qyc+ZPGZ6PFkpQ34Dzt62lg4mCyb8LCg4gzb25v8SHZtPe4GHkJusJhAcdm7eEOZuZ/g Hbi01Q3Mjz76Qn9tdUlhXjYL9XpISn46dPiOejOyG14GAn6DooKA0GBrVktdxnu8GAzK zs+B7l9EWSkAr/CQ5XjRpLd8vsVUHxmDZApf586T4+SXlKOfR2QfsWt76Q2q2PWTl5Ry 7qBQ== X-Gm-Message-State: AOAM533dJJ9Oq2AEDRdzQacgnF38EaT4V7hrIcdhtCRWnP8Mw38IzLPu 4ezA+o2HEzawHjYk4HYOUmIjawviuGEqhQ== X-Google-Smtp-Source: ABdhPJzQYYw/BRBPkAFqj61jxNV0T9wzvGvcdPhAKzgzOkoy4OwhSS6yrZhw8ghmqYYS0NwmTleRIw== X-Received: by 2002:a05:6a00:22d6:b029:1cb:35ac:d8e0 with SMTP id f22-20020a056a0022d6b02901cb35acd8e0mr4150833pfj.17.1614707884877; Tue, 02 Mar 2021 09:58:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 20/27] tcg/tci: Merge extension operations Date: Tue, 2 Mar 2021 09:57:34 -0800 Message-Id: <20210302175741.1079851-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) This includes ext8s, ext8u, ext16s, ext16u. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 44 ++++++++------------------------------------ 1 file changed, 8 insertions(+), 36 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index d0bf810781..73f639d23a 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -607,29 +607,29 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, tci_write_reg64(regs, t1, t0, (uint32_t)t2 * tmp64); break; #endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ -#if TCG_TARGET_HAS_ext8s_i32 - case INDEX_op_ext8s_i32: +#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 + CASE_32_64(ext8s) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int8_t)t1); break; #endif -#if TCG_TARGET_HAS_ext16s_i32 - case INDEX_op_ext16s_i32: +#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 + CASE_32_64(ext16s) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int16_t)t1); break; #endif -#if TCG_TARGET_HAS_ext8u_i32 - case INDEX_op_ext8u_i32: +#if TCG_TARGET_HAS_ext8u_i32 || TCG_TARGET_HAS_ext8u_i64 + CASE_32_64(ext8u) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint8_t)t1); break; #endif -#if TCG_TARGET_HAS_ext16u_i32 - case INDEX_op_ext16u_i32: +#if TCG_TARGET_HAS_ext16u_i32 || TCG_TARGET_HAS_ext16u_i64 + CASE_32_64(ext16u) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint16_t)t1); @@ -779,34 +779,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, continue; } break; -#if TCG_TARGET_HAS_ext8u_i64 - case INDEX_op_ext8u_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint8_t)t1); - break; -#endif -#if TCG_TARGET_HAS_ext8s_i64 - case INDEX_op_ext8s_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, (int8_t)t1); - break; -#endif -#if TCG_TARGET_HAS_ext16s_i64 - case INDEX_op_ext16s_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, (int16_t)t1); - break; -#endif -#if TCG_TARGET_HAS_ext16u_i64 - case INDEX_op_ext16u_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint16_t)t1); - break; -#endif #if TCG_TARGET_HAS_ext32s_i64 case INDEX_op_ext32s_i64: #endif --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708620; cv=none; d=zohomail.com; s=zohoarc; b=i39WL0a2vAJukS8fuzPigXFj/r4Kor7eyDZS4OmyOebhmwCG0tyJEmBp7nWhVDSWbcOlrDUVduHhAx3LHOuPpjmDjyf8TQ9NSoSh1hT3ZKf+GsX2NHRK/NOTTrkI9yrqEoHem8iAZrrg9Vy5FgjWtnJ2MLDh3I8/hhIATQCIoiI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708620; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uBa0mYVDt9xRDsum9kHj5ruNUWIAR4QdH8Qq5PqaSbM=; b=KypiHHZA8GuzlFr9bVjsFsMu1S/bdjTp8PurKnTnqIAiP5vHCYiULks+HnSBpd/TxQgZpTZVh5siWwiI5ChD1pw6Ta1BTfdINNiug+kkhv2voC8Amn2gTHTjTx2iZd6AS01XVXwKEwcyc6Fmm4Xgejywa8fRW/xYbtQ1izYFruI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708620214950.5370269398738; Tue, 2 Mar 2021 10:10:20 -0800 (PST) Received: from localhost ([::1]:38444 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9TP-0004HQ-4a for importer@patchew.org; Tue, 02 Mar 2021 13:10:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59472) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9Hc-0003Cz-OX for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:08 -0500 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:43566) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9Hb-0007cS-4X for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:08 -0500 Received: by mail-pf1-x42f.google.com with SMTP id q204so13258475pfq.10 for ; Tue, 02 Mar 2021 09:58:06 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. [174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uBa0mYVDt9xRDsum9kHj5ruNUWIAR4QdH8Qq5PqaSbM=; b=tfJS/0etcfXZw8W4fw6/1eXkXd1qZZAOkpRDMnDYd7Lz8z2os4EDusvbL9kkzi9xgi WP//cdy/nyXI6egHKmO8t02ht1TJZn+XbWyVMTOpPFsEi5oWKdpcN0LSXZdX2sPaTd0o jP9D1z1RJTto89KprHq4hXV3KN9blxMLX2HTWjW/OTpmImyxbIhF2N6URtNuE8lKd40N JFlASJu5aD4Hi7sYrYHoLIVT1kVRWvOcgc0puyvnQafzvEc9XJLhlw+QA3cD58o7s33S o0p4wGYwA+SeX8XduTHE0hoMZxjE2SWCRMBmBwkfvtdefACAdBaQhzraA/K3cS529t1T uT+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uBa0mYVDt9xRDsum9kHj5ruNUWIAR4QdH8Qq5PqaSbM=; b=szuICiNCQVaAmstB8x8Gdlgg53CgXzzUa8oG2yN348NnGfUGI8xYUpgzgBKFfTqhQG YqiF1HnVV6lydRcdyMCgVQDbAzyO/Ldyacbb6s4UEyATxf9DbLaxDlEz+Xkm3zGmm2GE a7YI9VD1f/OH9Esaw8MhXBtpOyyVGkJHGOIRc+UMNNpUzWBahre6165YBbm/h0XaPraO 4Tp3itX7JmEjdg6GQZN6Ut7ABKXj//ELD+vaQZDvt4DqDwEtuKl9UMsOfTAKF7VgCJJB dtLM9v+pY+QhXNSa7QPR+U2+8UX/6HAjp78SkzJgfboGBK57TYA017uPlZ7IqGW1s3HC fIkg== X-Gm-Message-State: AOAM530uqsDjW3f7eqdHu7X2VHiZGu1mp3LOQfDW8OHn5fv048gglmbe qbcJvt4SULBaUo7xKosYSeziRaCazn5kWA== X-Google-Smtp-Source: ABdhPJzijbYz8cEf4fP2BdQ6B0aFKhbiZVG92CWuiNhRmc5j1ymQW/RWHuh2+ufg96kaLTLAhjYzlg== X-Received: by 2002:a05:6a00:16c7:b029:1b6:68a6:985a with SMTP id l7-20020a056a0016c7b02901b668a6985amr4381315pfc.44.1614707885921; Tue, 02 Mar 2021 09:58:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 21/27] tcg/tci: Merge bswap operations Date: Tue, 2 Mar 2021 09:57:35 -0800 Message-Id: <20210302175741.1079851-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) This includes bswap16 and bswap32. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 22 ++++------------------ 1 file changed, 4 insertions(+), 18 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 73f639d23a..66f2962d6e 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -635,15 +635,15 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, tci_write_reg(regs, t0, (uint16_t)t1); break; #endif -#if TCG_TARGET_HAS_bswap16_i32 - case INDEX_op_bswap16_i32: +#if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64 + CASE_32_64(bswap16) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap16(t1)); break; #endif -#if TCG_TARGET_HAS_bswap32_i32 - case INDEX_op_bswap32_i32: +#if TCG_TARGET_HAS_bswap32_i32 || TCG_TARGET_HAS_bswap32_i64 + CASE_32_64(bswap32) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, bswap32(t1)); @@ -795,20 +795,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1); break; -#if TCG_TARGET_HAS_bswap16_i64 - case INDEX_op_bswap16_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, bswap16(t1)); - break; -#endif -#if TCG_TARGET_HAS_bswap32_i64 - case INDEX_op_bswap32_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, bswap32(t1)); - break; -#endif #if TCG_TARGET_HAS_bswap64_i64 case INDEX_op_bswap64_i64: t0 =3D *tb_ptr++; --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708459; cv=none; d=zohomail.com; s=zohoarc; b=DtXyRDwFayNNcJZeYhbFGzVvm4XnVaCpmCDFGFC81Y/n0BWA9agGgOgQXByUxCXQP8/XtvIl8+J0b+kZoAQorxnuawnH2WxSJQGY6rBP4PemdYuXdoY7SK8U/aqk8y7JsjDFqsIdPCJjnN6tPVNsGktvjzDEpaYwvdq3w8mNyyI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708459; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Fjh8f4OqF602Y2BfCtcg6Y74/rLBbqgNaPqxsRG9w20=; b=O3YtcC9lHDYeJ+hrCiZuTs0AKu0UYvKES01TSB5JfvkF1FXB/WxSkcjQOo3UmA9s4xAHp6P4gmiC43Rm755yIFLktN3EGou+poT9P81CNfL+DbhW3+OIO5rOgf2+tofKPu3ZE3QrY7OhqANuCCVrrh/2t7t3E9g4uHRPMWFBw8I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614708459700960.8403139990102; Tue, 2 Mar 2021 10:07:39 -0800 (PST) Received: from localhost ([::1]:58406 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lH9Qn-0000mp-Rz for importer@patchew.org; Tue, 02 Mar 2021 13:07:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59482) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH9Hd-0003Eq-In for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:09 -0500 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]:42732) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lH9Hb-0007ca-TO for qemu-devel@nongnu.org; Tue, 02 Mar 2021 12:58:09 -0500 Received: by mail-pg1-x52b.google.com with SMTP id o38so14331973pgm.9 for ; Tue, 02 Mar 2021 09:58:07 -0800 (PST) Received: from localhost.localdomain (174-21-84-25.tukw.qwest.net. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tci.c | 29 +++++------------------------ 1 file changed, 5 insertions(+), 24 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 66f2962d6e..3ccd30c39c 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -387,7 +387,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, tci_write_reg(regs, t0, tci_compare64(t1, t2, condition)); break; #endif - case INDEX_op_mov_i32: + CASE_32_64(mov) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, t1); @@ -649,26 +649,21 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, tci_write_reg(regs, t0, bswap32(t1)); break; #endif -#if TCG_TARGET_HAS_not_i32 - case INDEX_op_not_i32: +#if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64 + CASE_32_64(not) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, ~t1); break; #endif -#if TCG_TARGET_HAS_neg_i32 - case INDEX_op_neg_i32: +#if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64 + CASE_32_64(neg) t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, -t1); break; #endif #if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_mov_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); - break; case INDEX_op_tci_movi_i64: t0 =3D *tb_ptr++; t1 =3D tci_read_i64(&tb_ptr); @@ -802,20 +797,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_write_reg(regs, t0, bswap64(t1)); break; #endif -#if TCG_TARGET_HAS_not_i64 - case INDEX_op_not_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, ~t1); - break; -#endif -#if TCG_TARGET_HAS_neg_i64 - case INDEX_op_neg_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - tci_write_reg(regs, t0, -t1); - break; -#endif #endif /* TCG_TARGET_REG_BITS =3D=3D 64 */ =20 /* QEMU specific operations. */ --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614709749; cv=none; d=zohomail.com; s=zohoarc; b=WlzelHt6culSxPcJnQOFO6nwnDXOuN5O3gLVXjeZgUeTDl8IZGtE4AJnOEW5AjOGa1pKC3YeigdGqsR6sc++OIL8HlpU3fe9IzOWwWZaMa0d8L/DTMXPQ97MoFiOoDaUR95xDnl3DNYZkXq6STijYo4G8x8fQ926Q+7fR/3yZIQ= ARC-Message-Signature: i=1; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zRqYUHJr744xk/wD2YdfQmwhn9sj63KtxuT5dzyyfcc=; b=OG0zSimOSxIWE3zjRfwtXK5fzkQpJXaVmLptfTmcazyOHtHWktE7WM4pM/RY1X7k4t cy8WyIJHOBSs5PUcOVfwLTmWcSwBAbwYigly6hX/MfcBmxt3giBCThZnwnVEg3iWEt02 AJBtX5bVySu4E8eGGtM8wcRN/hI07Ffym45NUZcTmu8DcVs4NcVM5IKKQ5gfXBiVRstp aNwu8j70W591jTwHl8W+pIZQxwcNcSXLEgT9T8z2TDUvRXiPgJI++mAurLVMHizn4WyJ f3D675goN5ExUyr/YMIepXQeU3gT+AgJ2xRVCgxzynuaYEJ0scW4neuT9Ko3ecVPDM6O UIjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zRqYUHJr744xk/wD2YdfQmwhn9sj63KtxuT5dzyyfcc=; b=kLH9+PzsKNNhzDpjn7pKUQUUOgFDfwOExx4uxpmGYxZMgbA3g/ozrjC+OX0H970HQF pfi3gBIV/g8fRJBqn5MDsr97jbJm0xE1io3aaPU/qxbmoJZhKtwjVQcviCEbYBZtEQ5g /GCJ5tjrvtR9yXKnQPgJfmNhhMUeWVZ8seWq9UsdXjbFfGS7LzO8pPxcbd7GpdX/sigr hjaq7+FUmnMMsos01F9FO1ZYBEZ8H1rHvkU9dhU5DkdrMbKFZFocZdnyekzeELhDxnDd G6VZKlP2FRK01OS8gVcEW1sgWPJaoT8WbH4OZZFzPeZNJycpin8YFlH8avNhzWLFQUnr f2tw== X-Gm-Message-State: AOAM532hyzbdZU6dUGYokvSf/mWCf5pMAivSh8LyGKECteKMkDVA9xKc Xe2YY8aP1EWwbd4ZpACzcVmJXpnHMz3khw== X-Google-Smtp-Source: ABdhPJye79YsMErXLSBuCaqUxHox88/M1/U/o6xgm67d+K/P5cTq7f5bTe/G7snO/VGro7YoX843aQ== X-Received: by 2002:aa7:9010:0:b029:1ee:253b:ebca with SMTP id m16-20020aa790100000b02901ee253bebcamr4372579pfo.53.1614707887627; Tue, 02 Mar 2021 09:58:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction Date: Tue, 2 Mar 2021 09:57:37 -0800 Message-Id: <20210302175741.1079851-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Alex Benn=C3=A9e Having a function return either and valid TB and some system state seems excessive. It will make the subsequent re-factoring easier if we lookup the current state where we are. Signed-off-by: Alex Benn=C3=A9e Message-Id: <20210224165811.11567-2-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/tb-lookup.h | 18 ++++++++---------- accel/tcg/cpu-exec.c | 10 ++++++++-- accel/tcg/tcg-runtime.c | 4 +++- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h index 9cf475bb03..62a509535d 100644 --- a/include/exec/tb-lookup.h +++ b/include/exec/tb-lookup.h @@ -17,30 +17,28 @@ #include "exec/tb-hash.h" =20 /* Might cause an exception, so have a longjmp destination ready */ -static inline TranslationBlock * -tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_bas= e, - uint32_t *flags, uint32_t cf_mask) +static inline TranslationBlock * tb_lookup(CPUState *cpu, + target_ulong pc, target_ulong c= s_base, + uint32_t flags, uint32_t cf_mas= k) { - CPUArchState *env =3D (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; uint32_t hash; =20 - cpu_get_tb_cpu_state(env, pc, cs_base, flags); - hash =3D tb_jmp_cache_hash_func(*pc); + hash =3D tb_jmp_cache_hash_func(pc); tb =3D qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); =20 cf_mask &=3D ~CF_CLUSTER_MASK; cf_mask |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; =20 if (likely(tb && - tb->pc =3D=3D *pc && - tb->cs_base =3D=3D *cs_base && - tb->flags =3D=3D *flags && + tb->pc =3D=3D pc && + tb->cs_base =3D=3D cs_base && + tb->flags =3D=3D flags && tb->trace_vcpu_dstate =3D=3D *cpu->trace_dstate && (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) =3D=3D cf_mas= k)) { return tb; } - tb =3D tb_htable_lookup(cpu, *pc, *cs_base, *flags, cf_mask); + tb =3D tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); if (tb =3D=3D NULL) { return NULL; } diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 16e4fe3ccd..ef96b312a1 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -245,6 +245,7 @@ static void cpu_exec_exit(CPUState *cpu) =20 void cpu_exec_step_atomic(CPUState *cpu) { + CPUArchState *env =3D (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; uint32_t flags; @@ -258,7 +259,9 @@ void cpu_exec_step_atomic(CPUState *cpu) g_assert(!cpu->running); cpu->running =3D true; =20 - tb =3D tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + tb =3D tb_lookup(cpu, pc, cs_base, flags, cf_mask); + if (tb =3D=3D NULL) { mmap_lock(); tb =3D tb_gen_code(cpu, pc, cs_base, flags, cflags); @@ -418,11 +421,14 @@ static inline TranslationBlock *tb_find(CPUState *cpu, TranslationBlock *last_tb, int tb_exit, uint32_t cf_mask) { + CPUArchState *env =3D (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; uint32_t flags; =20 - tb =3D tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + + tb =3D tb_lookup(cpu, pc, cs_base, flags, cf_mask); if (tb =3D=3D NULL) { mmap_lock(); tb =3D tb_gen_code(cpu, pc, cs_base, flags, cf_mask); diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index d736f4ff55..05e3d52c2f 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -152,7 +152,9 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env) target_ulong cs_base, pc; uint32_t flags; =20 - tb =3D tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, curr_cflags()); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + + tb =3D tb_lookup(cpu, pc, cs_base, flags, curr_cflags()); if (tb =3D=3D NULL) { return tcg_code_gen_epilogue; } --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1614708680; cv=none; d=zohomail.com; s=zohoarc; b=TgqbPUupQAZgpfOvmHDljqVc3G8H5MQQp7m7YFMfPg7RKMTWIUi7r8h+5pL8pAZYJwo1QSKWP7PDGENtWytODnjcbEM3LNNn1oC/1x9eKiQfnegI0mHZS6QqogNrL2WAuARSZgMBonuBVK3+m/1huA1xtB6O+u7CLfCXrsalZDI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614708680; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=acclXejcPgSIlezM5omUXEx8bJfnemtIS24m5TCaM+g=; b=qx5nSJKXwokyv1pqk6JShVsDwgOsTLloclZQmJjWPqCdHP6uFz/UOqgemfqwsa+HRs EMJwiFNZrYh2MHxFSYB3j7pMomajeG2hVEsreXTpq+dSxo5bQJJ6Dd7hXZTY9daSaxwk mkso0WL/uHE/yZ78wgvpWSOxtp+IV82pmX2/1e5iEyLBVhWs6tB0LoKmQc+gRg8uOLJ/ YiKDMFoIj5xlxazKucy0okPYcO8NtFIXTIHWWxSZNlO+GmNL1fv34QkMqU47BpR8msLE gOjR0cJG8B948yH66foXkFCxtx6ki4htDS28bLyi999ZQyhwNU6Miy3SuZpqafIaTlDr wcmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=acclXejcPgSIlezM5omUXEx8bJfnemtIS24m5TCaM+g=; b=Uc/aHY5Hg34XuS24+RlAxVuL4yE7dIfVmd7j2OFTT+3srBWuoo2hLH3SwxlfAVja8D EfIiX86fdNps+pcnQOaIRSObM+lvltzZSNUGR6wQBFohEZbRgW8peXLeku4CBw0EYeYU i2FatW4REBGsYRpFmcebRTpc+OxLFIy7/FPdblk7XunaFhkMq9Xo+LL6eiUkQR+2QvsF acH54uWOVJ1tBqjhxgqWNBOCqjovvnTI/7ZrVcdt6quG/RWnm7oqvZVdN8VbwH0Mmt5e hZjjF/ZL/9BtMUWbcQ4OmeNqWcWr2sFKvm4AFtvKtL8QWVn8qG+Bhzr68xDiSsedCX2k O35g== X-Gm-Message-State: AOAM5309oXejACSQlucYiMA3bJ3yRn9Bz44MGutLAYW0FxZXpG52vCR+ TmXMVBq3dHs5YUe8G7C0aYgCcy0XijnWDQ== X-Google-Smtp-Source: ABdhPJzDWTzdHv87KGNib/IbU1aSSNTbQa6NOThRCS5wuJp7wrZGfmx3lsWkH45wEFsEscDiP9VMGA== X-Received: by 2002:a63:fd0a:: with SMTP id d10mr18615719pgh.405.1614707888602; Tue, 02 Mar 2021 09:58:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 24/27] accel/tcg: move CF_CLUSTER calculation to curr_cflags Date: Tue, 2 Mar 2021 09:57:38 -0800 Message-Id: <20210302175741.1079851-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Alex Benn=C3=A9e There is nothing special about this compile flag that doesn't mean we can't just compute it with curr_cflags() which we should be using when building a new set. Signed-off-by: Alex Benn=C3=A9e Message-Id: <20210224165811.11567-3-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 8 +++++--- include/exec/tb-lookup.h | 3 --- accel/tcg/cpu-exec.c | 9 ++++----- accel/tcg/tcg-runtime.c | 2 +- accel/tcg/translate-all.c | 6 +++--- softmmu/physmem.c | 2 +- 6 files changed, 14 insertions(+), 16 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b7b3c0ef12..1a69c07add 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -519,10 +519,12 @@ static inline uint32_t tb_cflags(const TranslationBlo= ck *tb) } =20 /* current cflags for hashing/comparison */ -static inline uint32_t curr_cflags(void) +static inline uint32_t curr_cflags(CPUState *cpu) { - return (parallel_cpus ? CF_PARALLEL : 0) - | (icount_enabled() ? CF_USE_ICOUNT : 0); + uint32_t cflags =3D deposit32(0, CF_CLUSTER_SHIFT, 8, cpu->cluster_ind= ex); + cflags |=3D parallel_cpus ? CF_PARALLEL : 0; + cflags |=3D icount_enabled() ? CF_USE_ICOUNT : 0; + return cflags; } =20 /* TranslationBlock invalidate API */ diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h index 62a509535d..b2247d458b 100644 --- a/include/exec/tb-lookup.h +++ b/include/exec/tb-lookup.h @@ -27,9 +27,6 @@ static inline TranslationBlock * tb_lookup(CPUState *cpu, hash =3D tb_jmp_cache_hash_func(pc); tb =3D qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); =20 - cf_mask &=3D ~CF_CLUSTER_MASK; - cf_mask |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; - if (likely(tb && tb->pc =3D=3D pc && tb->cs_base =3D=3D cs_base && diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index ef96b312a1..45286dc4b3 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -249,8 +249,7 @@ void cpu_exec_step_atomic(CPUState *cpu) TranslationBlock *tb; target_ulong cs_base, pc; uint32_t flags; - uint32_t cflags =3D 1; - uint32_t cf_mask =3D cflags & CF_HASH_MASK; + uint32_t cflags =3D (curr_cflags(cpu) & ~CF_PARALLEL) | 1; int tb_exit; =20 if (sigsetjmp(cpu->jmp_env, 0) =3D=3D 0) { @@ -260,7 +259,7 @@ void cpu_exec_step_atomic(CPUState *cpu) cpu->running =3D true; =20 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); - tb =3D tb_lookup(cpu, pc, cs_base, flags, cf_mask); + tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); =20 if (tb =3D=3D NULL) { mmap_lock(); @@ -497,7 +496,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, = int *ret) if (replay_has_exception() && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra =3D= =3D 0) { /* Execute just one insn to trigger exception pending in the l= og */ - cpu->cflags_next_tb =3D (curr_cflags() & ~CF_USE_ICOUNT) | 1; + cpu->cflags_next_tb =3D (curr_cflags(cpu) & ~CF_USE_ICOUNT) | = 1; } #endif return false; @@ -794,7 +793,7 @@ int cpu_exec(CPUState *cpu) have CF_INVALID set, -1 is a convenient invalid value that does not require tcg headers for cpu_common_reset. */ if (cflags =3D=3D -1) { - cflags =3D curr_cflags(); + cflags =3D curr_cflags(cpu); } else { cpu->cflags_next_tb =3D -1; } diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 05e3d52c2f..99403e3eb3 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -154,7 +154,7 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env) =20 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); =20 - tb =3D tb_lookup(cpu, pc, cs_base, flags, curr_cflags()); + tb =3D tb_lookup(cpu, pc, cs_base, flags, curr_cflags(cpu)); if (tb =3D=3D NULL) { return tcg_code_gen_epilogue; } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index bbd919a393..f29b47f090 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2194,7 +2194,7 @@ tb_invalidate_phys_page_range__locked(struct page_col= lection *pages, if (current_tb_modified) { page_collection_unlock(pages); /* Force execution of one insn next time. */ - cpu->cflags_next_tb =3D 1 | curr_cflags(); + cpu->cflags_next_tb =3D 1 | curr_cflags(cpu); mmap_unlock(); cpu_loop_exit_noexc(cpu); } @@ -2362,7 +2362,7 @@ static bool tb_invalidate_phys_page(tb_page_addr_t ad= dr, uintptr_t pc) #ifdef TARGET_HAS_PRECISE_SMC if (current_tb_modified) { /* Force execution of one insn next time. */ - cpu->cflags_next_tb =3D 1 | curr_cflags(); + cpu->cflags_next_tb =3D 1 | curr_cflags(cpu); return true; } #endif @@ -2438,7 +2438,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retadd= r) * operations only (which execute after completion) so we don't * double instrument the instruction. */ - cpu->cflags_next_tb =3D curr_cflags() | CF_MEMI_ONLY | CF_LAST_IO | n; + cpu->cflags_next_tb =3D curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO |= n; =20 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, "cpu_io_recompile: rewound execution of TB to " diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 19e0aa9836..7e8b0fab89 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -937,7 +937,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, va= ddr len, cpu_loop_exit_restore(cpu, ra); } else { /* Force execution of one insn next time. */ - cpu->cflags_next_tb =3D 1 | curr_cflags(); + cpu->cflags_next_tb =3D 1 | curr_cflags(cpu); mmap_unlock(); if (ra) { cpu_restore_state(cpu, ra, true); --=20 2.25.1 From nobody Fri May 10 16:20:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B+zll2iOhU7hYhCD3J657ICTy/17drz9SvKi18L+0YM=; b=OwSaBs0uTFCI83+/4kAHwzzdUexJ+S05U3XTWxreeJuZrEoBkFQW8773URJmCB105H GXZpd6IidjqepQN+5vinHZW5yXafaokzrOK0Oh13J7BpweYA6jRWDxSfKUb8BT4YVMzi mvg2vhlu6pvXkb9EUYjapZH6VY58lIn2QvBpI2/HhX0mr1m5au3HLGQ12VD226EGAzRP qFdfibb3Lvdvuqcz52CioWJkXFfNE5F47eYuDDiLcIleQ4dlBI3cJQQqpaczXEMT1ETr f9pz8M8HVviQSQ/drgprwX3yp+s6TnESk8Ekoc1m/qRp92VrKrxx55YjbGgrclGnnRcJ xVBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B+zll2iOhU7hYhCD3J657ICTy/17drz9SvKi18L+0YM=; b=qW4heHOltmwib+sybb24dJE3kbWNbRmz3/pyfcYbYKmM2EqWL99lHCsuYZICA5qcpf HQFL65b3MzMu+9oGEvzcvCDFD4C+1RoBkvR0o+u6YiVkPxkbC1yrgYBK3i2OVknetcq7 ciPTFB5UBLNnedPXkMCY6GiD8abClcz8+k268IaA1pj2x2R8sui+im8QXlzOrC2K/F2v 2fgEkAUzBDvzrewgoT6pT0RgYskYiuMfWU9CgYx2gv7sPiSaZ0ymQtAkpxdDuWJ8LEWn 7y5w7bBfI/FXOj2yFPlH7gE2Qsk3YoTUJRZsvgtnBpMU4jK8mI+5wchatoCPAgVuKZnv JKaA== X-Gm-Message-State: AOAM531yQ6v7sXdrRmrzLgrd9OzF3DHcmb0FJE3RDo98CMP009YLV4R+ GC1iJ8HAfXTVqCTQJgKsuIIpYL/ACiGeww== X-Google-Smtp-Source: ABdhPJwm6LHuBvNivqSupmwlBIPg8NVWN6QT7/4wJDPGmCiD+Ui0k3V5lLcX3yUppQsLa5cg6NeGGw== X-Received: by 2002:a63:488:: with SMTP id 130mr3767422pge.408.1614707889605; Tue, 02 Mar 2021 09:58:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 25/27] accel/tcg: drop the use of CF_HASH_MASK and rename params Date: Tue, 2 Mar 2021 09:57:39 -0800 Message-Id: <20210302175741.1079851-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Alex Benn=C3=A9e We don't really deal in cf_mask most of the time. The one time it's relevant is when we want to remove an invalidated TB from the QHT lookup. Everywhere else we should be looking up things without CF_INVALID set. Signed-off-by: Alex Benn=C3=A9e Message-Id: <20210224165811.11567-4-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 4 +--- include/exec/tb-lookup.h | 9 ++++++--- accel/tcg/cpu-exec.c | 16 ++++++++-------- accel/tcg/tcg-runtime.c | 2 +- accel/tcg/translate-all.c | 8 +++++--- 5 files changed, 21 insertions(+), 18 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 1a69c07add..acf66ab692 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -460,8 +460,6 @@ struct TranslationBlock { #define CF_PARALLEL 0x00080000 /* Generate code for a parallel context = */ #define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ #define CF_CLUSTER_SHIFT 24 -/* cflags' mask for hashing/comparison, basically ignore CF_INVALID */ -#define CF_HASH_MASK (~CF_INVALID) =20 /* Per-vCPU dynamic tracing state used to generate this TB */ uint32_t trace_vcpu_dstate; @@ -538,7 +536,7 @@ void tb_flush(CPUState *cpu); void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, target_ulong cs_base, uint32_t flags, - uint32_t cf_mask); + uint32_t cflags); void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr); =20 /* GETPC is the true target of the return instruction that we'll execute. = */ diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h index b2247d458b..7b70412fae 100644 --- a/include/exec/tb-lookup.h +++ b/include/exec/tb-lookup.h @@ -19,11 +19,14 @@ /* Might cause an exception, so have a longjmp destination ready */ static inline TranslationBlock * tb_lookup(CPUState *cpu, target_ulong pc, target_ulong c= s_base, - uint32_t flags, uint32_t cf_mas= k) + uint32_t flags, uint32_t cflags) { TranslationBlock *tb; uint32_t hash; =20 + /* we should never be trying to look up an INVALID tb */ + tcg_debug_assert(!(cflags & CF_INVALID)); + hash =3D tb_jmp_cache_hash_func(pc); tb =3D qatomic_rcu_read(&cpu->tb_jmp_cache[hash]); =20 @@ -32,10 +35,10 @@ static inline TranslationBlock * tb_lookup(CPUState *cp= u, tb->cs_base =3D=3D cs_base && tb->flags =3D=3D flags && tb->trace_vcpu_dstate =3D=3D *cpu->trace_dstate && - (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) =3D=3D cf_mas= k)) { + tb_cflags(tb) =3D=3D cflags)) { return tb; } - tb =3D tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); + tb =3D tb_htable_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { return NULL; } diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 45286dc4b3..931da96c2b 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -307,7 +307,7 @@ struct tb_desc { CPUArchState *env; tb_page_addr_t phys_page1; uint32_t flags; - uint32_t cf_mask; + uint32_t cflags; uint32_t trace_vcpu_dstate; }; =20 @@ -321,7 +321,7 @@ static bool tb_lookup_cmp(const void *p, const void *d) tb->cs_base =3D=3D desc->cs_base && tb->flags =3D=3D desc->flags && tb->trace_vcpu_dstate =3D=3D desc->trace_vcpu_dstate && - (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) =3D=3D desc->cf_mask= ) { + tb_cflags(tb) =3D=3D desc->cflags) { /* check next page if needed */ if (tb->page_addr[1] =3D=3D -1) { return true; @@ -341,7 +341,7 @@ static bool tb_lookup_cmp(const void *p, const void *d) =20 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, target_ulong cs_base, uint32_t flags, - uint32_t cf_mask) + uint32_t cflags) { tb_page_addr_t phys_pc; struct tb_desc desc; @@ -350,7 +350,7 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, targe= t_ulong pc, desc.env =3D (CPUArchState *)cpu->env_ptr; desc.cs_base =3D cs_base; desc.flags =3D flags; - desc.cf_mask =3D cf_mask; + desc.cflags =3D cflags; desc.trace_vcpu_dstate =3D *cpu->trace_dstate; desc.pc =3D pc; phys_pc =3D get_page_addr_code(desc.env, pc); @@ -358,7 +358,7 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, targe= t_ulong pc, return NULL; } desc.phys_page1 =3D phys_pc & TARGET_PAGE_MASK; - h =3D tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate); + h =3D tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate); return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); } =20 @@ -418,7 +418,7 @@ static inline void tb_add_jump(TranslationBlock *tb, in= t n, =20 static inline TranslationBlock *tb_find(CPUState *cpu, TranslationBlock *last_tb, - int tb_exit, uint32_t cf_mask) + int tb_exit, uint32_t cflags) { CPUArchState *env =3D (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; @@ -427,10 +427,10 @@ static inline TranslationBlock *tb_find(CPUState *cpu, =20 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); =20 - tb =3D tb_lookup(cpu, pc, cs_base, flags, cf_mask); + tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { mmap_lock(); - tb =3D tb_gen_code(cpu, pc, cs_base, flags, cf_mask); + tb =3D tb_gen_code(cpu, pc, cs_base, flags, cflags); mmap_unlock(); /* We add the TB in the virtual pc hash table for the fast lookup = */ qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 99403e3eb3..49f5de37e8 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -27,10 +27,10 @@ #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" #include "exec/exec-all.h" -#include "exec/tb-lookup.h" #include "disas/disas.h" #include "exec/log.h" #include "tcg/tcg.h" +#include "exec/tb-lookup.h" =20 /* 32-bit helpers */ =20 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index f29b47f090..0b0bfd35ab 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1311,7 +1311,7 @@ static bool tb_cmp(const void *ap, const void *bp) return a->pc =3D=3D b->pc && a->cs_base =3D=3D b->cs_base && a->flags =3D=3D b->flags && - (tb_cflags(a) & CF_HASH_MASK) =3D=3D (tb_cflags(b) & CF_HASH_MASK)= && + (tb_cflags(a) & ~CF_INVALID) =3D=3D (tb_cflags(b) & ~CF_INVALID) && a->trace_vcpu_dstate =3D=3D b->trace_vcpu_dstate && a->page_addr[0] =3D=3D b->page_addr[0] && a->page_addr[1] =3D=3D b->page_addr[1]; @@ -1616,6 +1616,7 @@ static void do_tb_phys_invalidate(TranslationBlock *t= b, bool rm_from_page_list) PageDesc *p; uint32_t h; tb_page_addr_t phys_pc; + uint32_t orig_cflags =3D tb_cflags(tb); =20 assert_memory_lock(); =20 @@ -1626,7 +1627,7 @@ static void do_tb_phys_invalidate(TranslationBlock *t= b, bool rm_from_page_list) =20 /* remove the TB from the hash list */ phys_pc =3D tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK); - h =3D tb_hash_func(phys_pc, tb->pc, tb->flags, tb_cflags(tb) & CF_HASH= _MASK, + h =3D tb_hash_func(phys_pc, tb->pc, tb->flags, orig_cflags, tb->trace_vcpu_dstate); if (!qht_remove(&tb_ctx.htable, tb, h)) { return; @@ -1793,6 +1794,7 @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t phy= s_pc, uint32_t h; =20 assert_memory_lock(); + tcg_debug_assert(!(tb->cflags & CF_INVALID)); =20 /* * Add the TB to the page list, acquiring first the pages's locks. @@ -1811,7 +1813,7 @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t phy= s_pc, } =20 /* add in the hash table */ - h =3D tb_hash_func(phys_pc, tb->pc, tb->flags, tb->cflags & CF_HASH_MA= SK, + h =3D tb_hash_func(phys_pc, tb->pc, tb->flags, tb->cflags, tb->trace_vcpu_dstate); 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aOf1cOZjDd8LNAISdQKRprouUUYWtBc1pn+qViLGVw8=; b=PT4FxuaYl1otNlvVZDjG/wvJmuFdsVUmN7BsDAL/c6t5SPAqE55UYXDAVGOtP+iHAp ShQkPDhzlb9rr7TBefKAfgpRqltUaxZLrmtxpp5hijnHApBJGQJM6TT7BIvIv2uzY1y5 GUPD1cz8u2Hi/RhKLz0iEYw0aUzCaUbCiB0G8Ue09BMpKAzzrh02+88bPFAOq4P4/O2K DdpauTf4ayJN7Abw3p6VgsR5j3DxYGJXCi4eLKznBjJGaOnnLhHKmMDAkVUgxXyLchoj ZBtk57EwxAqTVguGVUMx+MZTEWBLQvFYR0DhOz0RAVtAGUKPp8BT9pzMl41lkixm6sT8 D5iA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aOf1cOZjDd8LNAISdQKRprouUUYWtBc1pn+qViLGVw8=; b=h6VJYTpRH6hOXtZT/9TAu1f1fvmsgjG0F57e0ECDDTlrCkOIkJ2xSPDxj3QQpm94tS mmzJa1Wx5Epc/Qins/UaZ5RrfoEqmPt1LfA63hHQ1ctkJnMXqWndrsb0S10plaBth0dK Kxhqh/kxV+xxXu4x73covkEysPI5Bl2YngW0xs8W6ZHyL+QxqxELTzpl47mQ8sj8r6+N Np7B+1azKHdJfyjl7DmcV2pplR1b2xiEW1qq/R582SFjlqQ1xIBbpJekn4jPyTEDJTER m/bIBPhmzJvfuG/3vpDH6iR1V1P2YPLghe28fJTtk8OHrKK/SoOrwRti0MbsHNGNN90B KlnA== X-Gm-Message-State: AOAM531pDmfKCpBn7BHG4BpaFQucdx10u7POQd0D5zLVe29vmLASaoua U6sGLwCYbrB/7dnpBgkbhC71lAPDjvkbLw== X-Google-Smtp-Source: ABdhPJwFTcvW4B7DWfrUelagSjR2Bqm8rdE8rIIx7eq8sKoL0gbG9phiYL1m5XQIV5rmE7JXHVr69A== X-Received: by 2002:a63:f1d:: with SMTP id e29mr16527458pgl.98.1614707890626; Tue, 02 Mar 2021 09:58:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 26/27] include/exec: lightly re-arrange TranslationBlock Date: Tue, 2 Mar 2021 09:57:40 -0800 Message-Id: <20210302175741.1079851-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Alex Benn=C3=A9e Lets make sure all the flags we compare when looking up blocks are together in the same place. Signed-off-by: Alex Benn=C3=A9e Message-Id: <20210224165811.11567-5-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index acf66ab692..75f8c3981a 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -448,9 +448,6 @@ struct TranslationBlock { target_ulong pc; /* simulated PC corresponding to this block (EIP + = CS base) */ target_ulong cs_base; /* CS base for this block */ uint32_t flags; /* flags defining in which context the code was genera= ted */ - uint16_t size; /* size of target code for this block (1 <=3D - size <=3D TARGET_PAGE_SIZE) */ - uint16_t icount; uint32_t cflags; /* compile flags */ #define CF_COUNT_MASK 0x00007fff #define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ @@ -464,6 +461,11 @@ struct TranslationBlock { /* Per-vCPU dynamic tracing state used to generate this TB */ uint32_t trace_vcpu_dstate; =20 + /* Above fields used for comparing */ + uint16_t size; /* size of target code for this block (1 <=3D + size <=3D TARGET_PAGE_SIZE) */ + uint16_t icount; + struct tb_tc tc; =20 /* first and second physical page containing code. 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[174.21.84.25]) by smtp.gmail.com with ESMTPSA id gf20sm4232234pjb.39.2021.03.02.09.58.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 09:58:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BvNJZkbgp0444AzDToZAUbD4V37bqCKnXbQLcQ4UvWM=; b=moYua+WbqCoAXjra0gQ4F7/lZWQk6+NG+siUVPDwGBP8n/HuoyX/vsd9Cab31dCSqY us1j2leFi2bKQQ1CQtbPKPgYrhYU/6JqFo7T6WeazhThr16AU9ehL6SPCfdkelWCxnHt upTcnXrKtUu3aP6nBOn/OcAB7uEa2XUkeeYpEPrw3MJ6M7NqHTHYC94DrtlbMlhPRiqt jgdYm+VpobsPlrsYiJ11hMQffkj1BKAXLTFoAMiPZ8UDBgPtvWSon5iYK78iz343CECg zlquzhGGVtLGQfg1o8f43TD0woAL32Qp6SlJFU/8DDM7R2r2b6Wx3r52JSfCalawOQtg BbUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BvNJZkbgp0444AzDToZAUbD4V37bqCKnXbQLcQ4UvWM=; b=Y2lvC+WU0hBIi7e+zpfwQJ9uFRZLYd8Uc+cvBvPRsd3yDggSlgQCqDITJTDctKUDX8 wc/hXp2noUui6OD8Ig4iQ/h0ggQBoUHd3swOndER8CiX8ObtGq3Wk4XlHNePhn6oGyfA rb7npRbkMjSv8QrUV586sDQei5YllBkq1zel1ggkNJkEnoNCVaNuz6WPZCG4KzA1qAgU N+cH3JBSYNzT8WRmzEoPhbQXiaUXdNjKcUTJ8ezeUBOgBYQkgqntvh65RZA8OiuNCD5b UOPvuhwFBrZxX0UnKuQE9zz0xuFBjMDYsIPaXxr5d1bsAOiNAIj09lmWF6n+QHVUJI77 v6kw== X-Gm-Message-State: AOAM531djrE2lNZYBEg1wMx5Q+AmZ7UShHmBfx8sIRiG9aA4srkbz8wr 3BDnIq9g4uaE7bNjqtVvBTRgDrUUFPmg/g== X-Google-Smtp-Source: ABdhPJyNiOSC0RWpM8dfTupLL7nSLQ0wZTm5DFIg14CHaE0hdveOH6xbjx8N9jewX02pTHM/wk5uLg== X-Received: by 2002:a63:2bc4:: with SMTP id r187mr19307105pgr.131.1614707891636; Tue, 02 Mar 2021 09:58:11 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 27/27] accel/tcg: Precompute curr_cflags into cpu->tcg_cflags Date: Tue, 2 Mar 2021 09:57:41 -0800 Message-Id: <20210302175741.1079851-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org> References: <20210302175741.1079851-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The primary motivation is to remove a dozen insns along the fast-path in tb_lookup. As a byproduct, this allows us to completely remove parallel_cpus. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- accel/tcg/tcg-accel-ops.h | 1 + include/exec/exec-all.h | 7 +------ include/hw/core/cpu.h | 2 ++ accel/tcg/cpu-exec.c | 3 --- accel/tcg/tcg-accel-ops-mttcg.c | 3 +-- accel/tcg/tcg-accel-ops-rr.c | 2 +- accel/tcg/tcg-accel-ops.c | 8 ++++++++ accel/tcg/translate-all.c | 4 ---- linux-user/main.c | 1 + linux-user/sh4/signal.c | 8 +++++--- linux-user/syscall.c | 18 ++++++++++-------- 11 files changed, 30 insertions(+), 27 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.h b/accel/tcg/tcg-accel-ops.h index 48130006de..6a5fcef889 100644 --- a/accel/tcg/tcg-accel-ops.h +++ b/accel/tcg/tcg-accel-ops.h @@ -17,5 +17,6 @@ void tcg_cpus_destroy(CPUState *cpu); int tcg_cpus_exec(CPUState *cpu); void tcg_handle_interrupt(CPUState *cpu, int mask); +void tcg_cpu_init_cflags(CPUState *cpu, bool parallel); =20 #endif /* TCG_CPUS_H */ diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 75f8c3981a..310f474540 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -510,8 +510,6 @@ struct TranslationBlock { uintptr_t jmp_dest[2]; }; =20 -extern bool parallel_cpus; - /* Hide the qatomic_read to make code a little easier on the eyes */ static inline uint32_t tb_cflags(const TranslationBlock *tb) { @@ -521,10 +519,7 @@ static inline uint32_t tb_cflags(const TranslationBloc= k *tb) /* current cflags for hashing/comparison */ static inline uint32_t curr_cflags(CPUState *cpu) { - uint32_t cflags =3D deposit32(0, CF_CLUSTER_SHIFT, 8, cpu->cluster_ind= ex); - cflags |=3D parallel_cpus ? CF_PARALLEL : 0; - cflags |=3D icount_enabled() ? CF_USE_ICOUNT : 0; - return cflags; + return cpu->tcg_cflags; } =20 /* TranslationBlock invalidate API */ diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c005d3dc2d..c68bc3ba8a 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -282,6 +282,7 @@ struct qemu_work_item; * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will * be the same as the cluster-id property of the CPU object's TYPE_CPU_C= LUSTER * QOM parent. + * @tcg_cflags: Pre-computed cflags for this cpu. * @nr_cores: Number of cores within this CPU package. * @nr_threads: Number of threads within this CPU. * @running: #true if CPU is currently running (lockless). @@ -412,6 +413,7 @@ struct CPUState { /* TODO Move common fields from CPUArchState here. */ int cpu_index; int cluster_index; + uint32_t tcg_cflags; uint32_t halted; uint32_t can_do_io; int32_t exception_index; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 931da96c2b..bdfa036ac8 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -267,8 +267,6 @@ void cpu_exec_step_atomic(CPUState *cpu) mmap_unlock(); } =20 - /* Since we got here, we know that parallel_cpus must be true. */ - parallel_cpus =3D false; cpu_exec_enter(cpu); /* execute the generated code */ trace_exec_tb(tb, pc); @@ -296,7 +294,6 @@ void cpu_exec_step_atomic(CPUState *cpu) * the execution. */ g_assert(cpu_in_exclusive_context(cpu)); - parallel_cpus =3D true; cpu->running =3D false; end_exclusive(); } diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttc= g.c index 42973fb062..847d2079d2 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.c +++ b/accel/tcg/tcg-accel-ops-mttcg.c @@ -114,8 +114,7 @@ void mttcg_start_vcpu_thread(CPUState *cpu) char thread_name[VCPU_THREAD_NAME_SIZE]; =20 g_assert(tcg_enabled()); - - parallel_cpus =3D (current_machine->smp.max_cpus > 1); + tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1); =20 cpu->thread =3D g_malloc0(sizeof(QemuThread)); cpu->halt_cond =3D g_malloc0(sizeof(QemuCond)); diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 4a66055e0d..018b54c508 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -269,7 +269,7 @@ void rr_start_vcpu_thread(CPUState *cpu) static QemuThread *single_tcg_cpu_thread; =20 g_assert(tcg_enabled()); - parallel_cpus =3D false; + tcg_cpu_init_cflags(cpu, false); =20 if (!single_tcg_cpu_thread) { cpu->thread =3D g_malloc0(sizeof(QemuThread)); diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 6144d9df87..6cdcaa2855 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -41,6 +41,14 @@ =20 /* common functionality among all TCG variants */ =20 +void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) +{ + uint32_t cflags =3D cpu->cluster_index << CF_CLUSTER_SHIFT; + cflags |=3D parallel ? CF_PARALLEL : 0; + cflags |=3D icount_enabled() ? CF_USE_ICOUNT : 0; + cpu->tcg_cflags =3D cflags; +} + void tcg_cpus_destroy(CPUState *cpu) { cpu_thread_signal_destroyed(cpu); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 0b0bfd35ab..f32df8b240 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -224,7 +224,6 @@ static void *l1_map[V_L1_MAX_SIZE]; TCGContext tcg_init_ctx; __thread TCGContext *tcg_ctx; TBContext tb_ctx; -bool parallel_cpus; =20 static void page_table_config_init(void) { @@ -1867,9 +1866,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, cflags =3D (cflags & ~CF_COUNT_MASK) | 1; } =20 - cflags &=3D ~CF_CLUSTER_MASK; - cflags |=3D cpu->cluster_index << CF_CLUSTER_SHIFT; - max_insns =3D cflags & CF_COUNT_MASK; if (max_insns =3D=3D 0) { max_insns =3D CF_COUNT_MASK; diff --git a/linux-user/main.c b/linux-user/main.c index 81f48ff54e..4f4746dce8 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -205,6 +205,7 @@ CPUArchState *cpu_copy(CPUArchState *env) /* Reset non arch specific state */ cpu_reset(new_cpu); =20 + new_cpu->tcg_cflags =3D cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); =20 /* Clone all break/watchpoints. diff --git a/linux-user/sh4/signal.c b/linux-user/sh4/signal.c index cc89a48ff8..29c1ee30e6 100644 --- a/linux-user/sh4/signal.c +++ b/linux-user/sh4/signal.c @@ -82,9 +82,11 @@ static abi_ulong get_sigframe(struct target_sigaction *k= a, return (sp - frame_size) & -8ul; } =20 -/* Notice when we're in the middle of a gUSA region and reset. - Note that this will only occur for !parallel_cpus, as we will - translate such sequences differently in a parallel context. */ +/* + * Notice when we're in the middle of a gUSA region and reset. + * Note that this will only occur when #CF_PARALLEL is unset, as we + * will translate such sequences differently in a parallel context. + */ static void unwind_gusa(CPUSH4State *regs) { /* If the stack pointer is sufficiently negative, and we haven't diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 389ec09764..9522f603aa 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -6481,6 +6481,16 @@ static int do_fork(CPUArchState *env, unsigned int f= lags, abi_ulong newsp, /* Grab a mutex so that thread setup appears atomic. */ pthread_mutex_lock(&clone_lock); =20 + /* + * If this is our first additional thread, we need to ensure we + * generate code for parallel execution and flush old translations. + * Do this now so that the copy gets CF_PARALLEL too. + */ + if (!(cpu->tcg_cflags & CF_PARALLEL)) { + cpu->tcg_cflags |=3D CF_PARALLEL; + tb_flush(cpu); + } + /* we create a new CPU instance. */ new_env =3D cpu_copy(env); /* Init regs that differ from the parent. */ @@ -6521,14 +6531,6 @@ static int do_fork(CPUArchState *env, unsigned int f= lags, abi_ulong newsp, sigprocmask(SIG_BLOCK, &sigmask, &info.sigmask); cpu->random_seed =3D qemu_guest_random_seed_thread_part1(); =20 - /* If this is our first additional thread, we need to ensure we - * generate code for parallel execution and flush old translations. - */ - if (!parallel_cpus) { - parallel_cpus =3D true; - tb_flush(cpu); - } - ret =3D pthread_create(&info.thread, &attr, clone_func, &info); /* TODO: Free new CPU state if thread creation failed. */ =20 --=20 2.25.1