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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id y11sm17365132ejd.72.2021.03.02.02.27.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 02:28:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DgLtxhW6TCh0Vt3N87A01jn3z88UQCjsPYLiOsnHu/I=; b=YlynJAlXKis3xlvlp8b6xXHhq0ZpkGKKUsa//dsaBGpYIxs1ee/4OjZMCRqF7puPiO MAwS7tiamXTZgyTqqn62PHPhe+SAStlPIrlUQ8L9EEeObQf+c3mthlsnxKdD3ndP5JbT P9s0lyYCSH7V43/m4zpPv9w/CPbWrmcgyuxJk3cNlUoaj5QarlqBGD9FWTk2PgLCjFI4 wcMnz4FQgr8jldgJckscDY7lK4QlWVWWR0eVlEdNgt4xXJHHVjPDXaj/F5EfwZ4b+KYk MrgHJS5hkpgMscFTsK3yejPKqySFuAIca00epUiNV/nilYnhDlsw6jt7rA/Q02j+4UNh jPZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=DgLtxhW6TCh0Vt3N87A01jn3z88UQCjsPYLiOsnHu/I=; b=dKLZ45IKS3SK09qqtEqRaFojb236HQn7uLi/muhpK6yLSACNc6PUmXRQHwpstho/aN 7HLIIYiqFxDeC598cjB3JOdwV5FCswyrJcQehYcy/X8q7EW2qcxu0+EqBuWi/98C0G5A PnJZNAx0H9jZ0qWnYYpIM7MmKEK1DGHZ6B+byvRPU0CWsZ/6xn+SgcPMJ7r6CgNuzJrF 5WxZwUVMZ458f1v+tX7ROIqGsSLboumCz6glPqxjTcVmt2S14cirfMpA2Nf+s90a9Ndz PQHr/D6pHiedlS9k2a9BTJJF7YTV9D6Mwym2YCMXF5ZQbsDNQdX00J0bkyzikIaTZQAr x8ug== X-Gm-Message-State: AOAM530tVKGqwC63OSpTHjfv7Tu1bMTa75Nn2v6TTZaDykJhcI4NjiDP 20GQ20rcLyo86dtkxFJKXuE= X-Google-Smtp-Source: ABdhPJxtBe1JyuD647B2YHW3dOzrYqzhDwPtmH10I8kjKvgq6yC2fTZ+sviIRfIIHi1N2BTa1Atj0Q== X-Received: by 2002:a05:6402:1d39:: with SMTP id dh25mr18074868edb.282.1614680881533; Tue, 02 Mar 2021 02:28:01 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Yoshinori Sato , Chris Wulff , qemu-ppc@nongnu.org, Marcel Apfelbaum , Greg Kurz , qemu-riscv@nongnu.org, Richard Henderson , Peter Maydell , Michael Walle , Palmer Dabbelt , Sarah Harris , Anthony Green , Eduardo Habkost , Bastian Koppelmann , Laurent Vivier , "Edgar E. Iglesias" , Claudio Fontana , Artyom Tarasenko , qemu-s390x@nongnu.org, Thomas Huth , Paolo Bonzini , Cornelia Huck , Taylor Simpson , Alistair Francis , Michael Rolnik , David Hildenbrand , Aleksandar Rikalo , Stafford Horne , Jiaxun Yang , Marek Vasut , Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, David Gibson , Sagar Karandikar , Guan Xuetao , Max Filippov , Aurelien Jarno Subject: [PATCH 3/7] target/arm: Directly use arm_cpu_has_work instead of CPUClass::has_work Date: Tue, 2 Mar 2021 11:27:33 +0100 Message-Id: <20210302102737.1031287-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210302102737.1031287-1-f4bug@amsat.org> References: <20210302102737.1031287-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) There is only one CPUClass::has_work() ARM handler: arm_cpu_has_work(). Avoid a dereference by declaring it in "internals.h" and call it directly in the WFI helper. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/internals.h | 1 + target/arm/cpu.c | 2 +- target/arm/op_helper.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 05cebc8597c..1930be08828 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -172,6 +172,7 @@ static inline int r14_bank_number(int mode) void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu); void arm_translate_init(void); =20 +bool arm_cpu_has_work(CPUState *cs); #ifdef CONFIG_TCG void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb); #endif /* CONFIG_TCG */ diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b8bc89e71fc..d03607c2684 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -76,7 +76,7 @@ void arm_cpu_synchronize_from_tb(CPUState *cs, } #endif /* CONFIG_TCG */ =20 -static bool arm_cpu_has_work(CPUState *cs) +bool arm_cpu_has_work(CPUState *cs) { ARMCPU *cpu =3D ARM_CPU(cs); =20 diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 65cb37d088f..a4da6f4fde8 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -289,7 +289,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len) CPUState *cs =3D env_cpu(env); int target_el =3D check_wfx_trap(env, false); =20 - if (cpu_has_work(cs)) { + if (arm_cpu_has_work(cs)) { /* Don't bother to go into our "low power state" if * we would just wake up immediately. */ --=20 2.26.2