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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id y8sm10716968eju.31.2021.03.01.13.52.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Mar 2021 13:53:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MXkQdWgohB9uSSp9OtT22O1oCJ949jTBzJW7O9qsdTc=; b=hNZjpVdrVI63phJbFYUzDIPLoonxJsaqtraOR5sYfaAoSgzWe7io18UVu0L6m7RhH4 bebZKBGTfRRLxU6MTxQX4UltQ7Smz38CS4M/cEI5pYD1dNlLhequCNf+vWDETmDo+Onn t/WipwsglUfsAUmVlJ+abKHbUhazMEvHJTmOxqYKUIYZvs3BqBuJYyeF5CC5n4vdYDS3 ZqAZV9zwDoHgK+LaBvifxtvxJmBxCg5CP0surZ2LI8zceyYSu5iiqK9HlY4Dw09AUUWB 7gevru6kx7Z4Ju8EX7X6p7zbhTT6MIpuQz0qEQ96pP/IcaSjzp4yqsdLKQ+iScPEJa1x wE4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=MXkQdWgohB9uSSp9OtT22O1oCJ949jTBzJW7O9qsdTc=; b=G4qWSs0VGAyQm4JyxMJBuqKrZodu7kTPOvEF+xvENjlBitpyOT+O4cIkxGKckmfyoJ om2MyBE1e6nF6mJZEK+nIRp6NLH58I9zMnKFNOoktJAe/su/phu3An8FSSL+eo7HzzZS z0PqfiNE0BEjOlYPAb/CcdmI3sKL9sK/fvcgG7YkbZZGqw6Hs8qkLMBan4GhpR54FI3T O4F6eCCWMG/GUUwFZjKplTzvpAzfSomRMLkVlNo9A0HQrEE1ntWT9XV3WK9OwRQFjhHD Zm+kBxcDI2cCrPmHXK0FQXUc7Ev9BWqzIXHuvA2OYsyZwYX6eTpbeP22yl8+O/tavx8Q IXaw== X-Gm-Message-State: AOAM5311KMGU8COF+YbVd08XGxmFDXrwhRK7otlw9v1uhvSVVCtUacgw qlICtikKwFrPzS8v3VCkyxY= X-Google-Smtp-Source: ABdhPJypEelAe2MQJO+QsAlt6vhlOKERbfLpxu5hJmk9ARnOY43j4ecWuvtrsDfZSyTh/d4Ud0/o6Q== X-Received: by 2002:a05:6402:31b7:: with SMTP id dj23mr18452684edb.245.1614635581892; Mon, 01 Mar 2021 13:53:01 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Michael Rolnik , Anthony Green , Jiaxun Yang , Peter Maydell , qemu-arm@nongnu.org, Marek Vasut , Paolo Bonzini , Stafford Horne , Palmer Dabbelt , Aleksandar Rikalo , qemu-s390x@nongnu.org, Chris Wulff , Marcel Apfelbaum , Yoshinori Sato , Aurelien Jarno , David Gibson , Sarah Harris , David Hildenbrand , Cornelia Huck , Richard Henderson , Sagar Karandikar , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Laurent Vivier , Claudio Fontana , Michael Walle , Guan Xuetao , "Edgar E. Iglesias" , Artyom Tarasenko , Thomas Huth , "Michael S. Tsirkin" , Eduardo Habkost , Greg Kurz , Bastian Koppelmann , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Max Filippov Subject: [PATCH v2 15/17] cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps Date: Mon, 1 Mar 2021 22:51:08 +0100 Message-Id: <20210301215110.772346-16-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210301215110.772346-1-f4bug@amsat.org> References: <20210301215110.772346-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 2 -- include/hw/core/sysemu-cpu-ops.h | 4 ++++ hw/core/cpu.c | 4 ++-- target/i386/cpu.c | 4 +++- 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 8af78cdde23..960846d2b64 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -93,7 +93,6 @@ struct AccelCPUClass; * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. - * @get_paging_enabled: Callback for inquiring whether paging is enabled. * @set_pc: Callback for setting the Program Counter register. This * should have the semantics used by the target architecture when * setting the PC from a source such as an ELF file entry point; @@ -136,7 +135,6 @@ struct CPUClass { void (*dump_state)(CPUState *cpu, FILE *, int flags); void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); - bool (*get_paging_enabled)(const CPUState *cpu); void (*set_pc)(CPUState *cpu, vaddr value); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index 460e7d63b0c..3f9a5199dd1 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -21,6 +21,10 @@ typedef struct SysemuCPUOps { */ void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, Error **errp); + /** + * @get_paging_enabled: Callback for inquiring whether paging is enabl= ed. + */ + bool (*get_paging_enabled)(const CPUState *cpu); /** * @get_phys_page_debug: Callback for obtaining a physical address. */ diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 339bdfadd7a..7a8487d468f 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -71,8 +71,8 @@ bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 - if (cc->get_paging_enabled) { - return cc->get_paging_enabled(cpu); + if (cc->sysemu_ops->get_paging_enabled) { + return cc->sysemu_ops->get_paging_enabled(cpu); } =20 return false; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d33ee9f831e..3519cef8fba 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7157,12 +7157,14 @@ static int64_t x86_cpu_get_arch_id(CPUState *cs) return cpu->apic_id; } =20 +#if !defined(CONFIG_USER_ONLY) static bool x86_cpu_get_paging_enabled(const CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs); =20 return cpu->env.cr[0] & CR0_PG_MASK; } +#endif /* !CONFIG_USER_ONLY */ =20 static void x86_cpu_set_pc(CPUState *cs, vaddr value) { @@ -7389,6 +7391,7 @@ static Property x86_cpu_properties[] =3D { #ifndef CONFIG_USER_ONLY static struct SysemuCPUOps i386_sysemu_ops =3D { .get_memory_mapping =3D x86_cpu_get_memory_mapping, + .get_paging_enabled =3D x86_cpu_get_paging_enabled, .get_phys_page_attrs_debug =3D x86_cpu_get_phys_page_attrs_debug, .asidx_from_attrs =3D x86_asidx_from_attrs, .get_crash_info =3D x86_cpu_get_crash_info, @@ -7429,7 +7432,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) cc->gdb_read_register =3D x86_cpu_gdb_read_register; cc->gdb_write_register =3D x86_cpu_gdb_write_register; cc->get_arch_id =3D x86_cpu_get_arch_id; - cc->get_paging_enabled =3D x86_cpu_get_paging_enabled; =20 #ifndef CONFIG_USER_ONLY cc->sysemu_ops =3D &i386_sysemu_ops; --=20 2.26.2