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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id z13sm16422668edc.73.2021.03.01.13.52.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Mar 2021 13:52:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WaQE95EZW9w0jtG86ZuVDK+2I8kDeUh8Unqfgkk9oi8=; b=dJQ4UANzR76b3eYWMyKZ+He1nEuDTPwS4OZNkrIHDXleHTj1Hux1ASLPymQAFMJSRb 2+DKOrVNXenpXyVJDNHdzsJdJKDuUWAj3kLOhmB25ecCaR9ZN6SABD2G43yRtV89cyaF +5ltmjdUxUmzkEQhL3frqVYbA/uyqO5SklhXQV8PR9j2+SbsO8M1wG5RowwIVXYb22RG B2N+65359kzj2XsyxC2AnTYTdKDrQ3JGunj5UvB2MJu2FBVAySmQVjkRHflpe3687HKV lf7Hx60vVu7XwMa3mhO/Qur9cIa0GF069048V1Nvmc6VT+QcyEl6YP4OrPA/YGyhAzpN E1Gw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=WaQE95EZW9w0jtG86ZuVDK+2I8kDeUh8Unqfgkk9oi8=; b=fHm2fkPgsWVYjSTdIpD0RrnVYDMV4Y/gRXLKDT5FvCZkc5AcWJWYGvN0U9Y1f1Y6Ha 0UIEcZuvXmcar89kTg4OgjVgEPjTpqsdgYCdLFTTid5iapdiV6o+a1L2t7S9f/TTztBX cYWeiRhVrcK4e7s8e7lRANEWXnII88jJqexYupmOyI+5ASCmRPksGSyuA/Xs/TlDnMVe mlO/p9Dsx29O94ic5AofkFy8/xn3gSv+FIIpuRemdD98FYVn839wdrUSxDZUaD72MGD8 S1xrWjIN04l5ZAAWBiBKJszTP+qMGemcVM6dHTK3i2i/7nXJkyljzf5HwUPXXzxY8BD3 HFHQ== X-Gm-Message-State: AOAM532U35gTmJtdJ1y5f9NPrUhmEnzdH4gMnUZsSuUVMtfyUTBzztbH CxNucr17UO+/hdtCtYcW89w= X-Google-Smtp-Source: ABdhPJx8YbyP/ysJIvbY6PD3CrlpttS9YDA8LjWAoN8qLWT6/WeDXT0T11P1nTCvwGIc16HQw24QwQ== X-Received: by 2002:a17:906:f10c:: with SMTP id gv12mr3059434ejb.53.1614635539084; Mon, 01 Mar 2021 13:52:19 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Michael Rolnik , Anthony Green , Jiaxun Yang , Peter Maydell , qemu-arm@nongnu.org, Marek Vasut , Paolo Bonzini , Stafford Horne , Palmer Dabbelt , Aleksandar Rikalo , qemu-s390x@nongnu.org, Chris Wulff , Marcel Apfelbaum , Yoshinori Sato , Aurelien Jarno , David Gibson , Sarah Harris , David Hildenbrand , Cornelia Huck , Richard Henderson , Sagar Karandikar , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Laurent Vivier , Claudio Fontana , Michael Walle , Guan Xuetao , "Edgar E. Iglesias" , Artyom Tarasenko , Thomas Huth , "Michael S. Tsirkin" , Eduardo Habkost , Greg Kurz , Bastian Koppelmann , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Max Filippov Subject: [PATCH v2 09/17] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps Date: Mon, 1 Mar 2021 22:51:02 +0100 Message-Id: <20210301215110.772346-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210301215110.772346-1-f4bug@amsat.org> References: <20210301215110.772346-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) VirtIO devices are only meaningful with system emulation. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 5 ----- include/hw/core/sysemu-cpu-ops.h | 8 ++++++++ hw/core/cpu.c | 4 ++-- target/arm/cpu.c | 2 +- target/ppc/translate_init.c.inc | 4 +--- 5 files changed, 12 insertions(+), 11 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 471c99d9f04..dfb50b60128 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -89,10 +89,6 @@ struct AccelCPUClass; * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. - * @virtio_is_big_endian: Callback to return %true if a CPU which supports - * runtime configurable endianness is currently big-endian. Non-configurab= le - * CPUs can use the default implementation of this method. This method sho= uld - * not be used by any callers other than the pre-1.0 virtio devices. * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. @@ -151,7 +147,6 @@ struct CPUClass { =20 int reset_dump_flags; bool (*has_work)(CPUState *cpu); - bool (*virtio_is_big_endian)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index 05f19b22070..9c3ac4f2280 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -16,6 +16,14 @@ * struct SysemuCPUOps: System operations specific to a CPU class */ typedef struct SysemuCPUOps { + /** + * @virtio_is_big_endian: Callback to return %true if a CPU which supp= orts + * runtime configurable endianness is currently big-endian. + * Non-configurable CPUs can use the default implementation of this me= thod. + * This method should not be used by any callers other than the pre-1.0 + * virtio devices. + */ + bool (*virtio_is_big_endian)(CPUState *cpu); /** * @vmsd: State description for migration. */ diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 5abf8bed2e4..09eaa3fa49f 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -204,8 +204,8 @@ bool cpu_virtio_is_big_endian(CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 - if (cc->virtio_is_big_endian) { - return cc->virtio_is_big_endian(cpu); + if (cc->sysemu_ops->virtio_is_big_endian) { + return cc->sysemu_ops->virtio_is_big_endian(cpu); } return target_words_bigendian(); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e03977e4c3c..2bad6307cce 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2262,6 +2262,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs) =20 #ifndef CONFIG_USER_ONLY static struct SysemuCPUOps arm_sysemu_ops =3D { + .virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian, .vmsd =3D &vmstate_arm_cpu, }; #endif @@ -2305,7 +2306,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug =3D arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs =3D arm_asidx_from_attrs; - cc->virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian; cc->write_elf64_note =3D arm_cpu_write_elf64_note; cc->write_elf32_note =3D arm_cpu_write_elf32_note; cc->sysemu_ops =3D &arm_sysemu_ops; diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.= inc index b5ed1dbfd26..2dd4f47adbb 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10845,6 +10845,7 @@ static Property ppc_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static struct SysemuCPUOps ppc_sysemu_ops =3D { + .virtio_is_big_endian =3D ppc_cpu_is_big_endian, .vmsd =3D &vmstate_ppc_cpu, }; #endif @@ -10913,9 +10914,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, voi= d *data) cc->gdb_core_xml_file =3D "power64-core.xml"; #else cc->gdb_core_xml_file =3D "power-core.xml"; -#endif -#ifndef CONFIG_USER_ONLY - cc->virtio_is_big_endian =3D ppc_cpu_is_big_endian; #endif cc->disas_set_info =3D ppc_disas_set_info; =20 --=20 2.26.2