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Tsirkin" , Aurelien Jarno , Aleksandar Rikalo , Sagar Karandikar , Claudio Fontana , Thomas Huth , Artyom Tarasenko , Greg Kurz , Stafford Horne , Bastian Koppelmann , Mark Cave-Ayland , Marcel Apfelbaum , "Edgar E. Iglesias" Subject: [PATCH 12/16] cpu: Move CPUClass::asidx_from_attrs to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:23 +0100 Message-Id: <20210226163227.4097950-13-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 8 +++++--- hw/core/cpu.c | 4 ++-- target/arm/cpu.c | 2 +- target/i386/cpu.c | 2 +- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index e8c2e9af3bb..fc3c4c217b1 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,11 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @asidx_from_attrs: Callback to return the CPU AddressSpace to use f= or + * a memory access with the specified memory transaction attribu= tes. + */ + int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); /** * @get_crash_info: Callback for reporting guest crash information in * GUEST_PANICKED events. @@ -153,8 +158,6 @@ typedef struct CPUSystemOperations { * associated memory transaction attributes to use for the access. * CPUs which use memory transaction attributes should implement this * instead of get_phys_page_debug. - * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for - * a memory access with the specified memory transaction attributes. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. * @gdb_num_core_regs: Number of core registers accessible to GDB. @@ -196,7 +199,6 @@ struct CPUClass { hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); - int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); =20 diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 3dc8faf6086..d38eda36bc3 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -116,8 +116,8 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attr= s) CPUClass *cc =3D CPU_GET_CLASS(cpu); int ret =3D 0; =20 - if (cc->asidx_from_attrs) { - ret =3D cc->asidx_from_attrs(cpu, attrs); + if (cc->system_ops.asidx_from_attrs) { + ret =3D cc->system_ops.asidx_from_attrs(cpu, attrs); assert(ret < cpu->num_ases && ret >=3D 0); } return ret; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4941a651e64..86af15b0625 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2298,7 +2298,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) cc->gdb_write_register =3D arm_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug =3D arm_cpu_get_phys_page_attrs_debug; - cc->asidx_from_attrs =3D arm_asidx_from_attrs; + cc->system_ops.asidx_from_attrs =3D arm_asidx_from_attrs; cc->system_ops.vmsd =3D &vmstate_arm_cpu; cc->system_ops.virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian; cc->system_ops.write_elf64_note =3D arm_cpu_write_elf64_note; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c34d41d4c79..36b34eee62f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7418,7 +7418,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) cc->get_paging_enabled =3D x86_cpu_get_paging_enabled; =20 #ifndef CONFIG_USER_ONLY - cc->asidx_from_attrs =3D x86_asidx_from_attrs; + cc->system_ops.asidx_from_attrs =3D x86_asidx_from_attrs; cc->get_memory_mapping =3D x86_cpu_get_memory_mapping; cc->get_phys_page_attrs_debug =3D x86_cpu_get_phys_page_attrs_debug; cc->system_ops.get_crash_info =3D x86_cpu_get_crash_info; --=20 2.26.2