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bh=kdUlRYKn8QtCf9o06jS8ggImvedVgOHZP3O9+rhuWtU=; b=S1Mx1UQbX7RvlGRpmuLI7BSn+cR6Nu2tV028DoNJ9PzSQlvTNWI9FUFoKJVq0SivsL5g+S KOGicxXRtVU9QUJvFKingA9A0ed5E6rWGC9HJYg/GhLbgWzcXvBsg4HZzu5Sr+p+DQXG5z cjQYu7YJ+lIw/amSFZw1br+mnBxk1XM= X-MC-Unique: n0PJlCpbPYOrkS4dAZBMIg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, mst@redhat.com, alex.williamson@redhat.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com Subject: [RFC v8 19/28] vfio/pci: Implement the DMA fault handler Date: Thu, 25 Feb 2021 11:52:24 +0100 Message-Id: <20210225105233.650545-20-eric.auger@redhat.com> In-Reply-To: <20210225105233.650545-1-eric.auger@redhat.com> References: <20210225105233.650545-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=eric.auger@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=63.128.21.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jean-philippe@linaro.org, tnowicki@marvell.com, maz@kernel.org, jiangkunkun@huawei.com, zhangfei.gao@foxmail.com, peterx@redhat.com, shameerali.kolothum.thodi@huawei.com, yuzenghui@huawei.com, zhangfei.gao@linaro.org, will@kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Whenever the eventfd is triggered, we retrieve the DMA fault(s) from the mmapped fault region and inject them in the iommu memory region. Signed-off-by: Eric Auger --- hw/vfio/pci.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ hw/vfio/pci.h | 1 + 2 files changed, 51 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 9fbbf88673..cb46288512 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2915,10 +2915,60 @@ static PCIPASIDOps vfio_pci_pasid_ops =3D { static void vfio_dma_fault_notifier_handler(void *opaque) { VFIOPCIExtIRQ *ext_irq =3D opaque; + VFIOPCIDevice *vdev =3D ext_irq->vdev; + PCIDevice *pdev =3D &vdev->pdev; + AddressSpace *as =3D pci_device_iommu_address_space(pdev); + IOMMUMemoryRegion *iommu_mr =3D IOMMU_MEMORY_REGION(as->root); + struct vfio_region_dma_fault header; + struct iommu_fault *queue; + char *queue_buffer =3D NULL; + ssize_t bytes; =20 if (!event_notifier_test_and_clear(&ext_irq->notifier)) { return; } + + bytes =3D pread(vdev->vbasedev.fd, &header, sizeof(header), + vdev->dma_fault_region.fd_offset); + if (bytes !=3D sizeof(header)) { + error_report("%s unable to read the fault region header (0x%lx)", + __func__, bytes); + return; + } + + /* Normally the fault queue is mmapped */ + queue =3D (struct iommu_fault *)vdev->dma_fault_region.mmaps[0].mmap; + if (!queue) { + size_t queue_size =3D header.nb_entries * header.entry_size; + + error_report("%s: fault queue not mmapped: slower fault handling", + vdev->vbasedev.name); + + queue_buffer =3D g_malloc(queue_size); + bytes =3D pread(vdev->vbasedev.fd, queue_buffer, queue_size, + vdev->dma_fault_region.fd_offset + header.offset); + if (bytes !=3D queue_size) { + error_report("%s unable to read the fault queue (0x%lx)", + __func__, bytes); + return; + } + + queue =3D (struct iommu_fault *)queue_buffer; + } + + while (vdev->fault_tail_index !=3D header.head) { + memory_region_inject_faults(iommu_mr, 1, + &queue[vdev->fault_tail_index]); + vdev->fault_tail_index =3D + (vdev->fault_tail_index + 1) % header.nb_entries; + } + bytes =3D pwrite(vdev->vbasedev.fd, &vdev->fault_tail_index, 4, + vdev->dma_fault_region.fd_offset); + if (bytes !=3D 4) { + error_report("%s unable to write the fault region tail index (0x%l= x)", + __func__, bytes); + } + g_free(queue_buffer); } =20 static int vfio_register_ext_irq_handler(VFIOPCIDevice *vdev, diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index d6cc689f5e..350e9e9005 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -146,6 +146,7 @@ struct VFIOPCIDevice { EventNotifier req_notifier; VFIOPCIExtIRQ *ext_irqs; VFIORegion dma_fault_region; + uint32_t fault_tail_index; int (*resetfn)(struct VFIOPCIDevice *); uint32_t vendor_id; uint32_t device_id; --=20 2.26.2