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bh=QlhJLFza2TC8LpFNbS9wemapCKG9sKwTwXXw925Wq/U=; b=DM9CCFVMRRqH+NCIruE7X1/rY0AYNeXfVc6odPCB8J6Lervxc3RRIJghIPdpz0WRrv9F+f 40UlgC/0v3sxswkkbhHZwaW6fp5fJtINZ/UBXL73SRiWX6NAlGsjbVcQL3ekR9KuFzsyi1 iaBiZLdWXGVusVExe21GFCR9OxRXCak= X-MC-Unique: c9t8RHzxN_SYwN8bJm7BWw-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, jean-philippe@linaro.org, peterx@redhat.com, jasowang@redhat.com, pbonzini@redhat.com Subject: [PATCH v2 2/7] dma: Introduce dma_aligned_pow2_mask() Date: Thu, 25 Feb 2021 10:14:30 +0100 Message-Id: <20210225091435.644762-3-eric.auger@redhat.com> In-Reply-To: <20210225091435.644762-1-eric.auger@redhat.com> References: <20210225091435.644762-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=eric.auger@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=63.128.21.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: vivek.gautam@arm.com, shameerali.kolothum.thodi@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Currently get_naturally_aligned_size() is used by the intel iommu to compute the maximum invalidation range based on @size which is a power of 2 while being aligned with the @start address and less than the maximum range defined by @gaw. This helper is also useful for other iommu devices (virtio-iommu, SMMUv3) to make sure IOMMU UNMAP notifiers only are called with power of 2 range sizes. Let's move this latter into dma-helpers.c and rename it into dma_aligned_pow2_mask(). Also rewrite the helper so that it accomodates UINT64_MAX values for the size mask and max mask. It now returns a mask instead of a size. Change the caller. Signed-off-by: Eric Auger Reviewed-by: Peter Xu --- hw/i386/intel_iommu.c | 30 +++++++----------------------- include/sysemu/dma.h | 3 +++ softmmu/dma-helpers.c | 26 ++++++++++++++++++++++++++ 3 files changed, 36 insertions(+), 23 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 3206f379f8..6be8f32918 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -35,6 +35,7 @@ #include "hw/i386/x86-iommu.h" #include "hw/pci-host/q35.h" #include "sysemu/kvm.h" +#include "sysemu/dma.h" #include "sysemu/sysemu.h" #include "hw/i386/apic_internal.h" #include "kvm/kvm_i386.h" @@ -3455,24 +3456,6 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s,= PCIBus *bus, int devfn) return vtd_dev_as; } =20 -static uint64_t get_naturally_aligned_size(uint64_t start, - uint64_t size, int gaw) -{ - uint64_t max_mask =3D 1ULL << gaw; - uint64_t alignment =3D start ? start & -start : max_mask; - - alignment =3D MIN(alignment, max_mask); - size =3D MIN(size, max_mask); - - if (alignment <=3D size) { - /* Increase the alignment of start */ - return alignment; - } else { - /* Find the largest page mask from size */ - return 1ULL << (63 - clz64(size)); - } -} - /* Unmap the whole range in the notifier's scope. */ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n) { @@ -3501,13 +3484,14 @@ static void vtd_address_space_unmap(VTDAddressSpace= *as, IOMMUNotifier *n) =20 while (remain >=3D VTD_PAGE_SIZE) { IOMMUTLBEvent event; - uint64_t mask =3D get_naturally_aligned_size(start, remain, s->aw_= bits); + uint64_t mask =3D dma_aligned_pow2_mask(start, end, s->aw_bits); + uint64_t size =3D mask + 1; =20 - assert(mask); + assert(size); =20 event.type =3D IOMMU_NOTIFIER_UNMAP; event.entry.iova =3D start; - event.entry.addr_mask =3D mask - 1; + event.entry.addr_mask =3D mask; event.entry.target_as =3D &address_space_memory; event.entry.perm =3D IOMMU_NONE; /* This field is meaningless for unmap */ @@ -3515,8 +3499,8 @@ static void vtd_address_space_unmap(VTDAddressSpace *= as, IOMMUNotifier *n) =20 memory_region_notify_iommu_one(n, &event); =20 - start +=3D mask; - remain -=3D mask; + start +=3D size; + remain -=3D size; } =20 assert(!remain); diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index a052f7bca3..2acb303be2 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -296,4 +296,7 @@ uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUS= GList *sg); void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie, QEMUSGList *sg, enum BlockAcctType type); =20 +uint64_t dma_aligned_pow2_mask(uint64_t start, uint64_t end, + int max_addr_bits); + #endif diff --git a/softmmu/dma-helpers.c b/softmmu/dma-helpers.c index 29001b5459..7d766a5e89 100644 --- a/softmmu/dma-helpers.c +++ b/softmmu/dma-helpers.c @@ -330,3 +330,29 @@ void dma_acct_start(BlockBackend *blk, BlockAcctCookie= *cookie, { block_acct_start(blk_get_stats(blk), cookie, sg->size, type); } + +uint64_t dma_aligned_pow2_mask(uint64_t start, uint64_t end, int max_addr_= bits) +{ + uint64_t max_mask =3D UINT64_MAX, addr_mask =3D end - start; + uint64_t alignment_mask, size_mask; + + if (max_addr_bits !=3D 64) { + max_mask =3D (1ULL << max_addr_bits) - 1; + } + + alignment_mask =3D start ? (start & -start) - 1 : max_mask; + alignment_mask =3D MIN(alignment_mask, max_mask); + size_mask =3D MIN(addr_mask, max_mask); + + if (alignment_mask <=3D size_mask) { + /* Increase the alignment of start */ + return alignment_mask; + } else { + /* Find the largest page mask from size */ + if (addr_mask =3D=3D UINT64_MAX) { + return UINT64_MAX; + } + return (1ULL << (63 - clz64(addr_mask + 1))) - 1; + } +} + --=20 2.26.2