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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id p3sm5177005wro.55.2021.02.24.10.58.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Feb 2021 10:58:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aTBjgsTI4Wp6876fW/WwC5NahK2Whn3Re19zatSnL1c=; b=Ok5bfGrf6rdqJNEP7yjGraoSuCM/vghsATrsFnrDW0c4sE0IJgLeZFgE4yxET3jshG GU9jbVNqCX0eWt3hlJyMqb+6mWTcx3u8QSOv3Ip7OhaSQRL/V51bz+s8678MKv1PfNV4 MHW4It43Q9nLj6atfgHraMNiyr9Q9bWffx5JxSluyNnhKTr3TIG0ZQjbAs0h8YGIIAel JgZYGwy3pXd6B3Pxs8jR9C2crlBUpUMH9xOUErkJSmUfkt02w8ZT1f+XJjzbcxSLzZld Ny5ycOv3x8XfJIHRIAeOoUfqkf+AKZb/Fd9xQJZcCT8mABgRZo/tYDm9ayEE8la4fQRV Wj0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=aTBjgsTI4Wp6876fW/WwC5NahK2Whn3Re19zatSnL1c=; b=bLHG7kNXi9EdRKTRM25tN9P5f1r9rSnVjyOM1PAZPpcI8RFx5DmohiQ2hYzfRLcTdg pXQec9jjeiabM4hLMroG3mW4/pyHePYAUuiVFCHxo5IXkR2MrommzMw3pXmO1aJ6pJvA bXoLMNG6jp15DOmkPcuspzOkfI4HS+oyiO7UX3Y9DGjPyx06ywu9YIEW3U6OF6rjXyat EGs5s4xPJtCdyeKI2fQcAt5SrpF2mpqIX3EtbAGICRCR6aHM0A/t6KTACiSN/ASvlOqz IPF0hjltGRaA5LCcmhkBuP87KEtcIOmpxLt/AGywWiR7pUs7FZPdQvs0t2UcuEsJmEbX suLw== X-Gm-Message-State: AOAM533M1UNiCfVLwsirxfnxf/okRPmrpD92UaFdGf1eDL+wnBlnIOkV mL0YFQzt1HIXEZIAobRM5v2SxYyUszs= X-Google-Smtp-Source: ABdhPJzB+PHlUHrWp7Xw1a+rM8xTvhpikWlck8F+Ol+vIfIW0X42Y9pRaz5tkzTNZ3kwu0CVTPQUYg== X-Received: by 2002:a7b:cbc1:: with SMTP id n1mr5158622wmi.30.1614193096941; Wed, 24 Feb 2021 10:58:16 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Craig Janeczek , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Richard Henderson , Aurelien Jarno Subject: [PATCH v4 11/12] target/mips: Introduce mxu_translate_init() helper Date: Wed, 24 Feb 2021 19:57:05 +0100 Message-Id: <20210224185706.3293058-12-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210224185706.3293058-1-f4bug@amsat.org> References: <20210224185706.3293058-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Extract the MXU register initialization code from mips_tcg_init() as a new mxu_translate_init() helper. Make it public and replace !TARGET_MIPS64 ifdef'ry by the 'TARGET_LONG_BITS =3D=3D 32' check to elide this code at preprocessing time. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/translate.h | 1 + target/mips/translate.c | 28 ++++++++++++++++------------ 2 files changed, 17 insertions(+), 12 deletions(-) diff --git a/target/mips/translate.h b/target/mips/translate.h index a5c49f1ee22..a807b3d2566 100644 --- a/target/mips/translate.h +++ b/target/mips/translate.h @@ -179,6 +179,7 @@ extern TCGv bcond; void msa_translate_init(void); =20 /* MXU */ +void mxu_translate_init(void); bool decode_ase_mxu(DisasContext *ctx, uint32_t insn); =20 /* decodetree generated */ diff --git a/target/mips/translate.c b/target/mips/translate.c index 84948ab9ce0..da6825c2fec 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2045,7 +2045,20 @@ static const char * const mxuregnames[] =3D { "XR1", "XR2", "XR3", "XR4", "XR5", "XR6", "XR7", "XR8", "XR9", "XR10", "XR11", "XR12", "XR13", "XR14", "XR15", "MXU_CR", }; -#endif + +void mxu_translate_init(void) +{ + for (unsigned i =3D 0; i < NUMBER_OF_MXU_REGISTERS - 1; i++) { + mxu_gpr[i] =3D tcg_global_mem_new(cpu_env, + offsetof(CPUMIPSState, active_tc.m= xu_gpr[i]), + mxuregnames[i]); + } + + mxu_CR =3D tcg_global_mem_new(cpu_env, + offsetof(CPUMIPSState, active_tc.mxu_cr), + mxuregnames[NUMBER_OF_MXU_REGISTERS - 1]); +} +#endif /* !TARGET_MIPS64 */ =20 /* General purpose registers moves. */ void gen_load_gpr(TCGv t, int reg) @@ -28047,18 +28060,9 @@ void mips_tcg_init(void) cpu_llval =3D tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, llval= ), "llval"); =20 -#if !defined(TARGET_MIPS64) - for (i =3D 0; i < NUMBER_OF_MXU_REGISTERS - 1; i++) { - mxu_gpr[i] =3D tcg_global_mem_new(cpu_env, - offsetof(CPUMIPSState, - active_tc.mxu_gpr[i]), - mxuregnames[i]); + if (TARGET_LONG_BITS =3D=3D 32) { + mxu_translate_init(); } - - mxu_CR =3D tcg_global_mem_new(cpu_env, - offsetof(CPUMIPSState, active_tc.mxu_cr), - mxuregnames[NUMBER_OF_MXU_REGISTERS - 1]); -#endif /* !TARGET_MIPS64 */ } =20 void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb, --=20 2.26.2