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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id c12sm13474247wru.71.2021.02.21.06.36.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Feb 2021 06:36:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9Gr6hhYxcoFr5/GYlEJ6i23QC05JMKXDeduQE346qJE=; b=VJC4PBoVn+iij9+qhSmonmdut68TwiLZuz72pQ8QVcrqgm3CrJ5dug3SWQC4Isx5FX SoYQbtqgNfKeQ4rX0sCPIOS0JzWdfaFb1zjxC4kvIGYujGTcv1IvTERWOmC0RSFVg02j G8aqWTecH45VuMt7CCJKu5TV1uN2yfC4zRPgj0yJ+PiVOdw6xS/CsoSLrvyuVvvt0jgH 9/Hy/zMy6lhuOsn6nFdPpm5WL0HxeNGPs18r+/+Dh1iY6VECdp4CXmnMwdAOcXGWvzVN Qr5f/s8q/lg5aX1yWcQtBbx76jCfO+yMSJOXp17xy42/5tKmBE49xDZExVXuD9ZwVp7f MAZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9Gr6hhYxcoFr5/GYlEJ6i23QC05JMKXDeduQE346qJE=; b=U8rD6GSsboftXwpjhYcMia4j+wIUPEztA/WFWLLGHgsy/wSPGbzz9n1O/dZsS7Bkn9 8cNfDfpt+Br0np1HCWVJ7JfJdKxBlX3uPtM1EIr4ThRtyhP2GGk2hzBwGeeF3eNjeAcq eoF/JOx7Oawcqw0JH+/aqaavjB75QYnYWwq7pA8RpLJcn81FfaUYsKQ2o62Pga4qHOfE twD+DzN5yTxC5zy//gUlI7RAn4aJz/znZVZw8UsfioDHgM9NPuCycK49sAqpUcheMaGL 1h3LH69YLe2udtyfEJkMS3q9H7mwAVGLDutgxNiJGrGZh7FefH40sub0KjMfSq6JluJJ q4oA== X-Gm-Message-State: AOAM531VglvogjerpY04YnbfJnc9EWQyJ5GN+YGoo8mBT91WuFH1wiLi AwQ70I4/jdulQuRrvYzX3B4= X-Google-Smtp-Source: ABdhPJyp1I7xroEGBvXD3A3+vxWuHobdCAdgTV+CBjV+nuOvAON3j530GEuFzs6LxHpOt73ZP3Lz7g== X-Received: by 2002:a05:600c:2652:: with SMTP id 18mr2967075wmy.96.1613918203770; Sun, 21 Feb 2021 06:36:43 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paul Burton , Wainer dos Santos Moschetta , Aleksandar Rikalo , Aurelien Jarno , Marcel Apfelbaum , Cleber Rosa , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Huacai Chen , Jiaxun Yang , Richard Henderson Subject: [PULL 26/43] target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers Date: Sun, 21 Feb 2021 15:34:15 +0100 Message-Id: <20210221143432.2468220-27-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210221143432.2468220-1-f4bug@amsat.org> References: <20210221143432.2468220-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20210214175912.732946-7-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/translate.h | 4 ++++ target/mips/translate.c | 18 ++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/target/mips/translate.h b/target/mips/translate.h index 3014c20cadb..468e29d7578 100644 --- a/target/mips/translate.h +++ b/target/mips/translate.h @@ -131,6 +131,10 @@ void gen_move_low32(TCGv ret, TCGv_i64 arg); void gen_move_high32(TCGv ret, TCGv_i64 arg); void gen_load_gpr(TCGv t, int reg); void gen_store_gpr(TCGv t, int reg); +#if defined(TARGET_MIPS64) +void gen_load_gpr_hi(TCGv_i64 t, int reg); +void gen_store_gpr_hi(TCGv_i64 t, int reg); +#endif /* TARGET_MIPS64 */ void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg); void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg); void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg); diff --git a/target/mips/translate.c b/target/mips/translate.c index 5228e040842..a303c36be3f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2291,6 +2291,24 @@ void gen_store_gpr(TCGv t, int reg) } } =20 +#if defined(TARGET_MIPS64) +void gen_load_gpr_hi(TCGv_i64 t, int reg) +{ + if (reg =3D=3D 0) { + tcg_gen_movi_i64(t, 0); + } else { + tcg_gen_mov_i64(t, cpu_gpr_hi[reg]); + } +} + +void gen_store_gpr_hi(TCGv_i64 t, int reg) +{ + if (reg !=3D 0) { + tcg_gen_mov_i64(cpu_gpr_hi[reg], t); + } +} +#endif /* TARGET_MIPS64 */ + /* Moves to/from shadow registers. */ static inline void gen_load_srsgpr(int from, int to) { --=20 2.26.2