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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id z5sm11108651wrn.8.2021.02.18.15.28.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Feb 2021 15:29:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oylI3wFZAxZOnCSrB2Lv4VednOQz6GcXzyENdSLrLcw=; b=ic7ahWeOAtpbZt8zVbft0bdTtGNXWpnhO12TdXItvZfvkEExCZpI54Jb7SgADOm0Jo kcNr0as6t+Bm/NUyEeol4+5su1ucyRQ0w9OkTVuoT9cNNPp9v+3H1yCMDRoDSOppmV4i LlELQBDHewZiR8JqXQ8gSYIrBnyQes9ulhshDthnBQeTA5jeKLuohqe2Fc+TQsT3lz0D 1A26H8/ydHYsnhsWdhA/ele05P85wuH1uk2g+QbEppA/KqfEOr9apUYeRDUCBIZLkl+e QyprBUgAt2kiPeZvG5yX/mAzZkcV/EjnGSXrS5Ich4PIS1t9aXRMVXIJ+qpNW+t6UVGU KuaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=oylI3wFZAxZOnCSrB2Lv4VednOQz6GcXzyENdSLrLcw=; b=dQWSCat/4jk7DHY7vkJz4hjfKQBIqDs8J7HJg78DwqTON/JLDDORghOQoUriiGrJxq BebrFrQm30UPVhk7lTqypZSYpNokcTVe0YeGje5gU5cXbyF1UbgHn4NZJWaEZ5uCwqY7 mvAkC8UU540oi099Dpll409wXSkAhVhTVBAMMX11gvp/jLiNmHPDzGQXXiL0UdSD2S87 rlRe1x8HbYrapmvl72aakOh7jwBhFjlP2j4TgEq6nJwrKH7KYMmEJ80mRV0WcEqKMOJI BafpsF8qqKIYiPLdt6daVjeWUCR+F/WsPSTfKJA3DDCqCdBwMDdY2c+rai2fm4ORnU/i 69PA== X-Gm-Message-State: AOAM5316uLqqCjj78x0zU/eq1W1DlPbSMmYlA5ZhjYCIqARelO/KRQ7+ r92RqI+kAV/AeFJk5Dlp1ac= X-Google-Smtp-Source: ABdhPJwbRn5nQtfcJoRGiaKO3I2jfUv1tdB4QG/ZxuoYCQ8+p10EvpMM9hGs/QsMms9RQTF+O65TNw== X-Received: by 2002:adf:9504:: with SMTP id 4mr6327667wrs.306.1613690940729; Thu, 18 Feb 2021 15:29:00 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Richard Henderson Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Stefan Weil , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 4/5] tcg/tci: Merge identical cases in generation (conditional opcodes) Date: Fri, 19 Feb 2021 00:28:39 +0100 Message-Id: <20210218232840.1760806-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210218232840.1760806-1-f4bug@amsat.org> References: <20210218232840.1760806-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) From: Richard Henderson Use CASE_32_64 and CASE_64 to reduce ifdefs and merge cases that are identical between 32-bit and 64-bit hosts. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org> [PMD: Split patch as 4/5] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 23 ++++++----------------- 1 file changed, 6 insertions(+), 17 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 4a86a3bb466..f9893b9539e 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -417,15 +417,18 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, } set_jmp_reset_offset(s, args[0]); break; + case INDEX_op_br: tci_out_label(s, arg_label(args[0])); break; - case INDEX_op_setcond_i32: + + CASE_32_64(setcond) tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out8(s, args[3]); /* condition */ break; + #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: /* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */ @@ -436,13 +439,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_out_r(s, args[4]); tcg_out8(s, args[5]); /* condition */ break; -#elif TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_setcond_i64: - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out8(s, args[3]); /* condition */ - break; #endif case INDEX_op_ld8u_i32: case INDEX_op_ld8s_i32: @@ -505,14 +501,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out8(s, args[4]); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_brcond_i64: + CASE_32_64(brcond) tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out8(s, args[2]); /* condition */ tci_out_label(s, arg_label(args[3])); break; -#endif /* TCG_TARGET_REG_BITS =3D=3D 64 */ =20 CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */ @@ -556,12 +550,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_out_r(s, args[3]); break; #endif - case INDEX_op_brcond_i32: - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out8(s, args[2]); /* condition */ - tci_out_label(s, arg_label(args[3])); - break; + case INDEX_op_qemu_ld_i32: tcg_out_r(s, *args++); tcg_out_r(s, *args++); --=20 2.26.2