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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id x4sm19853110wrn.64.2021.02.14.10.01.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Feb 2021 10:01:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=u/wEPKUWVvF3Au5VTI/1Dl8n/cS8vH0tcjl9xMfLNXs=; b=R9WH9p3i5LPJpjNrvtzsWpCoRmx1g0vX32QUTut9fskN0a0U2lLXZ6RkFaGgwn1imq ItzdEKvD4EISD6L26yLgfWyMpVLy0mzFCKaeDc9rI+UpUF0z4PxeFjhzTfhG8By/iVw4 03dvEl93H19BKxzKIlt2EkfGLk5aDYOYLS0rP20DsDFQz19J7LggpMXjLaJvhsyhIzsc FWZzdMzvrresoCYK18A3rfAUxOEfu1dKZr0yYcZ5Z07i0QpE75aIvdaW9T9KyDPsaM4N j7EzYWyqk62ZTF5Y+RvLDRB2VCk8jvAbRCnJnCBKRvd+MCbVWK4V6cwxExW1Jz+Jkn6q e58Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=u/wEPKUWVvF3Au5VTI/1Dl8n/cS8vH0tcjl9xMfLNXs=; b=Qq3qRrlZoVDIDA3w18OD9xK/PgBwYf/Dq2fVBEGcPgvkR6EMrijHGvoERUnwM7JetP uWWixjo4H/yI7xeMZVRKUshsIftvefYHtL8st+i1B7DwtLMJAT1nQ88tX6lKAT3QRkyz h1JRyWZ4erlq2rBe2L2mNj8AjZ3KCFD62lRHNabkOXyD9jqEyQLmj31N7khDmMRli475 TuhKeYHPYueyKWcLEAUSnYcC2Y01G9ZLaF6lqC0ecXvk4J/2MX97K03t4daPRginwz5V EaHSUZL1knq4WIwCWfrE89Pu8L+EkOAQueZTiYv5S505chr4BaltI5pHYY5N5TRELB/A eXMQ== X-Gm-Message-State: AOAM532fXYAyTO3nzbSA7EMjd01nxC/XfqORJAABqq2xtqckjFUEJlDd voBPc5W8ypa7qKzCD1mrbUg= X-Google-Smtp-Source: ABdhPJw8jcaXCiCTea/OB+QboMcRRduC+W4fDyy7ALcJtnnp39B62XdPnNh5/jwCH6EjNe/WboI4nw== X-Received: by 2002:a5d:67c2:: with SMTP id n2mr8802098wrw.298.1613325680153; Sun, 14 Feb 2021 10:01:20 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Fredrik Noring , Laurent Vivier , Jiaxun Yang , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , "Maciej W. Rozycki" , Thomas Huth , Aurelien Jarno , Richard Henderson , Aleksandar Rikalo Subject: [RFC PATCH 25/42] target/mips/tx79: Introduce LQ opcode (Load Quadword) Date: Sun, 14 Feb 2021 18:58:55 +0100 Message-Id: <20210214175912.732946-26-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210214175912.732946-1-f4bug@amsat.org> References: <20210214175912.732946-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Introduce the LQ opcode (Load Quadword) and remove unreachable code. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/mips/tx79.decode | 8 ++++++++ target/mips/translate.c | 16 ++-------------- target/mips/tx79_translate.c | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 14 deletions(-) diff --git a/target/mips/tx79.decode b/target/mips/tx79.decode index 79001359242..b5396f48c2d 100644 --- a/target/mips/tx79.decode +++ b/target/mips/tx79.decode @@ -13,6 +13,8 @@ =20 &rtype rs rt rd sa =20 +&itype base rt offset + ########################################################################### # Named instruction formats. These are generally used to # reduce the amount of duplication between instruction patterns. @@ -22,6 +24,8 @@ @rs ...... rs:5 ..... .......... ...... &rtype rt=3D0 rd= =3D0 sa=3D0 @rd ...... .......... rd:5 ..... ...... &rtype rs=3D0 rt= =3D0 sa=3D0 =20 +@ldst ...... base:5 rt:5 offset:16 &itype + ########################################################################### =20 MFHI1 011100 0000000000 ..... 00000 010000 @rd @@ -65,3 +69,7 @@ PCPYUD 011100 ..... ..... ..... 01110 101001 @= rs_rt_rd POR 011100 ..... ..... ..... 10010 101001 @rs_rt_rd PNOR 011100 ..... ..... ..... 10011 101001 @rs_rt_rd PCPYH 011100 00000 ..... ..... 11011 101001 @rt_rd + +# SPECIAL + +LQ 011110 ..... ..... ................ @ldst diff --git a/target/mips/translate.c b/target/mips/translate.c index 109f7f80f3d..bed0489997a 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1780,7 +1780,6 @@ enum { =20 enum { MMI_OPC_CLASS_MMI =3D 0x1C << 26, /* Same as OPC_SPECIAL2 */ - MMI_OPC_LQ =3D 0x1E << 26, /* Same as OPC_MSA */ MMI_OPC_SQ =3D 0x1F << 26, /* Same as OPC_SPECIAL3 */ }; =20 @@ -27331,11 +27330,6 @@ static void decode_mmi(CPUMIPSState *env, DisasCon= text *ctx) } } =20 -static void gen_mmi_lq(CPUMIPSState *env, DisasContext *ctx) -{ - gen_reserved_instruction(ctx); /* TODO: MMI_OPC_LQ */ -} - static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset) { gen_reserved_instruction(ctx); /* TODO: MMI_OPC_SQ */ @@ -28229,14 +28223,8 @@ static bool decode_opc_legacy(CPUMIPSState *env, D= isasContext *ctx) gen_compute_branch(ctx, op, 4, rs, rt, offset, 4); } break; - case OPC_MDMX: /* MMI_OPC_LQ */ - if (ctx->insn_flags & INSN_R5900) { -#if defined(TARGET_MIPS64) - gen_mmi_lq(env, ctx); -#endif - } else { - /* MDMX: Not implemented. */ - } + case OPC_MDMX: + /* MDMX: Not implemented. */ break; case OPC_PCREL: check_insn(ctx, ISA_MIPS_R6); diff --git a/target/mips/tx79_translate.c b/target/mips/tx79_translate.c index c25f61d382c..293efd7bd06 100644 --- a/target/mips/tx79_translate.c +++ b/target/mips/tx79_translate.c @@ -376,6 +376,41 @@ static bool trans_PCEQW(DisasContext *ctx, arg_rtype *= a) * SQ rt, offset(base) Store Quadword */ =20 +static bool trans_LQ(DisasContext *ctx, arg_itype *a) +{ + TCGv_i64 t0; + TCGv addr; + + if (a->rt =3D=3D 0) { + /* nop */ + return true; + } + + t0 =3D tcg_temp_new_i64(); + addr =3D tcg_temp_new(); + + gen_base_offset_addr(ctx, addr, a->base, a->offset); + /* + * Clear least-significant four bits of the effective + * address, effectively creating an aligned address. + */ + tcg_gen_andi_tl(addr, addr, ~0xf); + + /* Lower halve */ + tcg_gen_qemu_ld_i64(t0, addr, ctx->mem_idx, MO_TEQ); + gen_store_gpr(t0, a->rt); + + /* Upper halve */ + tcg_gen_addi_i64(addr, addr, 8); + tcg_gen_qemu_ld_i64(t0, addr, ctx->mem_idx, MO_TEQ); + gen_store_gpr_hi(t0, a->rt); + + tcg_temp_free(t0); + tcg_temp_free(addr); + + return true; +} + /* * Multiply and Divide (19 instructions) * ------------------------------------- --=20 2.26.2