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Sat, 13 Feb 2021 00:07:04 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07504126|-1; CH=blue; DM=|OVERLOAD|false|; DS=CONTINUE|ham_system_inform|0.330753-0.0022886-0.666959; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047187; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=6; RT=6; SR=0; TI=SMTPD_---.JYHdfm5_1613146023; From: LIU Zhiwei To: qemu-devel@nongnu.org Subject: [PATCH 31/38] target/riscv: RV64 Only SIMD 32-bit Miscellaneous Instructions Date: Fri, 12 Feb 2021 23:02:49 +0800 Message-Id: <20210212150256.885-32-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210212150256.885-1-zhiwei_liu@c-sky.com> References: <20210212150256.885-1-zhiwei_liu@c-sky.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=121.197.200.217; envelope-from=zhiwei_liu@c-sky.com; helo=smtp2200-217.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, LIU Zhiwei , qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 6 +++ target/riscv/insn32-64.decode | 6 +++ target/riscv/insn_trans/trans_rvp.c.inc | 7 ++++ target/riscv/packed_helper.c | 55 +++++++++++++++++++++++++ 4 files changed, 74 insertions(+) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 673bc4f628..384b42ce90 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -1434,4 +1434,10 @@ DEF_HELPER_3(sll32, tl, env, tl, tl) DEF_HELPER_3(ksll32, tl, env, tl, tl) DEF_HELPER_3(kslra32, tl, env, tl, tl) DEF_HELPER_3(kslra32_u, tl, env, tl, tl) + +DEF_HELPER_3(smin32, tl, env, tl, tl) +DEF_HELPER_3(umin32, tl, env, tl, tl) +DEF_HELPER_3(smax32, tl, env, tl, tl) +DEF_HELPER_3(umax32, tl, env, tl, tl) +DEF_HELPER_2(kabs32, tl, env, tl) #endif diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 6f0f2923ca..a2b8831467 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -129,3 +129,9 @@ ksll32 0110010 ..... ..... 010 ..... 1111111 @r kslli32 1000010 ..... ..... 010 ..... 1111111 @sh5 kslra32 0101011 ..... ..... 010 ..... 1111111 @r kslra32_u 0110011 ..... ..... 010 ..... 1111111 @r + +smin32 1001000 ..... ..... 010 ..... 1111111 @r +umin32 1010000 ..... ..... 010 ..... 1111111 @r +smax32 1001001 ..... ..... 010 ..... 1111111 @r +umax32 1010001 ..... ..... 010 ..... 1111111 @r +kabs32 1010110 10010 ..... 000 ..... 1111111 @r2 diff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_tr= ans/trans_rvp.c.inc index e52f268a57..ce144ee5c0 100644 --- a/target/riscv/insn_trans/trans_rvp.c.inc +++ b/target/riscv/insn_trans/trans_rvp.c.inc @@ -1172,4 +1172,11 @@ GEN_RVP_R_OOL(ksll32); GEN_RVP_SHIFTI(kslli32, ksll32, NULL); GEN_RVP_R_OOL(kslra32); GEN_RVP_R_OOL(kslra32_u); + +/* (RV64 Only) SIMD 32-bit Miscellaneous Instructions */ +GEN_RVP_R_OOL(smin32); +GEN_RVP_R_OOL(umin32); +GEN_RVP_R_OOL(smax32); +GEN_RVP_R_OOL(umax32); +GEN_RVP_R2_OOL(kabs32); #endif diff --git a/target/riscv/packed_helper.c b/target/riscv/packed_helper.c index c168c51eff..c8a92f5b7d 100644 --- a/target/riscv/packed_helper.c +++ b/target/riscv/packed_helper.c @@ -3377,4 +3377,59 @@ static inline void do_kslra32_u(CPURISCVState *env, = void *vd, void *va, } =20 RVPR(kslra32_u, 1, 4); + +/* (RV64 Only) SIMD 32-bit Miscellaneous Instructions */ +static inline void do_smin32(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb; + + d[i] =3D (a[i] < b[i]) ? a[i] : b[i]; +} + +RVPR(smin32, 1, 4); + +static inline void do_umin32(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + uint32_t *d =3D vd, *a =3D va, *b =3D vb; + + d[i] =3D (a[i] < b[i]) ? a[i] : b[i]; +} + +RVPR(umin32, 1, 4); + +static inline void do_smax32(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb; + + d[i] =3D (a[i] > b[i]) ? a[i] : b[i]; +} + +RVPR(smax32, 1, 4); + +static inline void do_umax32(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + uint32_t *d =3D vd, *a =3D va, *b =3D vb; + + d[i] =3D (a[i] > b[i]) ? a[i] : b[i]; +} + +RVPR(umax32, 1, 4); + +static inline void do_kabs32(CPURISCVState *env, void *vd, void *va, uint8= _t i) +{ + int32_t *d =3D vd, *a =3D va; + + if (a[i] =3D=3D INT32_MIN) { + d[i] =3D INT32_MAX; + env->vxsat =3D 0x1; + } else { + d[i] =3D abs(a[i]); + } +} + +RVPR2(kabs32, 1, 4); #endif --=20 2.17.1