From nobody Sun Apr 27 21:37:32 2025
Delivered-To: importer@patchew.org
Authentication-Results: mx.zohomail.com;
dkim=pass;
spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as
permitted sender)
smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org;
dmarc=pass(p=none dis=none) header.from=linaro.org
ARC-Seal: i=1; a=rsa-sha256; t=1613051042; cv=none;
d=zohomail.com; s=zohoarc;
b=j5aDqKzpeXBYVUZUwcgrVGpd468pT8qqociJvbUKOtn3si6aWu1J4cUPwy7oT9lpWik4z31BHL5dNimIsMLrDrDMExh96MzcFVkNx9VlsSTffdJj6i6xNB6yUlMSeQlvNbHrEZpMA5abUj/LviVMCN48jJXXlVAbMHUMceeLiFw=
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com;
s=zohoarc;
t=1613051042;
h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To;
bh=wZUolxBc97njL0lUBedVjqcYfU8uIXWcGrJqQadqG7M=;
b=gxZkbQIhfZhsYzP3Jg+mePLbi/LXnYCIuG4fInZfd3SXE0du450/qGpVdQp786WBDbBW6pfvfrX0zzTnkPTESfKHy7FJhyKpA9+jjAPY6jDw2pB0wpq3Mg1BulOCDYy0iazeH7K0A8pZvhyCidzKFcV1waFNt66XDtXD30ZaYJk=
ARC-Authentication-Results: i=1; mx.zohomail.com;
dkim=pass;
spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as
permitted sender)
smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org;
dmarc=pass header.from=<peter.maydell@linaro.org> (p=none dis=none)
header.from=<peter.maydell@linaro.org>
Return-Path: <qemu-devel-bounces+importer=patchew.org@nongnu.org>
Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by
mx.zohomail.com
with SMTPS id 1613051042486653.7822281379938;
Thu, 11 Feb 2021 05:44:02 -0800 (PST)
Received: from localhost ([::1]:48762 helo=lists1p.gnu.org)
by lists.gnu.org with esmtp (Exim 4.90_1)
(envelope-from <qemu-devel-bounces+importer=patchew.org@nongnu.org>)
id 1lACGH-0003Z8-D7
for importer@patchew.org; Thu, 11 Feb 2021 08:44:01 -0500
Received: from eggs.gnu.org ([2001:470:142:3::10]:33832)
by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)
(Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)
id 1lABZO-0008SY-O8
for qemu-devel@nongnu.org; Thu, 11 Feb 2021 07:59:42 -0500
Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:36248)
by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)
(Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)
id 1lABZC-000063-CO
for qemu-devel@nongnu.org; Thu, 11 Feb 2021 07:59:42 -0500
Received: by mail-wm1-x32c.google.com with SMTP id i9so5657731wmq.1
for <qemu-devel@nongnu.org>; Thu, 11 Feb 2021 04:59:29 -0800 (PST)
Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148])
by smtp.gmail.com with ESMTPSA id g15sm4955716wrx.1.2021.02.11.04.59.28
for <qemu-devel@nongnu.org>
(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);
Thu, 11 Feb 2021 04:59:28 -0800 (PST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;
h=from:to:subject:date:message-id:in-reply-to:references:mime-version
:content-transfer-encoding;
bh=wZUolxBc97njL0lUBedVjqcYfU8uIXWcGrJqQadqG7M=;
b=IoONwXUwGjSsPuAjYcgychdX4rQmHYitaIMggLllmI04rABdVQ/JUxpI38cQdQTe71
4ap99bYqnGxp5Fl2SvQT9zomqx0E9UGQkMYkYVqjuSbP+riOSXbK0zJwt6ZXck+plHS7
qBGm3diggWfhQPkov9l5G/SSwNMO1s+CVTIkzwio5fwwZe0uTUYp0Dx/ECCZpD4sT3kg
PA8e2DEAjKFSyeJBo8NOViblePHU5NWzjlPvEzfktPZnzp2+2Mjqfi09Ab9C9g3cxZHh
BM2yby0arozvQW6XuY5ni3Zuh0L4dmr/P6ihQtD7VZJ0RpmPAc0vpUt7hnYpZtdsYpsr
c+pw==
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=1e100.net; s=20161025;
h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to
:references:mime-version:content-transfer-encoding;
bh=wZUolxBc97njL0lUBedVjqcYfU8uIXWcGrJqQadqG7M=;
b=WVTI5rxlw4rqQUBtLPGl6uRHypEqBBgbmYYX/UimxVSXH9BHrojEA9UaTTuJ4XZXmU
HvapuNIx9/1mvP42ilSlwESvxXGTYvhH6+qPPnlQsCDyvd99WaAo1qFgN2lqcNGB9lEE
tPoRD0M06OH6WWBAOkzV9qabH44tYGNcxM5nnJx11uN8BqZh8CSarfciB0C1vJgaK2IW
guMKWOXduNiXga38bPTOHDOFJSC+zdpbPqwnv6VcGjWFv+JvwRA+1NJp4nghIc/sEFym
NGvLaklLz14qHyD6avra8o2sFjhNYcXMvDjsxPwQeO/2Dm0DNXZqStJ20kegHqQrhT58
2E8w==
X-Gm-Message-State: AOAM533K9jod3v/lJRVfQWAvARfPFmZbEG/H6g/lAOW6f37vxyXCQSR5
k0vcbT0kZ1qI6xgLLUaEGPxwuIRmyRz6Ig==
X-Google-Smtp-Source:
ABdhPJwzU2unVxIDLEVOjBl5e53MnqDF0FdvY1DevZLVbBdnuzn5jsZMEVPOCnFGcJ0fnys7UiiVQQ==
X-Received: by 2002:a1c:6402:: with SMTP id y2mr4985436wmb.43.1613048369120;
Thu, 11 Feb 2021 04:59:29 -0800 (PST)
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 35/45] linux-user/aarch64: Pass syndrome to EXC_*_ABORT
Date: Thu, 11 Feb 2021 12:58:50 +0000
Message-Id: <20210211125900.22777-36-peter.maydell@linaro.org>
X-Mailer: git-send-email 2.20.1
In-Reply-To: <20210211125900.22777-1-peter.maydell@linaro.org>
References: <20210211125900.22777-1-peter.maydell@linaro.org>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17
as permitted sender) client-ip=209.51.188.17;
envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org;
helo=lists.gnu.org;
Received-SPF: pass client-ip=2a00:1450:4864:20::32c;
envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com
X-Spam_score_int: -20
X-Spam_score: -2.1
X-Spam_bar: --
X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,
DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,
RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,
SPF_PASS=-0.001 autolearn=ham autolearn_force=no
X-Spam_action: no action
X-BeenThere: qemu-devel@nongnu.org
X-Mailman-Version: 2.1.23
Precedence: list
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org
Sender: "Qemu-devel" <qemu-devel-bounces+importer=patchew.org@nongnu.org>
X-ZohoMail-DKIM: pass (identity @linaro.org)
Content-Type: text/plain; charset="utf-8"
From: Richard Henderson <richard.henderson@linaro.org>
A proper syndrome is required to fill in the proper si_code.
Use page_get_flags to determine permission vs translation for user-only.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/aarch64/cpu_loop.c | 24 +++++++++++++++++++++---
target/arm/tlb_helper.c | 15 +++++++++------
2 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 42b9c15f536..4e43906e66a 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -23,6 +23,7 @@
#include "cpu_loop-common.h"
#include "qemu/guest-random.h"
#include "hw/semihosting/common-semi.h"
+#include "target/arm/syndrome.h"
=20
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r =3D get_user_u32((x), (gaddr)); \
@@ -76,7 +77,7 @@
void cpu_loop(CPUARMState *env)
{
CPUState *cs =3D env_cpu(env);
- int trapnr;
+ int trapnr, ec, fsc;
abi_long ret;
target_siginfo_t info;
=20
@@ -117,9 +118,26 @@ void cpu_loop(CPUARMState *env)
case EXCP_DATA_ABORT:
info.si_signo =3D TARGET_SIGSEGV;
info.si_errno =3D 0;
- /* XXX: check env->error_code */
- info.si_code =3D TARGET_SEGV_MAPERR;
info._sifields._sigfault._addr =3D env->exception.vaddress;
+
+ /* We should only arrive here with EC in {DATAABORT, INSNABORT=
}. */
+ ec =3D syn_get_ec(env->exception.syndrome);
+ assert(ec =3D=3D EC_DATAABORT || ec =3D=3D EC_INSNABORT);
+
+ /* Both EC have the same format for FSC, or close enough. */
+ fsc =3D extract32(env->exception.syndrome, 0, 6);
+ switch (fsc) {
+ case 0x04 ... 0x07: /* Translation fault, level {0-3} */
+ info.si_code =3D TARGET_SEGV_MAPERR;
+ break;
+ case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
+ case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
+ info.si_code =3D TARGET_SEGV_ACCERR;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
case EXCP_DEBUG:
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index df85079d9f0..9609333cbdf 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -154,21 +154,24 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, in=
t size,
bool probe, uintptr_t retaddr)
{
ARMCPU *cpu =3D ARM_CPU(cs);
+ ARMMMUFaultInfo fi =3D {};
=20
#ifdef CONFIG_USER_ONLY
- cpu->env.exception.vaddress =3D address;
- if (access_type =3D=3D MMU_INST_FETCH) {
- cs->exception_index =3D EXCP_PREFETCH_ABORT;
+ int flags =3D page_get_flags(useronly_clean_ptr(address));
+ if (flags & PAGE_VALID) {
+ fi.type =3D ARMFault_Permission;
} else {
- cs->exception_index =3D EXCP_DATA_ABORT;
+ fi.type =3D ARMFault_Translation;
}
- cpu_loop_exit_restore(cs, retaddr);
+
+ /* now we have a real cpu fault */
+ cpu_restore_state(cs, retaddr, true);
+ arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
#else
hwaddr phys_addr;
target_ulong page_size;
int prot, ret;
MemTxAttrs attrs =3D {};
- ARMMMUFaultInfo fi =3D {};
ARMCacheAttrs cacheattrs =3D {};
=20
/*
--=20
2.20.1