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[174.21.150.71]) by smtp.gmail.com with ESMTPSA id me3sm164189pjb.32.2021.02.09.16.02.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Feb 2021 16:02:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L/yy0MVTekscTvbExOtLpCwu/aJiFmhlysgQsSM+d6s=; b=rw8xjDvJZsv2TuUJ2Pfo7eaH9NntWoNAd6/g1+LeTktnuQ34HgXuVVnmz1ieX4c2BR 8h2qGGx+PfRGNY8sSDlqIRmJQLfkzAGOKH4ARH1ZJUNAcHeoFo40Asi+05ff052yDPsC /D2k+jliuhyArELXG+vHMJRIyNaLHas+VuusUzP4VxgTAfTd3+BkKuMoKtvpT7YWpPIi Nh58+4jwbw/Tpj9Qfpv/C5AK9Aa3BiM+8SlU5mi214BpEv48lmef2ZTzol8V8Ij3V9dd 7OY5rABEZZ87vID4NweUtbXc1K/uVSX6GmACEPdXIkG271p5nygztoFznM25mO4dcdcg WPag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L/yy0MVTekscTvbExOtLpCwu/aJiFmhlysgQsSM+d6s=; b=YhLj4qRoyEPnCpS2c2syglzkTcBhLI9gS0j8eRbibl2Ww1ZyUuCVSrdNFKhcW+8J77 IFg3tOijANAv6R9w7PglgIS8+6d7mAVcJgiTVZ9Wxc9dK6Xf2b1MqB9XyKdd2t3KmDh8 AH+chm8MRnDXmwpSbD0vDoGP1z/EoGrtDWxCp33OlXbODCExm3BNqmx2/Z/979xZTLZz 3LIvyItCnAQUoGQs92uyiO89Fk6DCjocWOjbeT46PHjfw08yjwnHx423LKR3+weY764j EClKA53MKtsdaQKc50ZhCMskIrvUGXf3nRXO7qT+qcMtPA+HQ3S9tgss35/zJGMktsaP 0JTA== X-Gm-Message-State: AOAM532Av/LZPXMHEByUVEzbGGaLk/R/06A8EG22qWXpLWoFjSnSmNjd DkHcz5vV2WHamKBPkq4FtLjY//jwU14CCA== X-Google-Smtp-Source: ABdhPJzPnhAu1uFGfwj6y1l5eDz4awL7mMG6UKoZqlIUJC36u7fUAKo1nrSnLnfVj2OxabO76mV02Q== X-Received: by 2002:a17:90a:5d87:: with SMTP id t7mr352438pji.175.1612915375089; Tue, 09 Feb 2021 16:02:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v6 24/31] linux-user/aarch64: Implement PROT_MTE Date: Tue, 9 Feb 2021 16:02:16 -0800 Message-Id: <20210210000223.884088-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210210000223.884088-1-richard.henderson@linaro.org> References: <20210210000223.884088-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2. Otherwise this does not yet have effect. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 1 + linux-user/syscall_defs.h | 1 + target/arm/cpu.h | 1 + linux-user/mmap.c | 22 ++++++++++++++-------- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index d6ad774c01..09b9be845d 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -284,6 +284,7 @@ extern intptr_t qemu_host_page_mask; #endif /* Target-specific bits that will be used via page_get_flags(). */ #define PAGE_TARGET_1 0x0080 +#define PAGE_TARGET_2 0x0200 =20 #if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index f98c1c1c8d..46a960fccb 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -1311,6 +1311,7 @@ struct target_winsize { =20 #ifdef TARGET_AARCH64 #define TARGET_PROT_BTI 0x10 +#define TARGET_PROT_MTE 0x20 #endif =20 /* Common */ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 558ad1466b..e3e61ce7ab 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3606,6 +3606,7 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxA= ttrs *x) * AArch64 usage of the PAGE_TARGET_* bits for linux-user. */ #define PAGE_BTI PAGE_TARGET_1 +#define PAGE_MTE PAGE_TARGET_2 =20 #ifdef TARGET_TAGGED_ADDRESSES /** diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 6690384752..85e218ab1d 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -84,18 +84,24 @@ static int validate_prot_to_pageflags(int *host_prot, i= nt prot) | (prot & PROT_EXEC ? PROT_READ : 0); =20 #ifdef TARGET_AARCH64 - /* - * The PROT_BTI bit is only accepted if the cpu supports the feature. - * Since this is the unusual case, don't bother checking unless - * the bit has been requested. If set and valid, record the bit - * within QEMU's page_flags. - */ - if (prot & TARGET_PROT_BTI) { + { ARMCPU *cpu =3D ARM_CPU(thread_cpu); - if (cpu_isar_feature(aa64_bti, cpu)) { + + /* + * The PROT_BTI bit is only accepted if the cpu supports the featu= re. + * Since this is the unusual case, don't bother checking unless + * the bit has been requested. If set and valid, record the bit + * within QEMU's page_flags. + */ + if ((prot & TARGET_PROT_BTI) && cpu_isar_feature(aa64_bti, cpu)) { valid |=3D TARGET_PROT_BTI; page_flags |=3D PAGE_BTI; } + /* Similarly for the PROT_MTE bit. */ + if ((prot & TARGET_PROT_MTE) && cpu_isar_feature(aa64_mte, cpu)) { + valid |=3D TARGET_PROT_MTE; + page_flags |=3D PAGE_MTE; + } } #endif =20 --=20 2.25.1