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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, Paolo Bonzini , kuhn.chenqun@huawei.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Richard Henderson Move the code from accel/tcg/translate-all.c to target/mips/cpu.c. Signed-off-by: Richard Henderson Message-Id: <20210208233906.479571-4-richard.henderson@linaro.org> Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Alex Benn=C3=A9e --- accel/tcg/translate-all.c | 12 ++---------- target/mips/cpu.c | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+), 10 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 6eb37883bd..470657b02a 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2417,7 +2417,7 @@ void tb_check_watchpoint(CPUState *cpu, uintptr_t ret= addr) */ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) { -#if defined(TARGET_MIPS) || defined(TARGET_SH4) +#if defined(TARGET_SH4) CPUArchState *env =3D cpu->env_ptr; #endif TranslationBlock *tb; @@ -2443,15 +2443,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retad= dr) cpu_neg(cpu)->icount_decr.u16.low++; n =3D 2; } -#if defined(TARGET_MIPS) - if ((env->hflags & MIPS_HFLAG_BMASK) !=3D 0 - && env->active_tc.PC !=3D tb->pc) { - env->active_tc.PC -=3D (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); - cpu_neg(cpu)->icount_decr.u16.low++; - env->hflags &=3D ~MIPS_HFLAG_BMASK; - n =3D 2; - } -#elif defined(TARGET_SH4) +#if defined(TARGET_SH4) if ((env->flags & ((DELAY_SLOT | DELAY_SLOT_CONDITIONAL))) !=3D 0 && env->pc !=3D tb->pc) { env->pc -=3D 2; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index ad163ead62..bf70c77295 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -268,6 +268,23 @@ static void mips_cpu_synchronize_from_tb(CPUState *cs, env->hflags &=3D ~MIPS_HFLAG_BMASK; env->hflags |=3D tb->flags & MIPS_HFLAG_BMASK; } + +# ifndef CONFIG_USER_ONLY +static bool mips_io_recompile_replay_branch(CPUState *cs, + const TranslationBlock *tb) +{ + MIPSCPU *cpu =3D MIPS_CPU(cs); + CPUMIPSState *env =3D &cpu->env; + + if ((env->hflags & MIPS_HFLAG_BMASK) !=3D 0 + && env->active_tc.PC !=3D tb->pc) { + env->active_tc.PC -=3D (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); + env->hflags &=3D ~MIPS_HFLAG_BMASK; + return true; + } + return false; +} +# endif /* !CONFIG_USER_ONLY */ #endif /* CONFIG_TCG */ =20 static bool mips_cpu_has_work(CPUState *cs) @@ -679,6 +696,7 @@ static struct TCGCPUOps mips_tcg_ops =3D { .do_interrupt =3D mips_cpu_do_interrupt, .do_transaction_failed =3D mips_cpu_do_transaction_failed, .do_unaligned_access =3D mips_cpu_do_unaligned_access, + .io_recompile_replay_branch =3D mips_io_recompile_replay_branch, #endif /* !CONFIG_USER_ONLY */ }; #endif /* CONFIG_TCG */ --=20 2.20.1