From nobody Tue Nov 18 21:15:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.45 as permitted sender) client-ip=209.85.128.45; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f45.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.45 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1612738689; cv=none; d=zohomail.com; s=zohoarc; b=Z5e8Kw5FZT5j9M4IwF2EDIk7il5t191XHYInuaC6htnecVjRP5jHYJ9mcTW1U7lwohOYKOH+DbZuNS4yhpmS6RiY4hlXzMraiscP94irLt1ZvHGY/x21davJMjDaj6DbbsW5iYbL9COhP5UfkeFRbnb8Zv3fJi5j0i/q14rbXY8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1612738689; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=imFQGKJBgIE298lnVAuxYDCszjx31PWDfQloLbhmsMQ=; b=X9Ix3TF9349pIwcsx/U2AF/mVV1NDYDq8VJP89zNk2hDYI+3LoYUJO28XH1uHhIrQRx8a0W9kWux4GgNN2AdH9mdS2lUsaNUMb3g20DPKBKykjSe4akrbaZsvjiourxYlzcGrOQZUUipZ5Tgdn9rQUiwWqdkeJUtutLyZC1KDmI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.45 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) by mx.zohomail.com with SMTPS id 1612738689671789.9267566525159; Sun, 7 Feb 2021 14:58:09 -0800 (PST) Received: by mail-wm1-f45.google.com with SMTP id 190so11144182wmz.0 for ; Sun, 07 Feb 2021 14:58:09 -0800 (PST) Return-Path: Return-Path: Received: from localhost.localdomain (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id z6sm6300217wmi.39.2021.02.07.14.58.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Feb 2021 14:58:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=imFQGKJBgIE298lnVAuxYDCszjx31PWDfQloLbhmsMQ=; b=ccqfoVFWKhdwHfQk7EbK+L+WxFtzyD2lU54qDn3jgzJBdMirDaUQk7vEegZZYvh5pJ RprOm+NyNZeYKPsmdBydtNPkZQfQycmxtC1V+7juepQlohVEx/0KEdKVTYlLplACS3WE km9oxVD3WQZNG68qlnfzSJb1QsaEeDNZJT/PGaq8s75GNyq9pM/Er94AKuRLeXjp1tlj pVaEdHgsyHt1K1gIVFnXc4Wv0Taq+HupGxWlkDkCpR/q2mhxWcuN4uYpiPUKl8XZ2DKV 5zcV1t79HCt1Yg3Xcj3IkC3HFx082SYlE59JYxbdXDM0o82JuN1Ks2XWWqMhcM90icRI KPtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=imFQGKJBgIE298lnVAuxYDCszjx31PWDfQloLbhmsMQ=; b=sNALV5hmcbTbFMYTsnoaPlPyNH6x2+HPHFEeiqrmHTof6yNhmLqudXyzsEGu6/6Mdd Vt7IW2tivFLwPOfUggxq7EuXxXthq+imeRQHO3hhGU71ajLcla0ccbfn+bzbaH8eL2Qp PUaok9M65bVPol1d+bycsDc82/TRVM73VrDVS1bDHdCqXzxGAUs8xlrgeaHWr7aN82OV +p3QwEosqIeSO8VSdlcCWFEYyRjpqQgHHOePHCvzvXgsTvAve+wueuqZ6yQSrKVoBNDX 4ZtAYB3/FuYNk6au/OUfXv5M4bwl0UIfrLd1nptD0usQHFlvYPSeHD28NOO/P8rzCxXd zX3A== X-Gm-Message-State: AOAM5333bUrXZsF1z3mxEXk9ZNU8ljsC73UQr1Spi1c/KLVIdZQdusUK 0eq7n1PA10OSmOn4oh4ejDY= X-Google-Smtp-Source: ABdhPJw/1Snq5MMokBjwZDAYrhfP9rZn2CbyxktT5w7GVWiOTMd+hThpFCk39XUsnjoTLmsK7GY4pw== X-Received: by 2002:a7b:cb4f:: with SMTP id v15mr12379534wmj.162.1612738687873; Sun, 07 Feb 2021 14:58:07 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , Bastian Koppelmann , Peter Maydell , Claudio Fontana , Paolo Bonzini , Yoshinori Sato , Aleksandar Rikalo , qemu-arm@nongnu.org, Aurelien Jarno , qemu-riscv@nongnu.org, Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Alistair Francis , Sagar Karandikar , Jiaxun Yang Subject: [RFC PATCH 5/6] accel/tcg: Refactor debugging tlb_assert_iotlb_entry_for_ptr_present() Date: Sun, 7 Feb 2021 23:57:37 +0100 Message-Id: <20210207225738.2482987-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210207225738.2482987-1-f4bug@amsat.org> References: <20210207225738.2482987-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Refactor debug code as tlb_assert_iotlb_entry_for_ptr_present() helper. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- What this code does is out of my league, but refactoring it allow keeping tlb_addr_write() local to accel/tcg/cputlb.c in the next patch. --- include/exec/exec-all.h | 9 +++++++++ accel/tcg/cputlb.c | 14 ++++++++++++++ target/arm/mte_helper.c | 11 ++--------- target/arm/sve_helper.c | 10 ++-------- 4 files changed, 27 insertions(+), 17 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index f933c74c446..c5e8e355b7f 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -296,6 +296,15 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulo= ng vaddr, void tlb_set_page(CPUState *cpu, target_ulong vaddr, hwaddr paddr, int prot, int mmu_idx, target_ulong size); + +/* + * Find the iotlbentry for ptr. This *must* be present in the TLB + * because we just found the mapping. + */ +void tlb_assert_iotlb_entry_for_ptr_present(CPUArchState *env, int ptr_mmu= _idx, + uint64_t ptr, + MMUAccessType ptr_access, + uintptr_t index); #else static inline void tlb_init(CPUState *cpu) { diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 8a7b779270a..a6247da34a0 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -429,6 +429,20 @@ void tlb_flush_all_cpus_synced(CPUState *src_cpu) tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, ALL_MMUIDX_BITS); } =20 +void tlb_assert_iotlb_entry_for_ptr_present(CPUArchState *env, int ptr_mmu= _idx, + uint64_t ptr, + MMUAccessType ptr_access, + uintptr_t index) +{ +#ifdef CONFIG_DEBUG_TCG + CPUTLBEntry *entry =3D tlb_entry(env, ptr_mmu_idx, ptr); + target_ulong comparator =3D (ptr_access =3D=3D MMU_DATA_LOAD + ? entry->addr_read + : tlb_addr_write(entry)); + g_assert(tlb_hit(comparator, ptr)); +#endif +} + static bool tlb_hit_page_mask_anyprot(CPUTLBEntry *tlb_entry, target_ulong page, target_ulong mask) { diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index 6cea9d1b506..f47d3b4570e 100644 --- a/target/arm/mte_helper.c +++ b/target/arm/mte_helper.c @@ -111,15 +111,8 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, i= nt ptr_mmu_idx, * matching tlb entry + iotlb entry. */ index =3D tlb_index(env, ptr_mmu_idx, ptr); -# ifdef CONFIG_DEBUG_TCG - { - CPUTLBEntry *entry =3D tlb_entry(env, ptr_mmu_idx, ptr); - target_ulong comparator =3D (ptr_access =3D=3D MMU_DATA_LOAD - ? entry->addr_read - : tlb_addr_write(entry)); - g_assert(tlb_hit(comparator, ptr)); - } -# endif + tlb_assert_iotlb_entry_for_ptr_present(env, ptr_mmu_idx, ptr, + ptr_access, index); iotlbentry =3D &env_tlb(env)->d[ptr_mmu_idx].iotlb[index]; =20 /* If the virtual page MemAttr !=3D Tagged, access unchecked. */ diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index c8cdf7618eb..a5708da0f2f 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -4089,14 +4089,8 @@ static bool sve_probe_page(SVEHostPage *info, bool n= ofault, { uintptr_t index =3D tlb_index(env, mmu_idx, addr); =20 -# ifdef CONFIG_DEBUG_TCG - CPUTLBEntry *entry =3D tlb_entry(env, mmu_idx, addr); - target_ulong comparator =3D (access_type =3D=3D MMU_DATA_LOAD - ? entry->addr_read - : tlb_addr_write(entry)); - g_assert(tlb_hit(comparator, addr)); -# endif - + tlb_assert_iotlb_entry_for_ptr_present(env, mmu_idx, addr, + access_type, index); CPUIOTLBEntry *iotlbentry =3D &env_tlb(env)->d[mmu_idx].iotlb[inde= x]; info->attrs =3D iotlbentry->attrs; } --=20 2.26.2