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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q6sm4142283wmj.32.2021.02.02.09.55.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Feb 2021 09:55:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=/ui3mPYh//6P4ROb9feP98zESvjv3VvYW7WCODFKeEk=; b=l1biYz8WR2CQbSRQKMWthUQMMG3RsM+CipSi14dGqjUA7Mq+pAKCYrYY+xISlI3d5B D/bu6tcKA/vwEAngybv4NMg6cV0mD2we+ptTLRa+0eFE8ouU8oSV0En8FvaPmysYfcu6 KRuPIG7GcszJHoNOjXofISC8v8lm3pfwb9SQsd+1UOla9k/wxdSKceZosESZ9Soqr79D ZsRHFc9ZkRdhBGqhwspY48DxWStvStuDvtjf+5m+e18i7o2lyKyIFBo1wu8sW6sHcdZ9 Es5zApFknEoJSwLQ/gWb3vPsRwZEzLUqQhI+GAbd2RPiD0eSHMC2u6R0XNeKM5rIVBNp vk4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/ui3mPYh//6P4ROb9feP98zESvjv3VvYW7WCODFKeEk=; b=Pny1HHFH/TdKzQW575rTmh43t66hQRN08MCcccr4RZUwcTrJb8V0J7+pxvwNeNXdzB DGwhUir9gci7CtiCw8UgwcBWs0HVpxpw2Wyv6r0TxvncUZN+XSXqm6UqCh410+c2xyDF u4SZSCySfO85pgdNfDfYlrmPMjm9PD/0uxDYaRPQaHZn0cQHbuPD7cg1TQcndq5+gvlW UN7ryf3IuIVHiw10sa3Bgeq3s2Q9kWkDWcHwAkVpFzaLhqjjErsZPuvDE2Hp7Q+/XT/W CuewOSaF5s5HF955Rx6/7YRTy0iD7+GqZuVHn29OINjn5YqWEkJL6xux1TWEUPm4UtWJ T1og== X-Gm-Message-State: AOAM533fRr3IL2Uhdg02fqfP6y7TGGXfKR7Ve9YozqHwU4OlcNblKqsj YbNdu7xPs21zPXcCnd5yDM0BDofaYlcJMw== X-Google-Smtp-Source: ABdhPJyaflDjxYFtwN9XJwkdENxPRSHJG3wSQ1Iz0zN5aRKCCiDLKhYgIr/1Nutcs8nGeTMnP28fEg== X-Received: by 2002:adf:ed02:: with SMTP id a2mr13729480wro.197.1612288535051; Tue, 02 Feb 2021 09:55:35 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/21] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ Date: Tue, 2 Feb 2021 17:55:12 +0000 Message-Id: <20210202175517.28729-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210202175517.28729-1-peter.maydell@linaro.org> References: <20210202175517.28729-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 The STM32F405 SoC uses an OR gate on its ADC IRQs. Fixes: 529fc5fd3e1 ("hw/arm: Add the STM32F4xx SoC") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20210131184449.382425-2-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 13cc42dcc84..a320a124855 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -336,6 +336,7 @@ config STM32F205_SOC config STM32F405_SOC bool select ARM_V7M + select OR_IRQ select STM32F4XX_SYSCFG select STM32F4XX_EXTI =20 --=20 2.20.1