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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q6sm20466278wmj.32.2021.02.01.04.30.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 04:30:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=916HlTSKADFRU1RlvZ2Hog+CtRE+d62Lrf0BYSQTo90=; b=AF/5DHPwF1F8hn/N17gU3gnRHCjyrerOY9pBAsgSFxN35cZUBxCNxLnykHgeojVzlM Z42R61dSm6XhMnprVa4wwsWBNO7zp7fLfns1ooAn/m67MSzZXRNy6/xyY9b01q/gKO5s TOclRrAE3E84bQBGpXhqjqttnp6UHjhuxip1zL5c2jipKlgtC1z4Ijr3qcVeAcL1s7be dAq1jJZAW39NeyFY6cCQgT2z+f+LvDd4DubC7RL+027dPJR+0pTGVnilhHpY3mrZ8XHs 0Ru+mu86NlBIsBzwqXeqzN4tvXGfvKYJ0KBIq065G2C4n/IP27nMeIm1gwLYwnj7lWJH XjDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=916HlTSKADFRU1RlvZ2Hog+CtRE+d62Lrf0BYSQTo90=; b=TCRtGlHd5+monNMI6y0yKDzBue7OvEZL/XYxxI/cC6l8f6Mz60OkfvPyPcPPjZ95jD OMz0el90mlFK8f0IDPAWvUnMLaIv3KtbZtiJRTxwPkEjiTKK+YYtQOHRCULHhNRjutc3 5T6ZohsBUVvxX47DDBjdiWafs10S/ceFBU4gc/+S7DnO0rmNGR2busAUTZzV0wbURZ7u RrAeNAsoKrvdNm3FUkxyEj7RS+HtGG/RwWDfeD9QEitsgo9rwwwqt0T890/OZI0JgVO7 ZlS6szh6lqPWyamDvg6P/oEO4/e99Mu1upMbzaAmD3tjtLAebvxFtK5i9t1HctBF3VLQ gSIg== X-Gm-Message-State: AOAM531y0j6BxNXrTCw/0CRdBxfj/SxfTB3daySQpOK38rTnsn2oEFR8 cjqjd9AVixvgqi5i48+LjkpSqw== X-Google-Smtp-Source: ABdhPJyIt2rn8LgxZ9RHz8AtZdjZKpjTXJABLXJ1Ip+ScJTGUqJVRaddVzr+wDzMRELmLFa483uNaQ== X-Received: by 2002:a1c:105:: with SMTP id 5mr7140365wmb.89.1612182617622; Mon, 01 Feb 2021 04:30:17 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [RFC 1/4] clock: Add ClockEvent parameter to callbacks Date: Mon, 1 Feb 2021 12:30:10 +0000 Message-Id: <20210201123013.32308-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210201123013.32308-1-peter.maydell@linaro.org> References: <20210201123013.32308-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Havard Skinnemoen , Tyrone Ting Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The Clock framework allows users to specify a callback which is called after the clock's period has been updated. Some users need to also have a callback which is called before the clock period is updated. As the first step in adding support for notifying Clock users on pre-update events, add an argument to the ClockCallback to specify what event is being notified, and make the existing callback implementations check this argument and only act if the event is ClockUpdate. Note that the documentation update renders correct the previously incorrect claim in 'Adding a new clock' that callbacks "will be explained in a following section". Signed-off-by: Peter Maydell --- I thought about trying to add support for pre-update callbacks in a way that didn't require changes to every current callback user, but there aren't *that* many of them and I think this API is nicer than having multiple separate callback pointers and extra functions for "also set the pre-update callback" and so on. --- docs/devel/clocks.rst | 35 ++++++++++++++++++++++++++++++-- include/hw/clock.h | 10 ++++++++- hw/arm/armsse.c | 8 ++++++-- hw/char/cadence_uart.c | 5 ++++- hw/char/ibex_uart.c | 5 ++++- hw/char/pl011.c | 5 ++++- hw/core/clock.c | 2 +- hw/misc/bcm2835_cprman.c | 20 ++++++++++++++---- hw/misc/npcm7xx_clk.c | 31 +++++++++++++++++++++++++--- hw/misc/zynq_slcr.c | 6 +++++- hw/timer/cmsdk-apb-dualtimer.c | 5 ++++- hw/timer/cmsdk-apb-timer.c | 5 ++++- hw/watchdog/cmsdk-apb-watchdog.c | 5 ++++- 13 files changed, 122 insertions(+), 20 deletions(-) diff --git a/docs/devel/clocks.rst b/docs/devel/clocks.rst index c54bbb82409..8d3b456561f 100644 --- a/docs/devel/clocks.rst +++ b/docs/devel/clocks.rst @@ -113,7 +113,7 @@ output. * callback for the input clock (see "Callback on input clock * change" section below for more information). */ - static void clk_in_callback(void *opaque); + static void clk_in_callback(void *opaque, ClockEvent event); =20 /* * static array describing clocks: @@ -153,6 +153,34 @@ nothing else to do. This value will be propagated to o= ther clocks when connecting the clocks together and devices will fetch the right value duri= ng the first reset. =20 +Clock callbacks +--------------- + +You can give a clock a callback function in several ways: + + * by passing it as an argument to ``qdev_init_clock_in()`` + * as an argument to the ``QDEV_CLOCK_IN()`` macro initializing an + array to be passed to ``qdev_init_clocks()`` + * by directly calling the ``clock_set_callback()`` function + +The callback function must be of this type: + +.. code-block:: c + + typedef void ClockCallback(void *opaque, ClockEvent event); + +The ``opaque`` argument is the pointer passed to ``qdev_init_clock_in()`` +or ``clock_set_callback()``; for ``qdev_init_clocks()`` it is the +``dev`` device pointer. + +The ``event`` argument specifies why the callback has been called. +Callback functions should check this and only do something for +specific events they need to handle, so that if in future different +events are added the callback code doesn't need to be updated. +The events currently supported are: + + * ``ClockUpdate`` : called after the input clock's period has changed + Retrieving clocks from a device ------------------------------- =20 @@ -271,12 +299,15 @@ Here is an example: =20 .. code-block:: c =20 - void clock_callback(void *opaque) { + void clock_callback(void *opaque, ClockEvent event) { MyDeviceState *s =3D (MyDeviceState *) opaque; /* * 'opaque' is the argument passed to qdev_init_clock_in(); * usually this will be the device state pointer. */ + if (event !=3D ClockUpdate) { + return; + } =20 /* do something with the new period */ fprintf(stdout, "device new period is %" PRIu64 "* 2^-32 ns\n", diff --git a/include/hw/clock.h b/include/hw/clock.h index e5f45e2626d..323f8d49fed 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -22,7 +22,15 @@ #define TYPE_CLOCK "clock" OBJECT_DECLARE_SIMPLE_TYPE(Clock, CLOCK) =20 -typedef void ClockCallback(void *opaque); +/* + * Argument to ClockCallback functions indicating why the callback + * has been called. + */ +typedef enum ClockEvent { + ClockUpdate, /* Clock period has just updated */ +} ClockEvent; + +typedef void ClockCallback(void *opaque, ClockEvent event); =20 /* * clock store a value representing the clock's period in 2^-32ns unit. diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 26e1a8c95b6..cf0bd962ea2 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -230,9 +230,13 @@ static void armsse_forward_sec_resp_cfg(ARMSSE *s) qdev_connect_gpio_out(dev_splitter, 2, s->sec_resp_cfg_in); } =20 -static void armsse_mainclk_update(void *opaque) +static void armsse_mainclk_update(void *opaque, ClockEvent event) { ARMSSE *s =3D ARM_SSE(opaque); + + if (event !=3D ClockUpdate) { + return; + } /* * Set system_clock_scale from our Clock input; this is what * controls the tick rate of the CPU SysTick timer. @@ -1120,7 +1124,7 @@ static void armsse_realize(DeviceState *dev, Error **= errp) sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->container); =20 /* Set initial system_clock_scale from MAINCLK */ - armsse_mainclk_update(s); + armsse_mainclk_update(s, ClockUpdate); } =20 static void armsse_idau_check(IDAUInterface *ii, uint32_t address, diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index c603e14012a..2900688fc24 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -519,10 +519,13 @@ static void cadence_uart_realize(DeviceState *dev, Er= ror **errp) uart_event, NULL, s, NULL, true); } =20 -static void cadence_uart_refclk_update(void *opaque) +static void cadence_uart_refclk_update(void *opaque, ClockEvent event) { CadenceUARTState *s =3D opaque; =20 + if (event !=3D ClockUpdate) { + return; + } /* recompute uart's speed on clock change */ uart_parameters_setup(s); } diff --git a/hw/char/ibex_uart.c b/hw/char/ibex_uart.c index 89f1182c9bf..c90d4d69baf 100644 --- a/hw/char/ibex_uart.c +++ b/hw/char/ibex_uart.c @@ -396,10 +396,13 @@ static void ibex_uart_write(void *opaque, hwaddr addr, } } =20 -static void ibex_uart_clk_update(void *opaque) +static void ibex_uart_clk_update(void *opaque, ClockEvent event) { IbexUartState *s =3D opaque; =20 + if (event !=3D ClockUpdate) { + return; + } /* recompute uart's speed on clock change */ uint64_t baud =3D ibex_uart_get_baud(s); =20 diff --git a/hw/char/pl011.c b/hw/char/pl011.c index ea4a4e52356..d3040c0fab3 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -309,10 +309,13 @@ static void pl011_event(void *opaque, QEMUChrEvent ev= ent) pl011_put_fifo(opaque, 0x400); } =20 -static void pl011_clock_update(void *opaque) +static void pl011_clock_update(void *opaque, ClockEvent event) { PL011State *s =3D PL011(opaque); =20 + if (event !=3D ClockUpdate) { + return; + } pl011_trace_baudrate_change(s); } =20 diff --git a/hw/core/clock.c b/hw/core/clock.c index 76b5f468b6e..772d03a2eb5 100644 --- a/hw/core/clock.c +++ b/hw/core/clock.c @@ -73,7 +73,7 @@ static void clock_propagate_period(Clock *clk, bool call_= callbacks) CLOCK_PERIOD_TO_HZ(clk->period), call_callbacks); if (call_callbacks && child->callback) { - child->callback(child->callback_opaque); + child->callback(child->callback_opaque, ClockUpdate); } clock_propagate_period(child, call_callbacks); } diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c index 7e415a017c9..5df4bcdb22d 100644 --- a/hw/misc/bcm2835_cprman.c +++ b/hw/misc/bcm2835_cprman.c @@ -107,8 +107,11 @@ static void pll_update(CprmanPllState *pll) clock_update_hz(pll->out, freq); } =20 -static void pll_xosc_update(void *opaque) +static void pll_xosc_update(void *opaque, ClockEvent event) { + if (event !=3D ClockUpdate) { + return; + } pll_update(CPRMAN_PLL(opaque)); } =20 @@ -209,8 +212,11 @@ static void pll_update_all_channels(BCM2835CprmanState= *s, } } =20 -static void pll_channel_pll_in_update(void *opaque) +static void pll_channel_pll_in_update(void *opaque, ClockEvent event) { + if (event !=3D ClockUpdate) { + return; + } pll_channel_update(CPRMAN_PLL_CHANNEL(opaque)); } =20 @@ -303,12 +309,15 @@ static void clock_mux_update(CprmanClockMuxState *mux) clock_update_hz(mux->out, freq); } =20 -static void clock_mux_src_update(void *opaque) +static void clock_mux_src_update(void *opaque, ClockEvent event) { CprmanClockMuxState **backref =3D opaque; CprmanClockMuxState *s =3D *backref; CprmanClockMuxSource src =3D backref - s->backref; =20 + if (event !=3D ClockUpdate) { + return; + } if (FIELD_EX32(*s->reg_ctl, CM_CLOCKx_CTL, SRC) !=3D src) { return; } @@ -380,8 +389,11 @@ static void dsi0hsck_mux_update(CprmanDsi0HsckMuxState= *s) clock_update(s->out, clock_get(src)); } =20 -static void dsi0hsck_mux_in_update(void *opaque) +static void dsi0hsck_mux_in_update(void *opaque, ClockEvent event) { + if (event !=3D ClockUpdate) { + return; + } dsi0hsck_mux_update(CPRMAN_DSI0HSCK_MUX(opaque)); } =20 diff --git a/hw/misc/npcm7xx_clk.c b/hw/misc/npcm7xx_clk.c index 0bcae9ce957..935184d5482 100644 --- a/hw/misc/npcm7xx_clk.c +++ b/hw/misc/npcm7xx_clk.c @@ -586,15 +586,31 @@ static const DividerInitInfo divider_init_info_list[]= =3D { }, }; =20 +static void npcm7xx_clk_update_pll_cb(void *opaque, ClockEvent event) +{ + if (event !=3D ClockUpdate) { + return; + } + npcm7xx_clk_update_pll(opaque); +} + static void npcm7xx_clk_pll_init(Object *obj) { NPCM7xxClockPLLState *pll =3D NPCM7XX_CLOCK_PLL(obj); =20 pll->clock_in =3D qdev_init_clock_in(DEVICE(pll), "clock-in", - npcm7xx_clk_update_pll, pll); + npcm7xx_clk_update_pll_cb, pll); pll->clock_out =3D qdev_init_clock_out(DEVICE(pll), "clock-out"); } =20 +static void npcm7xx_clk_update_sel_cb(void *opaque, ClockEvent event) +{ + if (event !=3D ClockUpdate) { + return; + } + npcm7xx_clk_update_sel(opaque); +} + static void npcm7xx_clk_sel_init(Object *obj) { int i; @@ -603,16 +619,25 @@ static void npcm7xx_clk_sel_init(Object *obj) for (i =3D 0; i < NPCM7XX_CLK_SEL_MAX_INPUT; ++i) { sel->clock_in[i] =3D qdev_init_clock_in(DEVICE(sel), g_strdup_printf("clock-in[%d]", i), - npcm7xx_clk_update_sel, sel); + npcm7xx_clk_update_sel_cb, sel); } sel->clock_out =3D qdev_init_clock_out(DEVICE(sel), "clock-out"); } + +static void npcm7xx_clk_update_divider_cb(void *opaque, ClockEvent event) +{ + if (event !=3D ClockUpdate) { + return; + } + npcm7xx_clk_update_divider(opaque); +} + static void npcm7xx_clk_divider_init(Object *obj) { NPCM7xxClockDividerState *div =3D NPCM7XX_CLOCK_DIVIDER(obj); =20 div->clock_in =3D qdev_init_clock_in(DEVICE(div), "clock-in", - npcm7xx_clk_update_divider, div); + npcm7xx_clk_update_divider_cb, div); div->clock_out =3D qdev_init_clock_out(DEVICE(div), "clock-out"); } =20 diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index 66504a9d3ab..555d93ba50c 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -307,9 +307,13 @@ static void zynq_slcr_propagate_clocks(ZynqSLCRState *= s) clock_propagate(s->uart1_ref_clk); } =20 -static void zynq_slcr_ps_clk_callback(void *opaque) +static void zynq_slcr_ps_clk_callback(void *opaque, ClockEvent event) { ZynqSLCRState *s =3D (ZynqSLCRState *) opaque; + + if (event !=3D ClockUpdate) { + return; + } zynq_slcr_compute_clocks(s); zynq_slcr_propagate_clocks(s); } diff --git a/hw/timer/cmsdk-apb-dualtimer.c b/hw/timer/cmsdk-apb-dualtimer.c index ef49f5852d3..ebbc036dc89 100644 --- a/hw/timer/cmsdk-apb-dualtimer.c +++ b/hw/timer/cmsdk-apb-dualtimer.c @@ -449,11 +449,14 @@ static void cmsdk_apb_dualtimer_reset(DeviceState *de= v) s->timeritop =3D 0; } =20 -static void cmsdk_apb_dualtimer_clk_update(void *opaque) +static void cmsdk_apb_dualtimer_clk_update(void *opaque, ClockEvent event) { CMSDKAPBDualTimer *s =3D CMSDK_APB_DUALTIMER(opaque); int i; =20 + if (event !=3D ClockUpdate) { + return; + } for (i =3D 0; i < ARRAY_SIZE(s->timermod); i++) { CMSDKAPBDualTimerModule *m =3D &s->timermod[i]; ptimer_transaction_begin(m->timer); diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index ee51ce3369c..06264f36d4e 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -204,10 +204,13 @@ static void cmsdk_apb_timer_reset(DeviceState *dev) ptimer_transaction_commit(s->timer); } =20 -static void cmsdk_apb_timer_clk_update(void *opaque) +static void cmsdk_apb_timer_clk_update(void *opaque, ClockEvent event) { CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(opaque); =20 + if (event !=3D ClockUpdate) { + return; + } ptimer_transaction_begin(s->timer); ptimer_set_period_from_clock(s->timer, s->pclk, 1); ptimer_transaction_commit(s->timer); diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-watch= dog.c index 302f1711738..7564e8b3326 100644 --- a/hw/watchdog/cmsdk-apb-watchdog.c +++ b/hw/watchdog/cmsdk-apb-watchdog.c @@ -310,10 +310,13 @@ static void cmsdk_apb_watchdog_reset(DeviceState *dev) ptimer_transaction_commit(s->timer); } =20 -static void cmsdk_apb_watchdog_clk_update(void *opaque) +static void cmsdk_apb_watchdog_clk_update(void *opaque, ClockEvent event) { CMSDKAPBWatchdog *s =3D CMSDK_APB_WATCHDOG(opaque); =20 + if (event !=3D ClockUpdate) { + return; + } ptimer_transaction_begin(s->timer); ptimer_set_period_from_clock(s->timer, s->wdogclk, 1); ptimer_transaction_commit(s->timer); --=20 2.20.1 From nobody Tue May 21 18:12:15 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q6sm20466278wmj.32.2021.02.01.04.30.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 04:30:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dZnuCCfmvDgfaNUppjP1kLNGCewuh/sSis1yC+WzkTg=; b=WRgITgzCFFJWwzhIuStZKCghFmZ11to5z1rmMCG/cRipRKdpKfPMFlttmSnwmLCH1b FO+9Z0MeE3Z3n/B4+Jsv5ElyazR6uGY17C4du9HXCbAt9qvw25ZGx3/mkdOER3kGD30V cOjNWzC1dMDq2oZtusyJzVKUuum79jdxEbnnuRdQgEkB3EidQGrSFy1n8xamKSMbYGUv ehdWHnAPQAS3NqEDLgUYJL8FvtXiGe+gZdvNd4n4z8wdwjU6+w1vycyIak/p/Y07teS6 bEci1mDZLcmrQdjQ4SiRf+UNm/DC7hhAAS2halLYW5frCVH7PbSPw9/XSIQcxsijprB0 tKVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dZnuCCfmvDgfaNUppjP1kLNGCewuh/sSis1yC+WzkTg=; b=WBSdh60ZAFTclS9kp5ZSxMZ8tS+quwHtleQ8LSKysMQ9ScFl2OWxyj3S220ibzqGDH Z8meV/LjIXg/GkbwZ2TqEIunF2roUtGvvXJn3fmOo0q+DT8VXhne9qJRdUBUsPfBMKsp 2TBaRvxlDvrMZR35i+pUkkdoQjQvnJqfOosjl3m0N/T5m8CuZhJ4XJKab4sKT9W9oWlA Ek2SpgM2EBEM2Ld0Zy4mYUfaaLcQpyaRhW8NtTxeqhuNdrWitAceh6sufYBGCCnK7+Yw KOrdVtlpSkZD9VBKnUBW5bEaMetOPzO7bmE9vb1uZWEn/KS+HpyMy5cfVHjQ9X9EtBfg z+lw== X-Gm-Message-State: AOAM532jZew3OYxizCZtAd2xKC3KJmyFWQhmlUYYxYe2ILEpM0PtSRhr I08ZhDhHx7hb4T5qGZt6tp5YMg== X-Google-Smtp-Source: ABdhPJxNTv+hyuWH2gBspM7Kd8UiKTbJLweEUcKv5zxShCNkDueyeLecn7q5byp+WUiS+/0k6AE1Lg== X-Received: by 2002:a7b:cc16:: with SMTP id f22mr14443391wmh.131.1612182618716; Mon, 01 Feb 2021 04:30:18 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [RFC 2/4] clock: Add ClockPreUpdate callback event type Date: Mon, 1 Feb 2021 12:30:11 +0000 Message-Id: <20210201123013.32308-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210201123013.32308-1-peter.maydell@linaro.org> References: <20210201123013.32308-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Havard Skinnemoen , Tyrone Ting Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add a new callback event type ClockPreUpdate, which is called on period changes before the period is updated. Signed-off-by: Peter Maydell --- docs/devel/clocks.rst | 9 ++++++++- include/hw/clock.h | 1 + hw/core/clock.c | 3 +++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/docs/devel/clocks.rst b/docs/devel/clocks.rst index 8d3b456561f..dea63742fb0 100644 --- a/docs/devel/clocks.rst +++ b/docs/devel/clocks.rst @@ -179,7 +179,14 @@ specific events they need to handle, so that if in fut= ure different events are added the callback code doesn't need to be updated. The events currently supported are: =20 - * ``ClockUpdate`` : called after the input clock's period has changed + * ``ClockPreUpdate`` : called when the input clock's period is about to + update. This is useful if the device needs to do some action for + which it needs to know the old value of the clock period. During + this callback, Clock API functions like ``clock_get()`` or + ``clock_ticks_to_ns()`` will use the old period. + * ``ClockUpdate`` : called after the input clock's period has changed. + During this callback, Clock API functions like ``clock_ticks_to_ns()`` + will use the new period. =20 Retrieving clocks from a device ------------------------------- diff --git a/include/hw/clock.h b/include/hw/clock.h index 323f8d49fed..7d0eb286faa 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -27,6 +27,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(Clock, CLOCK) * has been called. */ typedef enum ClockEvent { + ClockPreUpdate, /* Clock period is about to update */ ClockUpdate, /* Clock period has just updated */ } ClockEvent; =20 diff --git a/hw/core/clock.c b/hw/core/clock.c index 772d03a2eb5..963fe83a363 100644 --- a/hw/core/clock.c +++ b/hw/core/clock.c @@ -68,6 +68,9 @@ static void clock_propagate_period(Clock *clk, bool call_= callbacks) =20 QLIST_FOREACH(child, &clk->children, sibling) { if (child->period !=3D clk->period) { + if (call_callbacks && child->callback) { + child->callback(child->callback_opaque, ClockPreUpdate); + } child->period =3D clk->period; trace_clock_update(CLOCK_PATH(child), CLOCK_PATH(clk), CLOCK_PERIOD_TO_HZ(clk->period), --=20 2.20.1 From nobody Tue May 21 18:12:15 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1612182847; cv=none; d=zohomail.com; s=zohoarc; b=M03kXfNyz6JgKiuR70Yoq0hOzRvPP1qyKNQLCYULcwmUZ52OM+HEIeZ3XIl55XY6A1Fn22WjvIwRwuLJ8ICOJ8OQziDZe17duU/mqh77tWHdDV2nQCw5+I9K2nsepg808ZbdPwocsyK5GCl57CFjMIcaae5vfs9t08jVDAD8oIU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1612182847; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uHDOPARSpjV/tDsSIA6xCo+KUD0YSwaTbi1mbLNgF8E=; b=DRE5V/ieoDY2N+H7TGkua7eoHyFlNGxyhivFAUyk8OIbWiOGM596zt5XvhpWDxPY0EYeRy6NRhfYOUrmNzxtvJPiz0TCvKkli8ngXFZsAfn5pAscxKbLP1DJxGmsbn17L3slHDYFh5xafcGoi8G6/3U4oZor0UmPCAzMn1A2wa4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1612182847845531.7875887874987; Mon, 1 Feb 2021 04:34:07 -0800 (PST) Received: from localhost ([::1]:43738 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l6YP8-0008Ow-QB for importer@patchew.org; Mon, 01 Feb 2021 07:34:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60324) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6YLd-0004M2-Mi for qemu-devel@nongnu.org; Mon, 01 Feb 2021 07:30:30 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:53134) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l6YLW-0003cj-7q for qemu-devel@nongnu.org; Mon, 01 Feb 2021 07:30:28 -0500 Received: by mail-wm1-x330.google.com with SMTP id o5so2847348wmq.2 for ; Mon, 01 Feb 2021 04:30:20 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q6sm20466278wmj.32.2021.02.01.04.30.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 04:30:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uHDOPARSpjV/tDsSIA6xCo+KUD0YSwaTbi1mbLNgF8E=; b=jKdlu11IPuckU/0YRicenJ4UdNCj6AlNvysHT0xUyRVPUrckLu6qZBM/f3o/ystuhg /wgu2l/8Ue99WeHqHppaA6jWjQGbJAKyglsU72FLNK3SsqHgq9e4gGC2tbLfB7O7JArK 3dSK+LC+VBE4vZ5Ir09kZUcqhSkinAHtuq0QXUBqhhQgQyGoB2RQ80lEEGW/1aAmuwuP E1Wz+Yyq2nqnj9qvB+GjlF3qlSLjP19hCPH9i23xs1CjpouhdqJ7PJjwgYpUYfhXR5TU ByvVCXm/2IcFFW6P8+nUaJG6lhnSKW4UwapcXfMgaNk2/qvXFijgqCDQgbN081eFdSMN 3fdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uHDOPARSpjV/tDsSIA6xCo+KUD0YSwaTbi1mbLNgF8E=; b=iMpEEMcB5G790bjP+SRTyYuaU3VYbyClDBJDr+/evqOonzExOErznkNhupzOUyAK3B 3dckSgIyG7kVxmy87WSYl5kXNWEzRY+Vj1rjihejh/CelFIrABpSLFafvxoahxLe8EGj pDq8il7gOxyctymuETd9SYbiLzL7GDc4s2vCitrT69ahY3lCgh7fWyoDcwPFP1ZiTJtq OyPvUXu5zfJGligd1PHqJkEKF3Os1pkPPRT3BuvHD9XQivUNAAz1ikpqe0kit+zzxqEa Vmy3o1VFspGWQi2pqSreU7v4oFJ3R7RDwr4E6/S3mKrTCWbow4Eo3IcM54rtMBhXJdcN fZ8A== X-Gm-Message-State: AOAM533Dkr6uN8+7nPt299XXKmvWjphZzSgU7osOLGj1eN41OZw3uy0x 8Nj40OwhKz8j9V5iYcy5EXTefg== X-Google-Smtp-Source: ABdhPJwWnP/1BY+8Ok7Gc9JvXPOWynNIbtcgiJ8SM7ZpzHgrufMFR/p5U/KwyxShi2oqmKbqMuovUA== X-Received: by 2002:a1c:27c3:: with SMTP id n186mr14872555wmn.96.1612182619771; Mon, 01 Feb 2021 04:30:19 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [RFC 3/4] clock: Add clock_ns_to_ticks() function Date: Mon, 1 Feb 2021 12:30:12 +0000 Message-Id: <20210201123013.32308-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210201123013.32308-1-peter.maydell@linaro.org> References: <20210201123013.32308-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Havard Skinnemoen , Tyrone Ting Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add a clock_ns_to_ticks() function which does the opposite of clock_ticks_to_ns(): given a duration in nanoseconds, it returns the number of clock ticks that would happen in that time. This is useful for devices that have a free running counter register whose value can be calculated when it is read. Signed-off-by: Peter Maydell --- I have made the overflow behaviour here be "wrap", with justification as per the comment; but I'm not 100% set on this. --- docs/devel/clocks.rst | 12 ++++++++++++ include/hw/clock.h | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/docs/devel/clocks.rst b/docs/devel/clocks.rst index dea63742fb0..84fb45bbe5f 100644 --- a/docs/devel/clocks.rst +++ b/docs/devel/clocks.rst @@ -355,6 +355,18 @@ rather than simply passing it to a QEMUTimer function = like ``timer_mod_ns()`` then you should be careful to avoid overflow in those calculations, of course.) =20 +Obtaining tick counts +--------------------- + +For calculations where you need to know the number of ticks in +a given duration, use ``clock_ns_to_ticks()``. This function handles +possible non-whole-number-of-nanoseconds periods and avoids +potential rounding errors. It will return '0' if the clock is stopped +(i.e. it has period zero). If the inputs imply a tick count that +overflows a 64-bit value (a very long duration for a clock with a +very short period) the output value is truncated, so effectively +the 64-bit output wraps around. + Changing a clock period ----------------------- =20 diff --git a/include/hw/clock.h b/include/hw/clock.h index 7d0eb286faa..e3545eda439 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -277,6 +277,47 @@ static inline uint64_t clock_ticks_to_ns(const Clock *= clk, uint64_t ticks) return ns_low >> 32 | ns_high << 32; } =20 +/** + * clock_ns_to_ticks: + * @clk: the clock to query + * @ns: duration in nanoseconds + * + * Returns the number of ticks this clock would make in the given + * number of nanoseconds. Because a clock can have a period which + * is not a whole number of nanoseconds, it is important to use this + * function rather than attempting to obtain a "period in nanoseconds" + * value and then dividing the duration by that value. + * + * If the clock is stopped (ie it has period zero), returns 0. + * + * For some inputs the result could overflow a 64-bit value (because + * the clock's period is short and the duration is long). In these + * cases we truncate the result to a 64-bit value. This is on the + * assumption that generally the result is going to be used to report + * a 32-bit or 64-bit guest register value, so wrapping either cannot + * happen or is the desired behaviour. + */ +static inline uint64_t clock_ns_to_ticks(const Clock *clk, uint64_t ns) +{ + /* + * ticks =3D duration_in_ns / period_in_ns + * =3D ns / (period / 2^32) + * =3D (ns * 2^32) / period + * The hi, lo inputs to divu128() are (ns << 32) as a 128 bit value. + */ + uint64_t lo =3D ns << 32; + uint64_t hi =3D ns >> 32; + if (clk->period =3D=3D 0) { + return 0; + } + /* + * Ignore divu128() return value as we've caught div-by-zero and don't + * need different behaviour for overflow. + */ + divu128(&lo, &hi, clk->period); + return lo; +} + /** * clock_is_enabled: * @clk: a clock --=20 2.20.1 From nobody Tue May 21 18:12:15 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1612184141; cv=none; d=zohomail.com; s=zohoarc; b=fdpscQOy2Rt9oEg9q1FAvjI65B/mMrSE5Ec2boa1uO/xyGxthjj3ShWXiXQv4BpbesyyFB1DVs3KGSwVcNxIl+4NRiV27r7j2nxcGuXXpL8eGPsh5KCnAMAWh5/+EkRkkjUQe/tVab8m6kWq5UG7cEG3UcPpQWe4yw4wo4NNSxc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1612184141; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=YY2dYLpzPEZmUMsd2DlotMogla3jfIXn2uLwFzQxh4I=; b=jl1SeBctrwDJQJgwwzDuMi1hBYRwMz0StwgMtgGYvG5e5dmiEb3GReaYvcInOZ78bz/i+qCYrKe0m+SVZpmbBdGXCqZYoq5G831c7KhflOC3uycSqSFbvN+QMa+yrOLpCsFTPEErHDoNdwyMRiY8stM1A83pcXu6UcqdhM7PNAI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1612184141298367.1261818811836; Mon, 1 Feb 2021 04:55:41 -0800 (PST) Received: from localhost ([::1]:38178 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l6YN0-00061N-Rc for importer@patchew.org; Mon, 01 Feb 2021 07:31:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60326) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6YLd-0004MM-VS for qemu-devel@nongnu.org; Mon, 01 Feb 2021 07:30:30 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:37474) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l6YLW-0003dP-73 for qemu-devel@nongnu.org; Mon, 01 Feb 2021 07:30:29 -0500 Received: by mail-wr1-x432.google.com with SMTP id v15so16405359wrx.4 for ; Mon, 01 Feb 2021 04:30:21 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q6sm20466278wmj.32.2021.02.01.04.30.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 04:30:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YY2dYLpzPEZmUMsd2DlotMogla3jfIXn2uLwFzQxh4I=; b=Ke/wabyfdY9Op8KEqeGTif09hpEOu4FJrjF8lF4qstEFGR+lZd85j1sV00YcqdiavD Bj/YsJgcNUoKsrynIOZgAdWAYISf3JH4LriNRowp2+jsEGwxZ4KyXGKwQkc2bCZGJ4m5 mXaViPNaSWmv+vLc2kNe+sH90qp0piioN9kyzZPoawi3BZEhDzppIDcIH6QlQuTQ5NsH 3Y8kSTBAEAG88YBAFP+1mU7eVjXDM4dSjrHtqLkEGS+AHOuI0tlTaycvP9ydYAV30iDZ yGXHsnZzNeE2xaNU3n8/2sK4F6QHWYgiErrxaoa2ym70ZNM2J3+A5grdrlmrnCTBIcYm J1Ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YY2dYLpzPEZmUMsd2DlotMogla3jfIXn2uLwFzQxh4I=; b=fJ0uZI+2FhQUdgXO6n1htCLSQ3q65tZ7pP2MalOCLqjwS4kD00T7oK0D+qmsIEk3gy JheOYP98vc/Ct2eneGEZaVjyXsd3oqSGooajBt44JDSUXVLGYQMP5RbIp26Xt3hi0Omf VK2eIwFwJ/NwPEaHuBBa2aTghnjOEtBMmCyAU82na3vfwv2/KXQSMqHFzWZlD1kfpUIb Vm3T83XFB1Mqzr/hdC9g1XgCG/MXhMdt2MXjtzOGOLimOQgY+XRXnTnc/pS5Y2BIujuE WZ91j6TQtPVtwNnxt7qa1USVB1BDsq71rGOgj8wHowZTl5s/a18XwAUtO9xMbskCY71O 1Jvw== X-Gm-Message-State: AOAM530xgAQMMy47jbJAvoSQUw7KaoXfh4bOZzZCOrbXTqMaiOnuiwSZ Sf2JDny2RYVjfQ6dYJjA/vPySw== X-Google-Smtp-Source: ABdhPJwuIwfxofd+MhKT7IpFQmPtDR1elUHBzPnPuc+EFIdZM80Z0jyRujStgpciLksdvCKbbyQp1w== X-Received: by 2002:a5d:6947:: with SMTP id r7mr17792852wrw.150.1612182620832; Mon, 01 Feb 2021 04:30:20 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [RFC 4/4] hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() Date: Mon, 1 Feb 2021 12:30:13 +0000 Message-Id: <20210201123013.32308-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210201123013.32308-1-peter.maydell@linaro.org> References: <20210201123013.32308-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel , Havard Skinnemoen , Tyrone Ting Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Use the new clock_ns_to_ticks() function in npcm7xx_timer where appropriate. Signed-off-by: Peter Maydell --- hw/timer/npcm7xx_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/timer/npcm7xx_timer.c b/hw/timer/npcm7xx_timer.c index 36e2c07db26..fc48d494151 100644 --- a/hw/timer/npcm7xx_timer.c +++ b/hw/timer/npcm7xx_timer.c @@ -138,8 +138,8 @@ static int64_t npcm7xx_timer_count_to_ns(NPCM7xxTimer *= t, uint32_t count) /* Convert a time interval in nanoseconds to a timer cycle count. */ static uint32_t npcm7xx_timer_ns_to_count(NPCM7xxTimer *t, int64_t ns) { - return ns / clock_ticks_to_ns(t->ctrl->clock, - npcm7xx_tcsr_prescaler(t->tcsr)); + return clock_ns_to_ticks(t->ctrl->clock, ns) / + npcm7xx_tcsr_prescaler(t->tcsr); } =20 static uint32_t npcm7xx_watchdog_timer_prescaler(const NPCM7xxWatchdogTime= r *t) --=20 2.20.1