From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834577; cv=none; d=zohomail.com; s=zohoarc; b=KWmCQzBIrNOBe9MA2Rl++BdpFfqaNLs5bgf0GvTkWlnonCeEkDRtms0nYcWyVtLmFHgX38X34exEV5HXsl4j2eqIymIQQaNZjbJkTNRqypUAy7QI943H3a+XpDY0e6ELECeuTNUEjIn4zTv+BoY8hKWUh5d+5aBHrQiR9ei6smo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834577; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=XY5Jo/ZT5buRijDwijPJpiWYvfGhsBqb0McwKxae44A=; b=oFCDoVq2LXjqyRIhXxLmHXW19pDA3iBW4dcVAdIC9ZXioZAMoVRL3eZoNHg1252Cr6gkundjF6XEPZwmB1roiMNESHouJJb9AjRXKv11i+3WQ71Xu/qXjL9LReFtIkOW1FxG89tWlkJbVOvlFok1HwcgL8Nkw1Xub+rBrlsESZQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834577620340.3132209567244; Thu, 28 Jan 2021 03:49:37 -0800 (PST) Received: from localhost ([::1]:53696 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55ns-0002Yl-8r for importer@patchew.org; Thu, 28 Jan 2021 06:49:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33468) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gT-00018m-Qf for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:59 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:54488) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gM-00064v-SR for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:57 -0500 Received: by mail-wm1-x330.google.com with SMTP id u14so4042422wml.4 for ; Thu, 28 Jan 2021 03:41:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XY5Jo/ZT5buRijDwijPJpiWYvfGhsBqb0McwKxae44A=; b=VB7ChyjHAXtZLxKz9QXM8zrfwXDt3JjBoVecDU1V96TuMJBKUZHFDp/L7Qq+v0cwCJ JDlWUl8iWpGr3oNEAvIftDpLi4X+Ulc1l8s/vtPU+IIPyXAUxoq6N/xbQ49CtAzLDjr4 etR0kjNZJFQMR2q/FsXtJER1YnQOOQFjhZ9WIOn9slsGAfv4ULVIgXGJfP201KMpa2Df aBXgqZDPlQxC3xh+HgzYoXUm8u54F8n+5bRfu0oi6hR4qISk8bE6c+aChJAvKc+58dYj sBXNfqEqlrDbzvEUEo1Ktem6zRixqqCty/8+O/m54hGBqpJRXoEZ90+cFDRk2DTD2XSK 9c1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XY5Jo/ZT5buRijDwijPJpiWYvfGhsBqb0McwKxae44A=; b=Qr3Guwnoa640TPAZdP+5YDh2S6zTqLnEXJ8IZdTSeQtyu7zXbuziLFh+CyqmhgiE3Q lzQ6ohNaHQ6DCafgu3HJ0rkw5udKq1wUmpyBXuGEfwnYH4/L9ku+heTAcqHiwXp2Lw2X 6UwbrDQZ/CjFABQ1pyWM5y3cH0S0OnXKoXl1WHaQgS3m/tmmPRGnOtFlc7noW7tRsilF ZVHqTMnSsWLL3+KXOXXSNNqerSvtXNHQLaFCk3DK7y0Ba1G82uq7RCNFYB3K1M71/QfI a2aZL6r/oBYi2KHb7UIYOZXtBfvLixd35o508mj+5k//UHDicTHlZAmCWXypwL5Mx2EC ti2w== X-Gm-Message-State: AOAM533Dq11XTqAuI7IWIzWci6SzguJVkkSgpBb6Y9dx8l6NHhi62BlV mBpA371a3fyOcK0TIqBtG6BAuQ== X-Google-Smtp-Source: ABdhPJzRWcHy3OFTZMlNSOx+La/Bdq3k6RUWCVXEer/Vm6gh3RpOfv97vX0ImwLKUeh2luBMqjStRw== X-Received: by 2002:a05:600c:28b:: with SMTP id 11mr3103117wmk.69.1611834109439; Thu, 28 Jan 2021 03:41:49 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 01/25] ptimer: Add new ptimer_set_period_from_clock() function Date: Thu, 28 Jan 2021 11:41:21 +0000 Message-Id: <20210128114145.20536-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The ptimer API currently provides two methods for setting the period: ptimer_set_period(), which takes a period in nanoseconds, and ptimer_set_freq(), which takes a frequency in Hz. Neither of these lines up nicely with the Clock API, because although both the Clock and the ptimer track the frequency using a representation of whole and fractional nanoseconds, conversion via either period-in-ns or frequency-in-Hz will introduce a rounding error. Add a new function ptimer_set_period_from_clock() which takes the Clock object directly to avoid the rounding issues. This includes a facility for the user to specify that there is a frequency divider between the Clock proper and the timer, as some timer devices like the CMSDK APB dualtimer need this. To avoid having to drag in clock.h from ptimer.h we add the Clock type to typedefs.h. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20210121190622.22000-2-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/ptimer.h | 22 ++++++++++++++++++++++ include/qemu/typedefs.h | 1 + hw/core/ptimer.c | 34 ++++++++++++++++++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h index 412763fffb2..c443218475b 100644 --- a/include/hw/ptimer.h +++ b/include/hw/ptimer.h @@ -165,6 +165,28 @@ void ptimer_transaction_commit(ptimer_state *s); */ void ptimer_set_period(ptimer_state *s, int64_t period); =20 +/** + * ptimer_set_period_from_clock - Set counter increment from a Clock + * @s: ptimer to configure + * @clk: pointer to Clock object to take period from + * @divisor: value to scale the clock frequency down by + * + * If the ptimer is being driven from a Clock, this is the preferred + * way to tell the ptimer about the period, because it avoids any + * possible rounding errors that might happen if the internal + * representation of the Clock period was converted to either a period + * in ns or a frequency in Hz. + * + * If the ptimer should run at the same frequency as the clock, + * pass 1 as the @divisor; if the ptimer should run at half the + * frequency, pass 2, and so on. + * + * This function will assert if it is called outside a + * ptimer_transaction_begin/commit block. + */ +void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clock, + unsigned int divisor); + /** * ptimer_set_freq - Set counter frequency in Hz * @s: ptimer to configure diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index 976b529dfb5..68deb74ef6f 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -34,6 +34,7 @@ typedef struct BlockDriverState BlockDriverState; typedef struct BusClass BusClass; typedef struct BusState BusState; typedef struct Chardev Chardev; +typedef struct Clock Clock; typedef struct CompatProperty CompatProperty; typedef struct CoMutex CoMutex; typedef struct CPUAddressSpace CPUAddressSpace; diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c index 2aa97cb665c..6ba19fd9658 100644 --- a/hw/core/ptimer.c +++ b/hw/core/ptimer.c @@ -15,6 +15,7 @@ #include "sysemu/qtest.h" #include "block/aio.h" #include "sysemu/cpus.h" +#include "hw/clock.h" =20 #define DELTA_ADJUST 1 #define DELTA_NO_ADJUST -1 @@ -348,6 +349,39 @@ void ptimer_set_period(ptimer_state *s, int64_t period) } } =20 +/* Set counter increment interval from a Clock */ +void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clk, + unsigned int divisor) +{ + /* + * The raw clock period is a 64-bit value in units of 2^-32 ns; + * put another way it's a 32.32 fixed-point ns value. Our internal + * representation of the period is 64.32 fixed point ns, so + * the conversion is simple. + */ + uint64_t raw_period =3D clock_get(clk); + uint64_t period_frac; + + assert(s->in_transaction); + s->delta =3D ptimer_get_count(s); + s->period =3D extract64(raw_period, 32, 32); + period_frac =3D extract64(raw_period, 0, 32); + /* + * divisor specifies a possible frequency divisor between the + * clock and the timer, so it is a multiplier on the period. + * We do the multiply after splitting the raw period out into + * period and frac to avoid having to do a 32*64->96 multiply. + */ + s->period *=3D divisor; + period_frac *=3D divisor; + s->period +=3D extract64(period_frac, 32, 32); + s->period_frac =3D (uint32_t)period_frac; + + if (s->enabled) { + s->need_reload =3D true; + } +} + /* Set counter frequency in Hz. */ void ptimer_set_freq(ptimer_state *s, uint32_t freq) { --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834402; cv=none; d=zohomail.com; s=zohoarc; b=RsxR8NdzY73XgegT7VZIiqQvFnAHoe1mipmIjhqF/1JXy/tf5UqxA3hunj6NbUXx3m9YFbKUbhr1nuryfdYn+zMMgxr4oxpldxuLPTcvjbLOhFy2n0ECMtsjz9PXUWjBfQv3OcWTsluvpGdfAFaYm4zQU7gen1sGKDeuL6QC/qI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834402; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=p7OK2Ltq3LcHT8jmiWMB0NuP9bP3FPom3Sa8lyw278I=; b=YbBBrThcPk0aTvqlQlp6cVbVzqGzTP6/dsKaBf/W3qxpLGmRSc17T6+RrUOPeoMrY5S2Wyz2JnAmy+7295Ez7ENgF6Wcm8Lj98BcKZ/4ezoQrNUZyaqNUi7bizJPX6RRjJpZ4b4WD8MnIAl6qX7RwB1F8UWo0Kl6OqFQY29Dh9w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834402097910.8561533395788; Thu, 28 Jan 2021 03:46:42 -0800 (PST) Received: from localhost ([::1]:42868 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55l2-0006Yp-Sn for importer@patchew.org; Thu, 28 Jan 2021 06:46:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33458) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gT-00018l-Ie for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:59 -0500 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:33203) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gO-000659-Fv for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:57 -0500 Received: by mail-wr1-x436.google.com with SMTP id 7so5082485wrz.0 for ; Thu, 28 Jan 2021 03:41:51 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p7OK2Ltq3LcHT8jmiWMB0NuP9bP3FPom3Sa8lyw278I=; b=gCGquRP0Tq7iLV2+thH/SHMnbU0DmXPsCQFJBliQwiegVnuo+8SgdBKCRXffaVjgUz fguVSICbaKxF8x9apRR8SalcuuPmJGz1+mXPpyptKYSbKDx1IfNVghD1Yadia5WuM+6Q qzbRex3U8lZCMrU53+eeRKP+NpL2IrxVznCYpKsQE4a/pV97wVhU2MFbWS8RWGaPN/6K 4cuQOaGiVgadLm+z+y7BN51sV87w0Ok5ggMNdWZNRSpz7Cdvmd2ROGGmFkH8dI+m255a 9zs0/Wg6gu2EdT2qDW4hVwVpW+cHWU+hERhlwl85nlxJ7CGP2ptsJ/IhnRh2WacIFCPB kP7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p7OK2Ltq3LcHT8jmiWMB0NuP9bP3FPom3Sa8lyw278I=; b=PNy0QSfFd8b9o6jEuoQHSbc/8MbhXrzxjAHhSJx+m2prIeGz07T5/llojqpVx1xycM f1fR3MTY3T5Zua0npmwE/H8FXUpDNEQ+wUuNCG6Nah+0Ul8BjumFO1fG9tXeWSwmamp5 NJV+0LoAWduhspKVVRim1qB1FHto1Tzga6cq0CXUP82QG/ZYewMacqAYP8VQ7RVw6psw nc4aelXzeG9ITekM/437eBhJmTBFh8AfNZlugNL1olj9xSVR1netwzwwd3/KOu+EoNQM qYIssc0eysTGqw8vZhCkYoFIiZBnO8vPuozLotlAJ9Vt/uL8TXYNyshWsNp/fxwVHar9 30BQ== X-Gm-Message-State: AOAM533RQ2QAQ8OAZufGYIGSVA/dI8YTeYQQSQYuiVfPsorZOVl0ya7P uXwbUev9uf6XHJuMrDLzCbFhnA== X-Google-Smtp-Source: ABdhPJy6oNQQQxS14IMy81JnTrzMLx0/UDgWLRdLNX/PGAsU1++7AzHVtmObWtn1mrQkQvatsgf06A== X-Received: by 2002:a05:6000:1547:: with SMTP id 7mr15910116wry.301.1611834110398; Thu, 28 Jan 2021 03:41:50 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 02/25] clock: Add new clock_has_source() function Date: Thu, 28 Jan 2021 11:41:22 +0000 Message-Id: <20210128114145.20536-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Add a function for checking whether a clock has a source. This is useful for devices which have input clocks that must be wired up by the board as it allows them to fail in realize rather than ploughing on with a zero-period clock. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20210121190622.22000-3-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- docs/devel/clocks.rst | 16 ++++++++++++++++ include/hw/clock.h | 15 +++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/docs/devel/clocks.rst b/docs/devel/clocks.rst index 2548d842322..c54bbb82409 100644 --- a/docs/devel/clocks.rst +++ b/docs/devel/clocks.rst @@ -235,6 +235,22 @@ object during device instance init. For example: /* set initial value to 10ns / 100MHz */ clock_set_ns(clk, 10); =20 +To enforce that the clock is wired up by the board code, you can +call ``clock_has_source()`` in your device's realize method: + +.. code-block:: c + + if (!clock_has_source(s->clk)) { + error_setg(errp, "MyDevice: clk input must be connected"); + return; + } + +Note that this only checks that the clock has been wired up; it is +still possible that the output clock connected to it is disabled +or has not yet been configured, in which case the period will be +zero. You should use the clock callback to find out when the clock +period changes. + Fetching clock frequency/period ------------------------------- =20 diff --git a/include/hw/clock.h b/include/hw/clock.h index 6382f346569..e5f45e2626d 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -139,6 +139,21 @@ void clock_clear_callback(Clock *clk); */ void clock_set_source(Clock *clk, Clock *src); =20 +/** + * clock_has_source: + * @clk: the clock + * + * Returns true if the clock has a source clock connected to it. + * This is useful for devices which have input clocks which must + * be connected by the board/SoC code which creates them. The + * device code can use this to check in its realize method that + * the clock has been connected. + */ +static inline bool clock_has_source(const Clock *clk) +{ + return clk->source !=3D NULL; +} + /** * clock_set: * @clk: the clock to initialize. --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834231; cv=none; d=zohomail.com; s=zohoarc; b=ELt4felZXTLPUX8ibWiNSQFGEvMYrabnmI85VmfUemWg3oAdmajU6SYa2UvH2lgdRFHpas7YbB3Ict9rbxuWAcw2ppFuEjm5zsiilOcyF1WEINx6yCwJnHu7+qY3pzRY66nDqrXadWEvMk4rY8b5FEsbYb1RwuIFY7n22oa8BNA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834231; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5Rp4YOjE1gcv04Ecoqqv1uDwHaV4/xeO6+AU9Z5cIK8=; b=CUC4TT30AxMYt3W21jRf5HDo94erDBczd0K79ciUWJUiUVfwQU3JMhpsdO0aKlR/lke9CM6dqyNJj3By4KlZLYrfxkh/W0T4gEKtmEeix8cysZi0dytEEkmeOCSwI6ztHCq9CR4M/+RMGQnOsinTBEXbnry8TsD6XODfROBmk1s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834231115539.8318619673656; Thu, 28 Jan 2021 03:43:51 -0800 (PST) Received: from localhost ([::1]:35302 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55iI-0003SD-4i for importer@patchew.org; Thu, 28 Jan 2021 06:43:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33516) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gV-00019C-Eh for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:59 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]:37084) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gO-000663-JA for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:59 -0500 Received: by mail-wr1-x431.google.com with SMTP id v15so5075579wrx.4 for ; Thu, 28 Jan 2021 03:41:52 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5Rp4YOjE1gcv04Ecoqqv1uDwHaV4/xeO6+AU9Z5cIK8=; b=qgGwCvDyOBuBYSwXrb0TpopTCYOR8WonUDAj5iLrHy49Tk9m6yB+rbYPrmCsemxJWR eITAFuxGsGn1/IYlcWGhUBMBLEBqz0Hak0ser/l/hpeiTZZcCy6e+NIOfTUqABp7VUBV MzQeuVokkm5zkGSV7KuV47WpvGaKo/LT+7y44gCzAE2ICZKYpx4LSjuUCBg3hRtV/rhL fwBkbehmty+RTOH41eVyjOi9BMOcdOizedaLbqfSDuE2rfmVbReVPqUmMu8W8WQTHEcI RRES/f2HeIjZv8plY0rtrjG6ChI1Exz/xdSRRTarHrSiZ+4hZXDux46iOvUfDjl7/ca9 UhEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5Rp4YOjE1gcv04Ecoqqv1uDwHaV4/xeO6+AU9Z5cIK8=; b=VKgYp3YZ3nOlvG5iGGjqncxllPGoMm+ATTdA11FrpRwGwzcQxa+PO2z1hUIUY0KzT0 4Epkxvb/48negJsh0TXrLIiEsyw3e5aUID/5wVb/EfDYlhWGZy9hip5WAQ9M8MSfDTjC oGctKHTDmrYYJCM/UJC9G+uBh4Z3joWBlSeXlI2U22wdyPiqXD8FGfVBlGQRaY+elWLN navHmrsrFeKmxT9/VjrxJR7MLjlWVkIS7TcTU1WRAExKGIVxVcTWcw8CSo6vDVfDb0ZQ FIok1s/YCmrWGvpCvcYunIO0+V4vsEAw253w1hsmc98BX/NOfER41WuGGiiJxeU3b4G1 x6+A== X-Gm-Message-State: AOAM530FvXxy6yjkNfX+htqdKEkuWvf6fa8ZMbTjsoEc5arF51r4Tk/w 5yYdSK1zR/AJXv3yUe5Uf6TrWQ== X-Google-Smtp-Source: ABdhPJzC6LiKFB8iB2FcNoeKkiWZV2Q15E3h/Jnh3gPGRYVnSZbX65+ttSRSdyot2JDOwjaUlAfBRQ== X-Received: by 2002:adf:f452:: with SMTP id f18mr15394336wrp.11.1611834111278; Thu, 28 Jan 2021 03:41:51 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 03/25] tests: Add a simple test of the CMSDK APB timer Date: Thu, 28 Jan 2021 11:41:23 +0000 Message-Id: <20210128114145.20536-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Add a simple test of the CMSDK APB timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-4-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- v1->v2 changes: - phrase various clock_step() arguments as calculations based on tick counts and the ns-per-tick value rather than just the final numbers - remove set-but-not-used QTestState *s variable that gcc warns about but clang does not --- tests/qtest/cmsdk-apb-timer-test.c | 75 ++++++++++++++++++++++++++++++ MAINTAINERS | 1 + tests/qtest/meson.build | 1 + 3 files changed, 77 insertions(+) create mode 100644 tests/qtest/cmsdk-apb-timer-test.c diff --git a/tests/qtest/cmsdk-apb-timer-test.c b/tests/qtest/cmsdk-apb-tim= er-test.c new file mode 100644 index 00000000000..e85e1f7448e --- /dev/null +++ b/tests/qtest/cmsdk-apb-timer-test.c @@ -0,0 +1,75 @@ +/* + * QTest testcase for the CMSDK APB timer device + * + * Copyright (c) 2021 Linaro Limited + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "libqtest-single.h" + +/* IoTKit/ARMSSE-200 timer0; driven at 25MHz in mps2-an385, so 40ns per ti= ck */ +#define TIMER_BASE 0x40000000 + +#define CTRL 0 +#define VALUE 4 +#define RELOAD 8 +#define INTSTATUS 0xc + +static void test_timer(void) +{ + g_assert_true(readl(TIMER_BASE + INTSTATUS) =3D=3D 0); + + /* Start timer: will fire after 40 * 1000 =3D=3D 40000 ns */ + writel(TIMER_BASE + RELOAD, 1000); + writel(TIMER_BASE + CTRL, 9); + + /* Step to just past the 500th tick and check VALUE */ + clock_step(40 * 500 + 1); + g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), =3D=3D, 0); + g_assert_cmpuint(readl(TIMER_BASE + VALUE), =3D=3D, 500); + + /* Just past the 1000th tick: timer should have fired */ + clock_step(40 * 500); + g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), =3D=3D, 1); + g_assert_cmpuint(readl(TIMER_BASE + VALUE), =3D=3D, 0); + + /* VALUE reloads at the following tick */ + clock_step(40); + g_assert_cmpuint(readl(TIMER_BASE + VALUE), =3D=3D, 1000); + + /* Check write-1-to-clear behaviour of INTSTATUS */ + writel(TIMER_BASE + INTSTATUS, 0); + g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), =3D=3D, 1); + writel(TIMER_BASE + INTSTATUS, 1); + g_assert_cmpuint(readl(TIMER_BASE + INTSTATUS), =3D=3D, 0); + + /* Turn off the timer */ + writel(TIMER_BASE + CTRL, 0); +} + +int main(int argc, char **argv) +{ + int r; + + g_test_init(&argc, &argv, NULL); + + qtest_start("-machine mps2-an385"); + + qtest_add_func("/cmsdk-apb-timer/timer", test_timer); + + r =3D g_test_run(); + + qtest_end(); + + return r; +} diff --git a/MAINTAINERS b/MAINTAINERS index 34359a99b8e..6c15f7db317 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -581,6 +581,7 @@ F: include/hw/rtc/pl031.h F: include/hw/arm/primecell.h F: hw/timer/cmsdk-apb-timer.c F: include/hw/timer/cmsdk-apb-timer.h +F: tests/qtest/cmsdk-apb-timer-test.c F: hw/timer/cmsdk-apb-dualtimer.c F: include/hw/timer/cmsdk-apb-dualtimer.h F: hw/char/cmsdk-apb-uart.c diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 16d04625b8b..74addd74868 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -141,6 +141,7 @@ qtests_npcm7xx =3D \ 'npcm7xx_timer-test', 'npcm7xx_watchdog_timer-test'] qtests_arm =3D \ + (config_all_devices.has_key('CONFIG_CMSDK_APB_TIMER') ? ['cmsdk-apb-time= r-test'] : []) + \ (config_all_devices.has_key('CONFIG_PFLASH_CFI02') ? ['pflash-cfi02-test= '] : []) + \ (config_all_devices.has_key('CONFIG_NPCM7XX') ? qtests_npcm7xx : []) + \ ['arm-cpu-features', --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834702; cv=none; d=zohomail.com; s=zohoarc; b=Lgk1jvIkPW0vN65IAdMMJdRmxwg9esgN9MC15KdCObuqgH8MxxkiCpTi7l3hHUXKlkAXq1kn6Cmst4NYrUGkOBNBCsKVyZX8RDl4sPB66XvuRB8PLrIDhfDBD9P7FzW5I2MaOmLQicq9wkGR//72P3Sf3JVYqSUzMYPSm6pQFYo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834702; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xHWq9yH9LoFSUmKAgq76pgTL0JY1lWeKpFcupzRjAI4=; b=BAlshxk96DN5VVHlKCNSDZbA+92sVF4DMarF3uLuRLhydIZA0WE6AZ0ho23CLZmTYlZIvXV4i1a9ZmkyxHdYVWfNDzsmNnqVOO94D7y/PQAniVCyVB7MJnBKphWE9gjpPl8OesPK+n/AaiZ7ntPZMKyxcty9haCVu2V/agLVTMI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834702740647.2905420988807; Thu, 28 Jan 2021 03:51:42 -0800 (PST) Received: from localhost ([::1]:34128 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55pt-00063k-H2 for importer@patchew.org; Thu, 28 Jan 2021 06:51:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gV-00019N-J4 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:59 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:33138) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gQ-00066N-V1 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:41:59 -0500 Received: by mail-wm1-x333.google.com with SMTP id s24so4982961wmj.0 for ; Thu, 28 Jan 2021 03:41:53 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xHWq9yH9LoFSUmKAgq76pgTL0JY1lWeKpFcupzRjAI4=; b=wW3X6RlvpbSjFvjthZf79H4Yh4JODHixoCCBdBDNa00vko+4W9xDc/ct9G3eV4ffwE 293ioufXEOSj8uC1k/kWkK8xPW/OoCto7IoiT/tACM8/24NQDP636WajW5FSe2cWl82A 1He1iPeqOFCirC0C2fn8x/Iy39BWTbfsymdZoCtz9reoEivCryCX/BqJN57EH2qhIZZT Z2GkS5yCRIqAJREUrPsEPmVoMhq23ztYURerHBK6eGOFYs5UeqsH2C44dNFZRfZ0QQwC uqQoV5GqoE7tjp19Tunj2PYLSq4eA9qCT4A6Ty7vXwdACUJjDcFaPPP5DSlaNe0hgx6c OguA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xHWq9yH9LoFSUmKAgq76pgTL0JY1lWeKpFcupzRjAI4=; b=hMVOXIXx0iY2L1bAyoMRXL0pU1oSSvu6ugISymcCHcjV0AxDptp5vRZ/2upjtEBCS0 8NcRSfjmswahz74YuCQPD/nyFv6kJZTwmBwzThVNCbroeMhnaA88UsSLpbu9OFYf4ql5 YSWQkpR33vJ/PvHOQoHnh2Wa5m+F+HG/6BsdoJI9RYfx/Sncz0QOFXoqzWC3PVEByBj3 zIoUS1StKF+oTkJenq3jV23zhVYOcvsJ/fogTHn2kLZJL3XK6xpeSZwly4QvfGCfAk5k Nr6aIdect2MOUVj3wg4hr/NNiShyd+dfFla92dYJJuOZRHtQ5oVXWnVbHs6XAqlIod8h Lj3A== X-Gm-Message-State: AOAM530j/QFXePDBuJNDDVU2gsKqh9p+M1dXHwvV44kIcI1Tb4AEQoU+ u+A5mGvn/AapXrzjdRTY+OVO5w== X-Google-Smtp-Source: ABdhPJwmQNQF/xojWT0/j+yN41UZ7sTYg7Rz0Y+yiOxSpWx2nTc6m7B1QtwHOM8AScfCe+IxMJCq9w== X-Received: by 2002:a1c:e1d4:: with SMTP id y203mr8375856wmg.50.1611834112248; Thu, 28 Jan 2021 03:41:52 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 04/25] tests: Add a simple test of the CMSDK APB watchdog Date: Thu, 28 Jan 2021 11:41:24 +0000 Message-Id: <20210128114145.20536-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Add a simple test of the CMSDK watchdog, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20210121190622.22000-5-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- v1->v2 changes: - remove set-but-not-used QTestState *s variable --- tests/qtest/cmsdk-apb-watchdog-test.c | 79 +++++++++++++++++++++++++++ MAINTAINERS | 1 + tests/qtest/meson.build | 1 + 3 files changed, 81 insertions(+) create mode 100644 tests/qtest/cmsdk-apb-watchdog-test.c diff --git a/tests/qtest/cmsdk-apb-watchdog-test.c b/tests/qtest/cmsdk-apb-= watchdog-test.c new file mode 100644 index 00000000000..950f64c527b --- /dev/null +++ b/tests/qtest/cmsdk-apb-watchdog-test.c @@ -0,0 +1,79 @@ +/* + * QTest testcase for the CMSDK APB watchdog device + * + * Copyright (c) 2021 Linaro Limited + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "libqtest-single.h" + +/* + * lm3s811evb watchdog; at board startup this runs at 200MHz / 16 =3D=3D 1= 2.5MHz, + * which is 80ns per tick. + */ +#define WDOG_BASE 0x40000000 + +#define WDOGLOAD 0 +#define WDOGVALUE 4 +#define WDOGCONTROL 8 +#define WDOGINTCLR 0xc +#define WDOGRIS 0x10 +#define WDOGMIS 0x14 +#define WDOGLOCK 0xc00 + +static void test_watchdog(void) +{ + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); + + writel(WDOG_BASE + WDOGCONTROL, 1); + writel(WDOG_BASE + WDOGLOAD, 1000); + + /* Step to just past the 500th tick */ + clock_step(500 * 80 + 1); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 500); + + /* Just past the 1000th tick: timer should have fired */ + clock_step(500 * 80); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 1); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 0); + + /* VALUE reloads at following tick */ + clock_step(80); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 1000); + + /* Writing any value to WDOGINTCLR clears the interrupt and reloads */ + clock_step(500 * 80); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 500); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 1); + writel(WDOG_BASE + WDOGINTCLR, 0); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 1000); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); +} + +int main(int argc, char **argv) +{ + int r; + + g_test_init(&argc, &argv, NULL); + + qtest_start("-machine lm3s811evb"); + + qtest_add_func("/cmsdk-apb-watchdog/watchdog", test_watchdog); + + r =3D g_test_run(); + + qtest_end(); + + return r; +} diff --git a/MAINTAINERS b/MAINTAINERS index 6c15f7db317..3729b89f359 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -588,6 +588,7 @@ F: hw/char/cmsdk-apb-uart.c F: include/hw/char/cmsdk-apb-uart.h F: hw/watchdog/cmsdk-apb-watchdog.c F: include/hw/watchdog/cmsdk-apb-watchdog.h +F: tests/qtest/cmsdk-apb-watchdog-test.c F: hw/misc/tz-ppc.c F: include/hw/misc/tz-ppc.h F: hw/misc/tz-mpc.c diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 74addd74868..9e2ebc47041 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -142,6 +142,7 @@ qtests_npcm7xx =3D \ 'npcm7xx_watchdog_timer-test'] qtests_arm =3D \ (config_all_devices.has_key('CONFIG_CMSDK_APB_TIMER') ? ['cmsdk-apb-time= r-test'] : []) + \ + (config_all_devices.has_key('CONFIG_CMSDK_APB_WATCHDOG') ? ['cmsdk-apb-w= atchdog-test'] : []) + \ (config_all_devices.has_key('CONFIG_PFLASH_CFI02') ? ['pflash-cfi02-test= '] : []) + \ (config_all_devices.has_key('CONFIG_NPCM7XX') ? qtests_npcm7xx : []) + \ ['arm-cpu-features', --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834298; cv=none; d=zohomail.com; s=zohoarc; b=Zx1xsMUjcR8GDfe4pF4yO9GnMqvExg9XDZRSsdtZwZxvYuVl1Fg7YPMabVkhRd1jgcm3o+YcSJKHqoHie/0R3GHH/ihUReWrzairgUURSFNv4OV5BaeRNEomxSFM6TDy87DFX/MB3cOg0w6UcGk9nKejWxzsFCG7GqARfOPxsXg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834298; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mIaFFwYWu88wzMmbyHFa8Xtc/F0W8Il5bCeA2Q8j4zA=; b=Qsk032eqkFYyVZ67pSbRCid1RpgOKI3ci4XvEpgaUIQVNEvr3moLmwwNdjeglr3FrwJhGjrvyFCEdy8TpsvI+wYk9Gk4TmSlxiCotZYrOcOs+4eXvxZ98n0ki4WOcCtYpw263auTLgpmYvvnW/KusD1LgorlPPhvHFbSOdoySC8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834298698125.23184885283683; Thu, 28 Jan 2021 03:44:58 -0800 (PST) Received: from localhost ([::1]:38964 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55jN-0004vW-IX for importer@patchew.org; Thu, 28 Jan 2021 06:44:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gY-0001Gg-Rd for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:02 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:33198) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gQ-00066c-W4 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:02 -0500 Received: by mail-wr1-x430.google.com with SMTP id 7so5082625wrz.0 for ; Thu, 28 Jan 2021 03:41:54 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mIaFFwYWu88wzMmbyHFa8Xtc/F0W8Il5bCeA2Q8j4zA=; b=wXW+7aeri3aliDQPdm1oH5+nD5oSuJ8Jko6uCIgTwcWOBNbtTlFoqvhqqTWsmNqC54 VU5ev76NieFgExEH0RlANm1GB4vFWbXq15FDlTTIuR8q7KY0iRCP4ip4KkyN0Ydp52lz a4jtxJDaNN0brS7Hd6peamz+hMwSEOxLO/iPSOBLGA+R1M7xL3l62vovC42NGH13h7Hj 7DBSoz8JFPIz6uPEHtrKOSRr+aybabPNLP3M68++L9aUGs1ZkLTxLojXLpSRTD/M9mPg JxkYusianzvW30mHX6vIxfUzA9kuuVwa9+RsxMlOy1X1lqw0rYu3Hm1cngPY/gwxPQEo p3Dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mIaFFwYWu88wzMmbyHFa8Xtc/F0W8Il5bCeA2Q8j4zA=; b=dnqntSe//8VFdVwv9isT9kWiN7k/9U8YXa9N0R3G84pdDTRXsPiH/nf9Zase3CxtrU /RaPlov1Xb3ZDZNKadVkwAHeILH0AcGSX4vbiJ/Gm7ShpfQA4tVg+9Nc9Nrdth+bCeit 4vnP6bT5j4umqT5xPTnQCli5D3EtPSMjXTd/Yahm9TO4AqgnjdgMBVBUs+2CokkMaqlh GKhhQrcXZgLmn1VGiQ/DiPDwSTk+47rFnF4dURCheaOKcYeL+7+icQdOPYHuwl048E2A skVVW1BA46JqIPwUXkpCDt9VOC+utxCZWaIx5xZLH3srbBL2U95mF14NrrWr4MGzskE7 8szw== X-Gm-Message-State: AOAM530Ko7NXyvvUzsMiKzZY3n6R9QGJ9ls4KxIAYp+qxtqAav6lXwbI 00nHUih+zDVxkAQ1O5DfGAIfxQ== X-Google-Smtp-Source: ABdhPJxuoc9onqxPezWfcEbtBJKnZgAjZSEalc1a2X3Y+FQ+0ncj16uIfGIeQVEX1bvvtwBBZpqfXA== X-Received: by 2002:a5d:4391:: with SMTP id i17mr15810545wrq.57.1611834113288; Thu, 28 Jan 2021 03:41:53 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 05/25] tests: Add a simple test of the CMSDK APB dual timer Date: Thu, 28 Jan 2021 11:41:25 +0000 Message-Id: <20210128114145.20536-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Add a simple test of the CMSDK dual timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell Message-id: 20210121190622.22000-6-peter.maydell@linaro.org Reviewed-by: Luc Michel Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- v1->v2 changes: - phrase various clock_step() arguments as calculations based on tick counts and the ns-per-tick value rather than just the final numbers - remove set-but-not-used QTestState *s variable that gcc warns about but clang does not - use 40 * 256 in test_prescale() as suggested by Luc --- tests/qtest/cmsdk-apb-dualtimer-test.c | 130 +++++++++++++++++++++++++ MAINTAINERS | 1 + tests/qtest/meson.build | 1 + 3 files changed, 132 insertions(+) create mode 100644 tests/qtest/cmsdk-apb-dualtimer-test.c diff --git a/tests/qtest/cmsdk-apb-dualtimer-test.c b/tests/qtest/cmsdk-apb= -dualtimer-test.c new file mode 100644 index 00000000000..ad6a758289c --- /dev/null +++ b/tests/qtest/cmsdk-apb-dualtimer-test.c @@ -0,0 +1,130 @@ +/* + * QTest testcase for the CMSDK APB dualtimer device + * + * Copyright (c) 2021 Linaro Limited + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "libqtest-single.h" + +/* IoTKit/ARMSSE dualtimer; driven at 25MHz in mps2-an385, so 40ns per tic= k */ +#define TIMER_BASE 0x40002000 + +#define TIMER1LOAD 0 +#define TIMER1VALUE 4 +#define TIMER1CONTROL 8 +#define TIMER1INTCLR 0xc +#define TIMER1RIS 0x10 +#define TIMER1MIS 0x14 +#define TIMER1BGLOAD 0x18 + +#define TIMER2LOAD 0x20 +#define TIMER2VALUE 0x24 +#define TIMER2CONTROL 0x28 +#define TIMER2INTCLR 0x2c +#define TIMER2RIS 0x30 +#define TIMER2MIS 0x34 +#define TIMER2BGLOAD 0x38 + +#define CTRL_ENABLE (1 << 7) +#define CTRL_PERIODIC (1 << 6) +#define CTRL_INTEN (1 << 5) +#define CTRL_PRESCALE_1 (0 << 2) +#define CTRL_PRESCALE_16 (1 << 2) +#define CTRL_PRESCALE_256 (2 << 2) +#define CTRL_32BIT (1 << 1) +#define CTRL_ONESHOT (1 << 0) + +static void test_dualtimer(void) +{ + g_assert_true(readl(TIMER_BASE + TIMER1RIS) =3D=3D 0); + + /* Start timer: will fire after 40000 ns */ + writel(TIMER_BASE + TIMER1LOAD, 1000); + /* enable in free-running, wrapping, interrupt mode */ + writel(TIMER_BASE + TIMER1CONTROL, CTRL_ENABLE | CTRL_INTEN); + + /* Step to just past the 500th tick and check VALUE */ + clock_step(500 * 40 + 1); + g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), =3D=3D, 0); + g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), =3D=3D, 500); + + /* Just past the 1000th tick: timer should have fired */ + clock_step(500 * 40); + g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), =3D=3D, 1); + g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), =3D=3D, 0); + + /* + * We are in free-running wrapping 16-bit mode, so on the following + * tick VALUE should have wrapped round to 0xffff. + */ + clock_step(40); + g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), =3D=3D, 0xffff); + + /* Check that any write to INTCLR clears interrupt */ + writel(TIMER_BASE + TIMER1INTCLR, 1); + g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), =3D=3D, 0); + + /* Turn off the timer */ + writel(TIMER_BASE + TIMER1CONTROL, 0); +} + +static void test_prescale(void) +{ + g_assert_true(readl(TIMER_BASE + TIMER2RIS) =3D=3D 0); + + /* Start timer: will fire after 40 * 256 * 1000 =3D=3D 1024000 ns */ + writel(TIMER_BASE + TIMER2LOAD, 1000); + /* enable in periodic, wrapping, interrupt mode, prescale 256 */ + writel(TIMER_BASE + TIMER2CONTROL, + CTRL_ENABLE | CTRL_INTEN | CTRL_PERIODIC | CTRL_PRESCALE_256); + + /* Step to just past the 500th tick and check VALUE */ + clock_step(40 * 256 * 501); + g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), =3D=3D, 0); + g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), =3D=3D, 500); + + /* Just past the 1000th tick: timer should have fired */ + clock_step(40 * 256 * 500); + g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), =3D=3D, 1); + g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), =3D=3D, 0); + + /* In periodic mode the tick VALUE now reloads */ + clock_step(40 * 256); + g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), =3D=3D, 1000); + + /* Check that any write to INTCLR clears interrupt */ + writel(TIMER_BASE + TIMER2INTCLR, 1); + g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), =3D=3D, 0); + + /* Turn off the timer */ + writel(TIMER_BASE + TIMER2CONTROL, 0); +} + +int main(int argc, char **argv) +{ + int r; + + g_test_init(&argc, &argv, NULL); + + qtest_start("-machine mps2-an385"); + + qtest_add_func("/cmsdk-apb-dualtimer/dualtimer", test_dualtimer); + qtest_add_func("/cmsdk-apb-dualtimer/prescale", test_prescale); + + r =3D g_test_run(); + + qtest_end(); + + return r; +} diff --git a/MAINTAINERS b/MAINTAINERS index 3729b89f359..154a91d12e5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -584,6 +584,7 @@ F: include/hw/timer/cmsdk-apb-timer.h F: tests/qtest/cmsdk-apb-timer-test.c F: hw/timer/cmsdk-apb-dualtimer.c F: include/hw/timer/cmsdk-apb-dualtimer.h +F: tests/qtest/cmsdk-apb-dualtimer-test.c F: hw/char/cmsdk-apb-uart.c F: include/hw/char/cmsdk-apb-uart.h F: hw/watchdog/cmsdk-apb-watchdog.c diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 9e2ebc47041..69dd4a8547c 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -141,6 +141,7 @@ qtests_npcm7xx =3D \ 'npcm7xx_timer-test', 'npcm7xx_watchdog_timer-test'] qtests_arm =3D \ + (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-= dualtimer-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_TIMER') ? ['cmsdk-apb-time= r-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_WATCHDOG') ? ['cmsdk-apb-w= atchdog-test'] : []) + \ (config_all_devices.has_key('CONFIG_PFLASH_CFI02') ? ['pflash-cfi02-test= '] : []) + \ --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834838; cv=none; d=zohomail.com; s=zohoarc; b=WBHAxs2xxsAQj06TjxxvUQAHrCCnMdu63k4vENEdCtasnel/dK1FFCOpe465OiPWLw97uNH6rV+jQg6XIa/vzGVF8obTHbBUdXq1ACNeSVZw4HyTqhwSsNAzvDUR/ADgbm1V+qbuLuA1f8kL+qPctIJznzsnxb/ePjj71gzjZHI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834838; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=4+oOsbOZCzGymS/pjG8axPSCcjrYv7uWaDnLd5easic=; b=ZA7Wzg92GL5RG/iMRYxHpwwaZldjThJdg03P9QAzMSY+Zbko2xc24nlPxyUs4xKbRgGGLFHEsyusnlc2zWwQuqQCVcyfzwardABMXSPOWoVRKjmO3w4kTo29ZbdLJzvvz/wpR6vAaWFDMJsvq3Ah7cPxnfXd1BcR5WEW4x4MXYg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834838362117.49643995253223; Thu, 28 Jan 2021 03:53:58 -0800 (PST) Received: from localhost ([::1]:40904 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55s4-0000bd-RD for importer@patchew.org; Thu, 28 Jan 2021 06:53:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33598) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gX-0001EO-SX for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:01 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:40940) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gS-00066n-2s for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:01 -0500 Received: by mail-wr1-x433.google.com with SMTP id c12so5055136wrc.7 for ; Thu, 28 Jan 2021 03:41:55 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4+oOsbOZCzGymS/pjG8axPSCcjrYv7uWaDnLd5easic=; b=RoogCL2v/x29BC0v2NyOztnq84tKwXC7eP9CHyXsYMvelN/RrXCxWNy2sSgtugzp0G 19BSqFE/oKy4CQFlobbXJ2LwoYY/But93FnVH+gEA5Ii7DvzzgBq4m7sblzcVnowNEul X5L638WTTA9FnPTAd4daRLsVUbnVLcVuB4HSDyF4ZO7PnYgU3AuxNqCGrlgJEqqqzmgS 8iybR9dxaFVFHqITjEWOLPoYkfV0cO7UNi8aAl8Uqf/ceXlGJoBk7tySn3SRPrsA/44H 072rB5pcx9bY8c6MpQ2sw2vVlZ2Or4/AwOmg8/SJNaXZ2bqI+1umTELfMiyM+8fee7xB x//g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4+oOsbOZCzGymS/pjG8axPSCcjrYv7uWaDnLd5easic=; b=kITmJQRf18WrHNrmc1UNGoavLGtYtaWYV/Vi7zPc81fZ1fYa3gdABFj69IhhEMuBtP SQ5BGol4NhtyfluF2wF5b72S73LKtV+m18Sq4h1+MzG/K8Ylp3Diqk2p3Ny347H1ghiE PwJfJIkEIMjv4Wi/FdpRrVzRxR4XoX1n7Pa/LSF4XRG/bHhWYj9zh4Qqe/VrRiPePZmA cYa56m0jOCoFBIOUixHms/uErPe6w3qDACfHRojlvJIQ2lQxge1U7/gnUZMZ7mmseHCF fEdwWTMxta1paoziWSIVB4FW/GnvLuRdWrBSHPDzCjaGmsOKkEd6aEG7AesPApDFAn5X cXGw== X-Gm-Message-State: AOAM53199BB7q2zg1Dpko7tpCMGohuRQZICwKMssUvla9+1RMZ1aYSCF l35fis8Xou0JJmPU3QO9Fa0dng== X-Google-Smtp-Source: ABdhPJw4KEIOPxPTCS+L4XGMS5eWFfa34rymJHTNHqLlbJTrSvZhhFeTZ2HGBeZ+xy66RTRx32Ubgg== X-Received: by 2002:a05:6000:1803:: with SMTP id m3mr15567503wrh.34.1611834114303; Thu, 28 Jan 2021 03:41:54 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 06/25] hw/timer/cmsdk-apb-timer: Rename CMSDKAPBTIMER struct to CMSDKAPBTimer Date: Thu, 28 Jan 2021 11:41:26 +0000 Message-Id: <20210128114145.20536-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) The state struct for the CMSDK APB timer device doesn't follow our usual naming convention of camelcase -- "CMSDK" and "APB" are both acronyms, but "TIMER" is not so should not be all-uppercase. Globally rename the struct to "CMSDKAPBTimer" (bringing it into line with CMSDKAPBWatchdog and CMSDKAPBDualTimer; CMSDKAPBUART remains as-is because "UART" is an acronym). Commit created with: perl -p -i -e 's/CMSDKAPBTIMER/CMSDKAPBTimer/g' hw/timer/cmsdk-apb-timer.c= include/hw/arm/armsse.h include/hw/timer/cmsdk-apb-timer.h Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-7-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/armsse.h | 6 +++--- include/hw/timer/cmsdk-apb-timer.h | 4 ++-- hw/timer/cmsdk-apb-timer.c | 28 ++++++++++++++-------------- 3 files changed, 19 insertions(+), 19 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 77f86771c30..83f5e28c16e 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -153,9 +153,9 @@ struct ARMSSE { TZPPC apb_ppc0; TZPPC apb_ppc1; TZMPC mpc[IOTS_NUM_MPC]; - CMSDKAPBTIMER timer0; - CMSDKAPBTIMER timer1; - CMSDKAPBTIMER s32ktimer; + CMSDKAPBTimer timer0; + CMSDKAPBTimer timer1; + CMSDKAPBTimer s32ktimer; qemu_or_irq ppc_irq_orgate; SplitIRQ sec_resp_splitter; SplitIRQ ppc_irq_splitter[NUM_PPCS]; diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-ap= b-timer.h index 0d80b2a48cd..baa009bb2da 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -18,9 +18,9 @@ #include "qom/object.h" =20 #define TYPE_CMSDK_APB_TIMER "cmsdk-apb-timer" -OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBTIMER, CMSDK_APB_TIMER) +OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBTimer, CMSDK_APB_TIMER) =20 -struct CMSDKAPBTIMER { +struct CMSDKAPBTimer { /*< private >*/ SysBusDevice parent_obj; =20 diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index f85f1309f37..ae9c5422540 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -67,14 +67,14 @@ static const int timer_id[] =3D { 0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */ }; =20 -static void cmsdk_apb_timer_update(CMSDKAPBTIMER *s) +static void cmsdk_apb_timer_update(CMSDKAPBTimer *s) { qemu_set_irq(s->timerint, !!(s->intstatus & R_INTSTATUS_IRQ_MASK)); } =20 static uint64_t cmsdk_apb_timer_read(void *opaque, hwaddr offset, unsigned= size) { - CMSDKAPBTIMER *s =3D CMSDK_APB_TIMER(opaque); + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(opaque); uint64_t r; =20 switch (offset) { @@ -106,7 +106,7 @@ static uint64_t cmsdk_apb_timer_read(void *opaque, hwad= dr offset, unsigned size) static void cmsdk_apb_timer_write(void *opaque, hwaddr offset, uint64_t va= lue, unsigned size) { - CMSDKAPBTIMER *s =3D CMSDK_APB_TIMER(opaque); + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(opaque); =20 trace_cmsdk_apb_timer_write(offset, value, size); =20 @@ -181,7 +181,7 @@ static const MemoryRegionOps cmsdk_apb_timer_ops =3D { =20 static void cmsdk_apb_timer_tick(void *opaque) { - CMSDKAPBTIMER *s =3D CMSDK_APB_TIMER(opaque); + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(opaque); =20 if (s->ctrl & R_CTRL_IRQEN_MASK) { s->intstatus |=3D R_INTSTATUS_IRQ_MASK; @@ -191,7 +191,7 @@ static void cmsdk_apb_timer_tick(void *opaque) =20 static void cmsdk_apb_timer_reset(DeviceState *dev) { - CMSDKAPBTIMER *s =3D CMSDK_APB_TIMER(dev); + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(dev); =20 trace_cmsdk_apb_timer_reset(); s->ctrl =3D 0; @@ -206,7 +206,7 @@ static void cmsdk_apb_timer_reset(DeviceState *dev) static void cmsdk_apb_timer_init(Object *obj) { SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); - CMSDKAPBTIMER *s =3D CMSDK_APB_TIMER(obj); + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(obj); =20 memory_region_init_io(&s->iomem, obj, &cmsdk_apb_timer_ops, s, "cmsdk-apb-timer", 0x1000); @@ -216,7 +216,7 @@ static void cmsdk_apb_timer_init(Object *obj) =20 static void cmsdk_apb_timer_realize(DeviceState *dev, Error **errp) { - CMSDKAPBTIMER *s =3D CMSDK_APB_TIMER(dev); + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(dev); =20 if (s->pclk_frq =3D=3D 0) { error_setg(errp, "CMSDK APB timer: pclk-frq property must be set"); @@ -239,17 +239,17 @@ static const VMStateDescription cmsdk_apb_timer_vmsta= te =3D { .version_id =3D 1, .minimum_version_id =3D 1, .fields =3D (VMStateField[]) { - VMSTATE_PTIMER(timer, CMSDKAPBTIMER), - VMSTATE_UINT32(ctrl, CMSDKAPBTIMER), - VMSTATE_UINT32(value, CMSDKAPBTIMER), - VMSTATE_UINT32(reload, CMSDKAPBTIMER), - VMSTATE_UINT32(intstatus, CMSDKAPBTIMER), + VMSTATE_PTIMER(timer, CMSDKAPBTimer), + VMSTATE_UINT32(ctrl, CMSDKAPBTimer), + VMSTATE_UINT32(value, CMSDKAPBTimer), + VMSTATE_UINT32(reload, CMSDKAPBTimer), + VMSTATE_UINT32(intstatus, CMSDKAPBTimer), VMSTATE_END_OF_LIST() } }; =20 static Property cmsdk_apb_timer_properties[] =3D { - DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBTIMER, pclk_frq, 0), + DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBTimer, pclk_frq, 0), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -266,7 +266,7 @@ static void cmsdk_apb_timer_class_init(ObjectClass *kla= ss, void *data) static const TypeInfo cmsdk_apb_timer_info =3D { .name =3D TYPE_CMSDK_APB_TIMER, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(CMSDKAPBTIMER), + .instance_size =3D sizeof(CMSDKAPBTimer), .instance_init =3D cmsdk_apb_timer_init, .class_init =3D cmsdk_apb_timer_class_init, }; --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834953; cv=none; d=zohomail.com; s=zohoarc; b=ko/uYqr7qw/hZt4tRCUDnGTDlZyDKqdeLEUrcLl8QDWho1LQguvqFt4j6ghlRLSkMGrxFMEedRjYc9Rgmtlzb328Dghag2xD0Naholsko52ExOqKP3Mj8AiJKOx5G8rj95ygOVfWaPTxEPUdmqFY9yut1NLqwJdtyZLI+PfL0vk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834953; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=PcyyQtxEfK2y+OFK30UnD/QXT/ftSlQorAj3S+Fk7FE=; b=P7Cpp0eN7s2YoLMx8X89WsZV4DXTYqj5RJbXzjdbER6u3HRldXoWosqi9yX77hM9iSCdt0+yfC1blzPgraP9yHlTzFpYXw17q+T1mQug3EkECGV3zF7ZS6jTZ6YSY2c0t+KzxM6mGskFo8auOXf6DJ8na366MEZzF4n1WbgjOE4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834953743568.4564483022979; Thu, 28 Jan 2021 03:55:53 -0800 (PST) Received: from localhost ([::1]:45708 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55tw-0002ci-LK for importer@patchew.org; Thu, 28 Jan 2021 06:55:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33630) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gY-0001Ga-Ox for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:02 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]:39192) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gS-000670-OK for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:02 -0500 Received: by mail-wr1-x434.google.com with SMTP id a1so5074678wrq.6 for ; Thu, 28 Jan 2021 03:41:56 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PcyyQtxEfK2y+OFK30UnD/QXT/ftSlQorAj3S+Fk7FE=; b=qfN5rLMp4qA3iy1d2aPpnmztm8v/X2d7qe0H9nmWjWPmXeY6rZ5J6m7V0wdSbr69ZK w3pRDzS4IEulRYFOV5aaHoV6e8n4SfzlH4Kvjl+qLoUO4ED80DQjGWc5dD6O3UMSEMta zYXYTuZxkNEayxxyHDdk+hGrB6QWXV4FM777Z2C6h/Of3wAIt0KZmuBlZSQNPrXehXgv kPqL3h9HaSU+qX5O6Jd0+hMzUD+S/ka66XS/qtJk/rap2Z21uNUF+3ObpBcp0O5SuzV/ QYIV5jr6quUqfqQZh93bnpNT4T8Bjsdt2i1s26j81bklMvb1VkfOezBNdKb7QNwXD0MW Gy1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PcyyQtxEfK2y+OFK30UnD/QXT/ftSlQorAj3S+Fk7FE=; b=KBHjY8lodkzOx62w9vj/ab8Cmz5TZ/B+0HoPSCGo9EPrft0GEoVk63i0oRF62ZgzP+ L4LUSFWieFL3VH+aGWbvkEhULUdZ7gE9AxmQhZnqUmHYRxyCTcFwG/5BKoR/dwuAyq7R euQawy7Ua4qz/twxheLfhNWosKBJxOin4yn4kUdlt/1BbW+RA1ho7WIOY6rfSVPZmt4z mXWB6Hlthb3t7rRkAJFgInk7bxmBr/eleUc0UdeSo+Ex1oPjm8OFcUFMj3ESVOoraA4Y uR88as3c9OVPhoJvZnur/uv4Byc7sQS/m9wC2ylwVUNZpCgXtwF5S36+VOXDHwYUbyEJ /siA== X-Gm-Message-State: AOAM533QTq6nE7NAONmzk4SySYX8lN7cmC/eiGltuBCY7KbfSRTfj7q7 ZJtpfU+253ukHSSsxW/sp/hxTponV6hizQ== X-Google-Smtp-Source: ABdhPJyzWrhXtESTCx/GsjTzMbiCF3IxgSKg4RnIh5De6ekw4KRLvk+jsOqlVEWYx6+VPbWqflOU/w== X-Received: by 2002:a5d:4402:: with SMTP id z2mr15796220wrq.265.1611834115157; Thu, 28 Jan 2021 03:41:55 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 07/25] hw/timer/cmsdk-apb-timer: Add Clock input Date: Thu, 28 Jan 2021 11:41:27 +0000 Message-Id: <20210128114145.20536-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) As the first step in converting the CMSDK_APB_TIMER device to the Clock framework, add a Clock input. For the moment we do nothing with this clock; we will change the behaviour from using the pclk-frq property to using the Clock once all the users of this device have been converted to wire up the Clock. Since the device doesn't already have a doc comment for its "QEMU interface", we add one including the new Clock. This is a migration compatibility break for machines mps2-an505, mps2-an521, musca-a, musca-b1. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-8-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/timer/cmsdk-apb-timer.h | 9 +++++++++ hw/timer/cmsdk-apb-timer.c | 7 +++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-ap= b-timer.h index baa009bb2da..fc2aa97acac 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -15,11 +15,19 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "hw/clock.h" #include "qom/object.h" =20 #define TYPE_CMSDK_APB_TIMER "cmsdk-apb-timer" OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBTimer, CMSDK_APB_TIMER) =20 +/* + * QEMU interface: + * + QOM property "pclk-frq": frequency at which the timer is clocked + * + Clock input "pclk": clock for the timer + * + sysbus MMIO region 0: the register bank + * + sysbus IRQ 0: timer interrupt TIMERINT + */ struct CMSDKAPBTimer { /*< private >*/ SysBusDevice parent_obj; @@ -29,6 +37,7 @@ struct CMSDKAPBTimer { qemu_irq timerint; uint32_t pclk_frq; struct ptimer_state *timer; + Clock *pclk; =20 uint32_t ctrl; uint32_t value; diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index ae9c5422540..c63145ff553 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -35,6 +35,7 @@ #include "hw/sysbus.h" #include "hw/irq.h" #include "hw/registerfields.h" +#include "hw/qdev-clock.h" #include "hw/timer/cmsdk-apb-timer.h" #include "migration/vmstate.h" =20 @@ -212,6 +213,7 @@ static void cmsdk_apb_timer_init(Object *obj) s, "cmsdk-apb-timer", 0x1000); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->timerint); + s->pclk =3D qdev_init_clock_in(DEVICE(s), "pclk", NULL, NULL); } =20 static void cmsdk_apb_timer_realize(DeviceState *dev, Error **errp) @@ -236,10 +238,11 @@ static void cmsdk_apb_timer_realize(DeviceState *dev,= Error **errp) =20 static const VMStateDescription cmsdk_apb_timer_vmstate =3D { .name =3D "cmsdk-apb-timer", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (VMStateField[]) { VMSTATE_PTIMER(timer, CMSDKAPBTimer), + VMSTATE_CLOCK(pclk, CMSDKAPBTimer), VMSTATE_UINT32(ctrl, CMSDKAPBTimer), VMSTATE_UINT32(value, CMSDKAPBTimer), VMSTATE_UINT32(reload, CMSDKAPBTimer), --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834410; cv=none; d=zohomail.com; s=zohoarc; b=EC0PzbCNozbPR4INB9yB9Q5qN2QMa/J4Cy+2G54y7HGyFoELJyiWBLbSx5idDNodjbLA4dpVJ3M3jnw5+mxZzG0m5D319L9r6b/imD6KMkkIX5XjNtHkOmjrvdp0SMuihrIqoX4ahHY22900Kdy8NxEnRz2RoQ0dskQ4n4EEDRE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834410; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=DQapdna4q5KlhOpBjPWEEiHjmFts8BaZpTCE2Nvje2w=; b=hvT/UjCafmAwupxA+gTNlUnwDl+vXfHngMOry7XeV6+PSXBPha15o9Uy+leKbPmvfwMBGsh1FI9s+3ixY5bNtOl5wWSDP1fthCEJ6OalZKh4Mb9YiB4xUNoXu9qaJQl6lRR5RtoGeMqSJUPV43vRTCYqrx5wBppbwsGWAO2X5sg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834410287762.5490460149674; Thu, 28 Jan 2021 03:46:50 -0800 (PST) Received: from localhost ([::1]:43860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55lB-0006zn-8c for importer@patchew.org; Thu, 28 Jan 2021 06:46:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gZ-0001J9-NB for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:03 -0500 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]:38292) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gT-00067E-Bl for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:03 -0500 Received: by mail-wm1-x334.google.com with SMTP id y187so4304601wmd.3 for ; Thu, 28 Jan 2021 03:41:56 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DQapdna4q5KlhOpBjPWEEiHjmFts8BaZpTCE2Nvje2w=; b=Re6LUPLB6mXxlIJY7EOZB4deXKydxYivQHETHT+KwrFHNlkjJcDeX4EkUjulfdq1MP 4lYm1cNjb+5c8BLaEiNiOIXgG/LhzVg/M42F+lVADyOHgJ9kQTEsopmC7/6/NCc3zl0s H9xBfzWyHeH47NK4ElU3IzvECE9WzhCP4nyb/7+JnZ2MH4Jd7GWX/7DDuPIcvzg3cF5n D5z+1ioZRNm3RBCo/LQcsnmJsuulL/OoPnKLLQVe/Ipmwv/7fruSfBsNsW9J1qOWMYZ8 ySrdBiTRTTx54mv91DdRaW/buj67rd36vdyr2p9EX6Z23MAUzUUNeKsYwZWfJVJcE/nm xIuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DQapdna4q5KlhOpBjPWEEiHjmFts8BaZpTCE2Nvje2w=; b=HPWxC4a3333BRqZyBjhSS8DwC45Wsd4hi4gzCYHgmNXjYcFaUe1tNi3EFJgwhJrFM5 /zAVDz7etTIOfKSrMsimrxCWQ8PsJW60fDO/adq+/GyHs6t/dN4BkIC6gO6842cxIQ74 DWHrTZNMllV69qUPFAegEQd+JvwFzW1zp2i4UezBO5a7L3PfWmwg2JWl1dPlk9NrKMys tcgOWm6yvV6nlNqfnk1xkkCWMyKPZPKfH/OYnRej1FXLZ4RT7qMsRG95m6oUYa0Z+Rjw 4XQ8QUWLou8tMwVFL+qoa6PVo+uWuaRRLyszLe+n8TBIymapewztoSKAVtIU+9JH3XuV bIiw== X-Gm-Message-State: AOAM532kXWkFwSXVJ9fQDD2OFDVFnCoxvrUTxUJMRTyVaVT4ruWxl+qC dS1geJXt/kFPP08JJFk/UENWDg== X-Google-Smtp-Source: ABdhPJy+UakbaagTegmJZqzH8mmEedz2zys1giJqtfrB7gXXSwZpYiJdVaC5JLdGYp1ZSzfCjzSzrA== X-Received: by 2002:a1c:df08:: with SMTP id w8mr8100524wmg.81.1611834116136; Thu, 28 Jan 2021 03:41:56 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 08/25] hw/timer/cmsdk-apb-dualtimer: Add Clock input Date: Thu, 28 Jan 2021 11:41:28 +0000 Message-Id: <20210128114145.20536-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) As the first step in converting the CMSDK_APB_DUALTIMER device to the Clock framework, add a Clock input. For the moment we do nothing with this clock; we will change the behaviour from using the pclk-frq property to using the Clock once all the users of this device have been converted to wire up the Clock. We take the opportunity to correct the name of the clock input to match the hardware -- the dual timer names the clock which drives the timers TIMCLK. (It does also have a 'pclk' input, which is used only for the register and APB bus logic; on the SSE-200 these clocks are both connected together.) This is a migration compatibility break for machines mps2-an385, mps2-an386, mps2-an500, mps2-an511, mps2-an505, mps2-an521, musca-a, musca-b1. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-9-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/timer/cmsdk-apb-dualtimer.h | 3 +++ hw/timer/cmsdk-apb-dualtimer.c | 7 +++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/include/hw/timer/cmsdk-apb-dualtimer.h b/include/hw/timer/cmsd= k-apb-dualtimer.h index 08d9e6fa3d5..3adbb01dd34 100644 --- a/include/hw/timer/cmsdk-apb-dualtimer.h +++ b/include/hw/timer/cmsdk-apb-dualtimer.h @@ -17,6 +17,7 @@ * * QEMU interface: * + QOM property "pclk-frq": frequency at which the timer is clocked + * + Clock input "TIMCLK": clock (for both timers) * + sysbus MMIO region 0: the register bank * + sysbus IRQ 0: combined timer interrupt TIMINTC * + sysbus IRO 1: timer block 1 interrupt TIMINT1 @@ -28,6 +29,7 @@ =20 #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "hw/clock.h" #include "qom/object.h" =20 #define TYPE_CMSDK_APB_DUALTIMER "cmsdk-apb-dualtimer" @@ -62,6 +64,7 @@ struct CMSDKAPBDualTimer { MemoryRegion iomem; qemu_irq timerintc; uint32_t pclk_frq; + Clock *timclk; =20 CMSDKAPBDualTimerModule timermod[CMSDK_APB_DUALTIMER_NUM_MODULES]; uint32_t timeritcr; diff --git a/hw/timer/cmsdk-apb-dualtimer.c b/hw/timer/cmsdk-apb-dualtimer.c index f6534241b94..781b496037b 100644 --- a/hw/timer/cmsdk-apb-dualtimer.c +++ b/hw/timer/cmsdk-apb-dualtimer.c @@ -25,6 +25,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/registerfields.h" +#include "hw/qdev-clock.h" #include "hw/timer/cmsdk-apb-dualtimer.h" #include "migration/vmstate.h" =20 @@ -445,6 +446,7 @@ static void cmsdk_apb_dualtimer_init(Object *obj) for (i =3D 0; i < ARRAY_SIZE(s->timermod); i++) { sysbus_init_irq(sbd, &s->timermod[i].timerint); } + s->timclk =3D qdev_init_clock_in(DEVICE(s), "TIMCLK", NULL, NULL); } =20 static void cmsdk_apb_dualtimer_realize(DeviceState *dev, Error **errp) @@ -485,9 +487,10 @@ static const VMStateDescription cmsdk_dualtimermod_vms= tate =3D { =20 static const VMStateDescription cmsdk_apb_dualtimer_vmstate =3D { .name =3D "cmsdk-apb-dualtimer", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (VMStateField[]) { + VMSTATE_CLOCK(timclk, CMSDKAPBDualTimer), VMSTATE_STRUCT_ARRAY(timermod, CMSDKAPBDualTimer, CMSDK_APB_DUALTIMER_NUM_MODULES, 1, cmsdk_dualtimermod_vmstate, --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834552; cv=none; d=zohomail.com; s=zohoarc; b=b+zUDOEHAVuSR2K/IbBIHH/IXS5mUKVrkZVQP01wEgQ89UqB44YXTkjx5D1cw7O257Flx5AL/xvv1zxKBxLF9f60ecawF0toskvMhVI4BBnGUA7Worr+wyA6X1mfRgC4dbR/k1mVJRhNMXRkSzMwXEwhyHwtsVKCP3aATX1229I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834552; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mNFHl5aQheGLHGGRVwK/cQ/4FAuv8SfUj6q6QyYBaVg=; b=ZBBJS/P+Kf3w+782BgxrgF/DUdH6n1+iI6gMPRTuTcL2nQ8Ao6wJ6hRdQUc18p62DK82rgav3p/XPdKHWLASLH5BM7EFiDc16bZabkdlSQImAH7KKmBVd8tAU/gEvTKm1xNNHxhZt1Opw2l44btYzNrt/IEBVpfv6u4IWWN2uvg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834552341960.3403998072081; Thu, 28 Jan 2021 03:49:12 -0800 (PST) Received: from localhost ([::1]:52442 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55nT-00023j-8K for importer@patchew.org; Thu, 28 Jan 2021 06:49:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33702) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55ga-0001LN-Hk for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:04 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:46265) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gV-00068E-47 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:04 -0500 Received: by mail-wr1-x42c.google.com with SMTP id q7so5023722wre.13 for ; Thu, 28 Jan 2021 03:41:57 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mNFHl5aQheGLHGGRVwK/cQ/4FAuv8SfUj6q6QyYBaVg=; b=gw1Oi1XjIpDCZLn4Zh9sUN5F9UO8yXzHY9MMrwSEvEHqijvBok8jTcQc389U2x5ON4 zs/ITJn/nXUIlKjBeeiO25hxz8Npod8a8bSuDFxkb/+Z2rlHWbUxkf3kFmzCNeJxWntG A3Jy1BizhxTlfeKqeTN0NYR21mLU+3c0C2BxOME+q6DKgtqIA6Uf+CzHhDejDqmMB5mR SecMJGGmCBbwSjfOpKkj36QwDUagMUXxmHx73lCNSnNB8ubIEvOnQVnEaP8yQ2yB4aS6 2cNgWo7INtEd5kLginl+js1MSubsAMItwiaVZxwI0dgNCJx0sZTdgG08gKCgdmo/nDnw h3eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mNFHl5aQheGLHGGRVwK/cQ/4FAuv8SfUj6q6QyYBaVg=; b=GVXLxockoILIdO/NiHPs5SdlM4SaVTYyGHwgCVA7Mewq7dOnJ31BIrkqtfQWlvfvp0 haOhhEYlVEhAbwuHWEl8kVRpj0p68NO/aRVoHxIiyvn6r6Hju1qxEJVNiFasiopHiu8j vIcgjztCLj/nliPClSvtXIhfoylttJHbqeHkChvq+7Qumq120+zF8Bi6MnOcvDWBKEA6 0JGqeudICZm88nD0Vu/xb7dHwISM4QfPzv4ZYdVeh+lAdKQKYdjvveL5yrZFsYr08aMw L5DuXvDWS5aT6/oGh979isxpOMr4vTHpt+5kW4WYk0cyYHmxem8qUjy06dciblKQ+Zss X29g== X-Gm-Message-State: AOAM531eqbhdMiWL+ekO+zA06Opbu4YK/vbQi5A3V6JrRvUQbqV5jzYV PBOCxK5XM3PbsyeQ1XgG2dCu7eooecVL4A== X-Google-Smtp-Source: ABdhPJwu+SRPAqx7a7B6mcNggYt+7BELMo57wZSKbcsEy4ZIeTgDMoSvR7A4qZpRkkomNrUgTpzjWw== X-Received: by 2002:a5d:4b0b:: with SMTP id v11mr15525288wrq.226.1611834117009; Thu, 28 Jan 2021 03:41:57 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 09/25] hw/watchdog/cmsdk-apb-watchdog: Add Clock input Date: Thu, 28 Jan 2021 11:41:29 +0000 Message-Id: <20210128114145.20536-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) As the first step in converting the CMSDK_APB_TIMER device to the Clock framework, add a Clock input. For the moment we do nothing with this clock; we will change the behaviour from using the wdogclk-frq property to using the Clock once all the users of this device have been converted to wire up the Clock. This is a migration compatibility break for machines mps2-an385, mps2-an386, mps2-an500, mps2-an511, mps2-an505, mps2-an521, musca-a, musca-b1, lm3s811evb, lm3s6965evb. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-10-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/watchdog/cmsdk-apb-watchdog.h | 3 +++ hw/watchdog/cmsdk-apb-watchdog.c | 7 +++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/include/hw/watchdog/cmsdk-apb-watchdog.h b/include/hw/watchdog= /cmsdk-apb-watchdog.h index 3da0d43e355..34069ca6969 100644 --- a/include/hw/watchdog/cmsdk-apb-watchdog.h +++ b/include/hw/watchdog/cmsdk-apb-watchdog.h @@ -17,6 +17,7 @@ * * QEMU interface: * + QOM property "wdogclk-frq": frequency at which the watchdog is clock= ed + * + Clock input "WDOGCLK": clock for the watchdog's timer * + sysbus MMIO region 0: the register bank * + sysbus IRQ 0: watchdog interrupt * @@ -33,6 +34,7 @@ =20 #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "hw/clock.h" #include "qom/object.h" =20 #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog" @@ -54,6 +56,7 @@ struct CMSDKAPBWatchdog { uint32_t wdogclk_frq; bool is_luminary; struct ptimer_state *timer; + Clock *wdogclk; =20 uint32_t control; uint32_t intstatus; diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-watch= dog.c index 5bbadadfa68..b03bcb73628 100644 --- a/hw/watchdog/cmsdk-apb-watchdog.c +++ b/hw/watchdog/cmsdk-apb-watchdog.c @@ -30,6 +30,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/registerfields.h" +#include "hw/qdev-clock.h" #include "hw/watchdog/cmsdk-apb-watchdog.h" #include "migration/vmstate.h" =20 @@ -318,6 +319,7 @@ static void cmsdk_apb_watchdog_init(Object *obj) s, "cmsdk-apb-watchdog", 0x1000); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->wdogint); + s->wdogclk =3D qdev_init_clock_in(DEVICE(s), "WDOGCLK", NULL, NULL); =20 s->is_luminary =3D false; s->id =3D cmsdk_apb_watchdog_id; @@ -346,9 +348,10 @@ static void cmsdk_apb_watchdog_realize(DeviceState *de= v, Error **errp) =20 static const VMStateDescription cmsdk_apb_watchdog_vmstate =3D { .name =3D "cmsdk-apb-watchdog", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (VMStateField[]) { + VMSTATE_CLOCK(wdogclk, CMSDKAPBWatchdog), VMSTATE_PTIMER(timer, CMSDKAPBWatchdog), VMSTATE_UINT32(control, CMSDKAPBWatchdog), VMSTATE_UINT32(intstatus, CMSDKAPBWatchdog), --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835042; cv=none; d=zohomail.com; s=zohoarc; b=DPT+gRpfExYZzOjyxWPE+pXYkJfxgr6yi1QL5MXFYE0cFkk9crC7fAorcM+yilklXRYHgvOcNiLBK1P7CoUBhxwpDdmP+9ZQg1lzpTZRfWv8wFDwwgTTPrrwPMuARd1WDUIEC1iX84ddst5/vgGrhSvHRahR49nKcCmfikElwT4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835042; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=2e1YXz+Q0p/Ws1MZPKR+jaAmbZcN+lIEvqjMORMBP0Q=; b=nIChsAJTNVHKCCFszhjLuOl+AzcXR4FKtdWdxVRBe8HttZX5omv1ZTV4MPX3c+ZBhSBHYtS6BsTJAFLy2LY7dbDAmgBe20zM/yR/4hmuaO5HGOtMVNEHka1/pofE3DLyLgAEzUQDMLSQJvAtQ/hhFDGXExb4I7a0tjJ1FizQogs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835042915923.8436220627541; Thu, 28 Jan 2021 03:57:22 -0800 (PST) Received: from localhost ([::1]:49898 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55vN-0004Rr-TW for importer@patchew.org; Thu, 28 Jan 2021 06:57:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33756) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gc-0001Q0-8a for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:06 -0500 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]:55544) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gV-00068a-BA for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:05 -0500 Received: by mail-wm1-x329.google.com with SMTP id f16so4031957wmq.5 for ; Thu, 28 Jan 2021 03:41:58 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2e1YXz+Q0p/Ws1MZPKR+jaAmbZcN+lIEvqjMORMBP0Q=; b=ojOc5ay+OjcuVNl6T/PWhX8DlCZ+Wmhn5VBAljuFbzDp+5+Us57W+8foaSlIlLqu/w XxOL5KBoT1bAbv5oisrpIRVeYCPpOh+7Rryo4dK41jQT7kAJlAXg4hW0VfcE/gIzJcnB sf7RwHkfCxvpt2ZBJ0hnbYjMhGnC4RAMb6oqrN97zfffhjqcYLe/298/T9rqnFbWuLdc hiSyeRMJeJ6gxFh6YQlZuaNqA1QviPxkEPQgFGy0ddGF2PWv0KRfgZ9N707KilS6gLQY tYiaCkFt5MNUJzMUKZPawlmH/HfoTJhehYuaBHHrhVWut7Bco0iMAiqbfE6QaILwsFZa VopQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2e1YXz+Q0p/Ws1MZPKR+jaAmbZcN+lIEvqjMORMBP0Q=; b=fd8vdUJ/E6Vy+PctLgeLU9I3Xuwj2QV0sLdupP9rKwEQ9ggDHzkWWD5F4n2Npzwiej t/2FakL2oJm/N8VzKUcWn4Lhkvnl1o8iyi9vc+0YjUxaJ0XxTD9zSUgC3Z3IpsTyryiI 3iPmG65aHROybcjVXnOQNlC85+Zm3aSQuQcKmBEoz1U13fSUrgZkoSPOMHqGo3vnqBxR JQpa7GPy9vrjxEUiHaMaupVm3it4r8jNkgrXT4hFeLWzv6AAsAtXBMjx3upWFJ3EkacN jlCJJA7y83UVY5Va0tm3sUe+hWH6ywIC3flra84h3ttYMoBDM11BAu8vbk1MqPAxtyjA pnBQ== X-Gm-Message-State: AOAM532mRFtUGwDLtqYB6GqntKuTdLE2ERO2BImiIlrNE0vVjCReDCQJ LXW2HUs5mHcaBtUM9WVfyCqgqQ== X-Google-Smtp-Source: ABdhPJxNNN6otN77Uiv6pFE7T8KLXuosHZ3iTvBufhnCyUe7dELCbg1dntmxBEbV+3SNuI85fXzLMA== X-Received: by 2002:a05:600c:22cf:: with SMTP id 15mr8170546wmg.19.1611834117966; Thu, 28 Jan 2021 03:41:57 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 10/25] hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ" Date: Thu, 28 Jan 2021 11:41:30 +0000 Message-Id: <20210128114145.20536-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) While we transition the ARMSSE code from integer properties specifying clock frequencies to Clock objects, we want to have the device provide both at once. We want the final name of the main input Clock to be "MAINCLK", following the hardware name. Unfortunately creating an input Clock with a name X creates an under-the-hood QOM property X; for "MAINCLK" this clashes with the existing UINT32 property of that name. Rename the UINT32 property to MAINCLK_FRQ so it can coexist with the MAINCLK Clock; once the transition is complete MAINCLK_FRQ will be deleted. Commit created with: perl -p -i -e 's/MAINCLK/MAINCLK_FRQ/g' hw/arm/{armsse,mps2-tz,musca}.c in= clude/hw/arm/armsse.h Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-11-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/armsse.h | 2 +- hw/arm/armsse.c | 6 +++--- hw/arm/mps2-tz.c | 2 +- hw/arm/musca.c | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 83f5e28c16e..4860a793f4b 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -39,7 +39,7 @@ * QEMU interface: * + QOM property "memory" is a MemoryRegion containing the devices provi= ded * by the board model. - * + QOM property "MAINCLK" is the frequency of the main system clock + * + QOM property "MAINCLK_FRQ" is the frequency of the main system clock * + QOM property "EXP_NUMIRQ" sets the number of expansion interrupts. * (In hardware, the SSE-200 permits the number of expansion interrupts * for the two CPUs to be configured separately, but we restrict it to diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index baac027659d..d2ba0459c44 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -47,7 +47,7 @@ static Property iotkit_properties[] =3D { DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64), - DEFINE_PROP_UINT32("MAINCLK", ARMSSE, mainclk_frq, 0), + DEFINE_PROP_UINT32("MAINCLK_FRQ", ARMSSE, mainclk_frq, 0), DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15), DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000), DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], true), @@ -59,7 +59,7 @@ static Property armsse_properties[] =3D { DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64), - DEFINE_PROP_UINT32("MAINCLK", ARMSSE, mainclk_frq, 0), + DEFINE_PROP_UINT32("MAINCLK_FRQ", ARMSSE, mainclk_frq, 0), DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15), DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000), DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], false), @@ -448,7 +448,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) } =20 if (!s->mainclk_frq) { - error_setg(errp, "MAINCLK property was not set"); + error_setg(errp, "MAINCLK_FRQ property was not set"); return; } =20 diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 3707876d6d4..6a9eed9022a 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -402,7 +402,7 @@ static void mps2tz_common_init(MachineState *machine) object_property_set_link(OBJECT(&mms->iotkit), "memory", OBJECT(system_memory), &error_abort); qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", MPS2TZ_NUMIRQ); - qdev_prop_set_uint32(iotkitdev, "MAINCLK", SYSCLK_FRQ); + qdev_prop_set_uint32(iotkitdev, "MAINCLK_FRQ", SYSCLK_FRQ); sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal); =20 /* diff --git a/hw/arm/musca.c b/hw/arm/musca.c index b50157f63a6..d82bef11cf2 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -375,7 +375,7 @@ static void musca_init(MachineState *machine) qdev_prop_set_uint32(ssedev, "EXP_NUMIRQ", mmc->num_irqs); qdev_prop_set_uint32(ssedev, "init-svtor", mmc->init_svtor); qdev_prop_set_uint32(ssedev, "SRAM_ADDR_WIDTH", mmc->sram_addr_width); - qdev_prop_set_uint32(ssedev, "MAINCLK", SYSCLK_FRQ); + qdev_prop_set_uint32(ssedev, "MAINCLK_FRQ", SYSCLK_FRQ); /* * Musca-A takes the default SSE-200 FPU/DSP settings (ie no for * CPU0 and yes for CPU1); Musca-B1 explicitly enables them for CPU0. --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834483; cv=none; d=zohomail.com; s=zohoarc; b=Q2HGvSVfYdja7xIf1F20DeERlV9xxHqdAS94v0J4rGRkOIyWjMJYKNsnHuI0jcykcvOnVTeR/Lvm92pe/19eVxKhPsuI2bhLvR6qllvhz/ohVZrV2TOYHyihG66W6mSVKJmEK6Ox8UPKgK0AZYmshYp7jlu1mpO4n1U4bHhl8yA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834483; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Y2K1kNTbNOMvi2EpXTLd2ToPKEqAh/Wj79aMwJhopKA=; b=J1YgPbT17aJAcGMxialyDbiZSLggrPyxWoMeiI49w2hm5LqN+LqX4KYiP4Syy1Yidl21+Lu+UUZfkQY0OYBvR6xZM1swflG/LdgBR/Bq+QMnkvEp+wKZu+WS6jyGNVJ5Ubs3CiLxpgCbmPTchM7iTvh1XOOxlWBnjuyKESExbkI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834483924138.7524091127251; Thu, 28 Jan 2021 03:48:03 -0800 (PST) Received: from localhost ([::1]:48662 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55mM-0000WB-PC for importer@patchew.org; Thu, 28 Jan 2021 06:48:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33772) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gc-0001RC-RU for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:06 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:38288) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gW-00068w-9X for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:06 -0500 Received: by mail-wm1-x32f.google.com with SMTP id y187so4304714wmd.3 for ; Thu, 28 Jan 2021 03:41:59 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y2K1kNTbNOMvi2EpXTLd2ToPKEqAh/Wj79aMwJhopKA=; b=JIRT16NxMAt4jGsxudcY7nyUYMc7HdDT7Q62QSd21ojMk9pOd3VdjogA0Bfwddkrxt HOajJg++U+vgKEJejBe1Nub9Xf891Dx5c7HPfNPSpARM7nw2KrrTvnaOwI2Ck5sJz3uf 2MfB56EEp7a5RrepckUYmZcupE0EkyuD9PNvqOAL5BTqsjxy3zs5hFM2pIM2px3YQGjv 3x3EAPGV5aBS4Z5NxZm84WwmsNfMOA4U/ZdrUI/TpY1tqQ4dBRaRi28SUttMaPfYYTug DtRCtSABPS86wjglSopxQA9A+ygw1+buOOXQzKfHChTRJc6t0XIvaFf7iAaIpeU89ea7 lHIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y2K1kNTbNOMvi2EpXTLd2ToPKEqAh/Wj79aMwJhopKA=; b=H45WpsTaWqBRLPiBx9YGmTKMFIIwbeg9ui7lBz15jYkdSbpH59+2sAf1vRcZFDLh3q 2GW1hbQmavpfn9CM5VqUNgTpY54VCJ9wqGiwvOgAA126o96+s+yyKYsSkZXyoFqlsVJE z//wTzKEAWhIBuPqxQrtj5mGx2O1XWXhbnJGlVPCE2CO7dcgiU8at5VlyRkXvyjGjFGh CdXvyXQkLI8+rsPn2aYH5cHFsZdwUO99MS72CrSjPuD6N8Ac5TKVWQFSTO09qmiqQsSt 5NYUy8drVnMC/Whkmpze6nowsfNdiXB0QZCP59LAnTlG7BBrp2uoURGfW+n2Z24VV3kT LAJg== X-Gm-Message-State: AOAM531jEgzS+fMXkqg8kwD400MzSAIaFgyWPFb8O3U51JIpKFXC2TOR f2DxSxbqMHJsQXKbYk5kT7hXbg== X-Google-Smtp-Source: ABdhPJwZnFECUz1kYZpnn0kXBg33+nbhBxPQKXwu/gMKWDAkeLm35/td7OQ9snPlZo5OzIzPvr/6zw== X-Received: by 2002:a1c:df04:: with SMTP id w4mr8085586wmg.66.1611834118959; Thu, 28 Jan 2021 03:41:58 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 11/25] hw/arm/armsse: Wire up clocks Date: Thu, 28 Jan 2021 11:41:31 +0000 Message-Id: <20210128114145.20536-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Create two input clocks on the ARMSSE devices, one for the normal MAINCLK, and one for the 32KHz S32KCLK, and wire these up to the appropriate devices. The old property-based clock frequency setting will remain in place until conversion is complete. This is a migration compatibility break for machines mps2-an505, mps2-an521, musca-a, musca-b1. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-12-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/armsse.h | 6 ++++++ hw/arm/armsse.c | 17 +++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 4860a793f4b..bfa1e79c4fe 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -37,6 +37,8 @@ * per-CPU identity and control register blocks * * QEMU interface: + * + Clock input "MAINCLK": clock for CPUs and most peripherals + * + Clock input "S32KCLK": slow 32KHz clock used for a few peripherals * + QOM property "memory" is a MemoryRegion containing the devices provi= ded * by the board model. * + QOM property "MAINCLK_FRQ" is the frequency of the main system clock @@ -103,6 +105,7 @@ #include "hw/misc/armsse-mhu.h" #include "hw/misc/unimp.h" #include "hw/or-irq.h" +#include "hw/clock.h" #include "hw/core/split-irq.h" #include "hw/cpu/cluster.h" #include "qom/object.h" @@ -209,6 +212,9 @@ struct ARMSSE { =20 uint32_t nsccfg; =20 + Clock *mainclk; + Clock *s32kclk; + /* Properties */ MemoryRegion *board_memory; uint32_t exp_numirq; diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index d2ba0459c44..4349ce9bfdb 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -21,6 +21,7 @@ #include "hw/arm/armsse.h" #include "hw/arm/boot.h" #include "hw/irq.h" +#include "hw/qdev-clock.h" =20 /* Format of the System Information block SYS_CONFIG register */ typedef enum SysConfigFormat { @@ -241,6 +242,9 @@ static void armsse_init(Object *obj) assert(info->sram_banks <=3D MAX_SRAM_BANKS); assert(info->num_cpus <=3D SSE_MAX_CPUS); =20 + s->mainclk =3D qdev_init_clock_in(DEVICE(s), "MAINCLK", NULL, NULL); + s->s32kclk =3D qdev_init_clock_in(DEVICE(s), "S32KCLK", NULL, NULL); + memory_region_init(&s->container, obj, "armsse-container", UINT64_MAX); =20 for (i =3D 0; i < info->num_cpus; i++) { @@ -711,6 +715,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) * map its upstream ends to the right place in the container. */ qdev_prop_set_uint32(DEVICE(&s->timer0), "pclk-frq", s->mainclk_frq); + qdev_connect_clock_in(DEVICE(&s->timer0), "pclk", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer0), errp)) { return; } @@ -721,6 +726,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) &error_abort); =20 qdev_prop_set_uint32(DEVICE(&s->timer1), "pclk-frq", s->mainclk_frq); + qdev_connect_clock_in(DEVICE(&s->timer1), "pclk", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer1), errp)) { return; } @@ -731,6 +737,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) &error_abort); =20 qdev_prop_set_uint32(DEVICE(&s->dualtimer), "pclk-frq", s->mainclk_frq= ); + qdev_connect_clock_in(DEVICE(&s->dualtimer), "TIMCLK", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->dualtimer), errp)) { return; } @@ -889,6 +896,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) * 0x4002f000: S32K timer */ qdev_prop_set_uint32(DEVICE(&s->s32ktimer), "pclk-frq", S32KCLK); + qdev_connect_clock_in(DEVICE(&s->s32ktimer), "pclk", s->s32kclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32ktimer), errp)) { return; } @@ -982,6 +990,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) qdev_get_gpio_in_named(DEVICE(&s->armv7m), "NMI"= , 0)); =20 qdev_prop_set_uint32(DEVICE(&s->s32kwatchdog), "wdogclk-frq", S32KCLK); + qdev_connect_clock_in(DEVICE(&s->s32kwatchdog), "WDOGCLK", s->s32kclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32kwatchdog), errp)) { return; } @@ -992,6 +1001,7 @@ static void armsse_realize(DeviceState *dev, Error **e= rrp) /* 0x40080000 .. 0x4008ffff : ARMSSE second Base peripheral region */ =20 qdev_prop_set_uint32(DEVICE(&s->nswatchdog), "wdogclk-frq", s->mainclk= _frq); + qdev_connect_clock_in(DEVICE(&s->nswatchdog), "WDOGCLK", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->nswatchdog), errp)) { return; } @@ -1000,6 +1010,7 @@ static void armsse_realize(DeviceState *dev, Error **= errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->nswatchdog), 0, 0x40081000); =20 qdev_prop_set_uint32(DEVICE(&s->swatchdog), "wdogclk-frq", s->mainclk_= frq); + qdev_connect_clock_in(DEVICE(&s->swatchdog), "WDOGCLK", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->swatchdog), errp)) { return; } @@ -1127,9 +1138,11 @@ static void armsse_idau_check(IDAUInterface *ii, uin= t32_t address, =20 static const VMStateDescription armsse_vmstate =3D { .name =3D "iotkit", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (VMStateField[]) { + VMSTATE_CLOCK(mainclk, ARMSSE), + VMSTATE_CLOCK(s32kclk, ARMSSE), VMSTATE_UINT32(nsccfg, ARMSSE), VMSTATE_END_OF_LIST() } --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834334; cv=none; d=zohomail.com; s=zohoarc; b=nVkl6Ile2U5UI7B0mViVFRQEcjUAm99gmyDVHjigEXE5zGuFO6OhoI0w3YgSeumpqWeKcOVp2YPOOVbEbVZFK2yDr+GH2A/n1KYQP016dhr/e4a8SItewO6xJZCBjPEVw1ejeoCsg83aBazYe/osGRLU7U1E8z/UKWY4z9RFT64= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834334; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=zzVeUuHknztplC3v0ZMbhPlrZqaBQlkBJqvUyi+S9Nc=; b=hWTslHyfolEYFsp7scPfQ/TWX+zGaGBFHXWD1eL1SUQnTsASOAERjVpfg/VOrhnWUv6qPxU1iW53oFxw8LN+LbalrqnkLiOYtVx3bUZajpBLOWcgezHlR5qdzbFG9tpTPRbFXxZYg1TfuyunPxO88fjvupIDDWKYxEdWWWu/ulA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834334070644.1522583025755; Thu, 28 Jan 2021 03:45:34 -0800 (PST) Received: from localhost ([::1]:39918 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55jo-0005Iy-LW for importer@patchew.org; Thu, 28 Jan 2021 06:45:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33798) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gd-0001SG-Dj for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:07 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:38289) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gX-00069C-AD for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:07 -0500 Received: by mail-wm1-x330.google.com with SMTP id y187so4304740wmd.3 for ; Thu, 28 Jan 2021 03:42:00 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:41:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zzVeUuHknztplC3v0ZMbhPlrZqaBQlkBJqvUyi+S9Nc=; b=e4+1aXrcpgs/7tq11fvtF0qHPKXtxuWZqIG+XTkZBwQEIFsWlFr2TNW6QgO9xCDXai xCRHG5M2g+4rKkk7R5aC4CMrNdmGpakSWBxGmZkJtUiYb+ulH9fTDh+90dCuHOepgYJQ WU17zPb9650ehmZeiHDVqWKM8BWiNQgQAZ9aGWTx20XXYkwEOC+emOTdVkpwEkeyHn63 K9Nz2FYlWSDvdGYkBA00rps6VyLnSqizoOtmVIgkMUFT1/9b5jCRdGfEisy1UWDIBPLo JZW1VWql7f2lTN7XSxDhJ047oNyYguH//2svox3C14eGfIZstrD+I5BZj0sNnNHI3bHn svEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zzVeUuHknztplC3v0ZMbhPlrZqaBQlkBJqvUyi+S9Nc=; b=JcIvaTZdZSWaEM6ao2lq2kbj2LqbgMspWrvnIRvO4lCBma2b6JRhTuwt1sGXCXcyf4 kKUmCdpkbqSzYcqzZjzYVJiFIXPA7Q9YO28h0IK5vRdd5quIptjhRkhisiOHvvCCnGCH bf9gL1BS9dQNK1UfJEtOaESbmYBQl9lPii4520oZK+/divRjURmJhLN7vsDXlws/YnEZ iDRyUcHVc+mSMg6DMkDjuoXcvonn3eVMYHbUGIpf4QAqarIaoWhdy0FBLE2QZYwj1YPe cus2Uk/SFTSmNa99KYNOKXAS2GsY4DUt7zNHgNQMwXGcFbjd94ee8dHkDGGIPZWD2B+q vM0Q== X-Gm-Message-State: AOAM533V/PsqUuFVBv998F2bmeaLqjLmysyUL0WPNcUm3fBGfXeHRiby Td2yVEmNN6nf7lzh0Yf+mlcUFw== X-Google-Smtp-Source: ABdhPJwNOtY47otdbGuJq5mXVe795Cc60m244Cs0xEyNnXlrFCwm+dDRMzA/UNLTe9Gzj2CIerz3Jw== X-Received: by 2002:a1c:408b:: with SMTP id n133mr8349999wma.103.1611834119976; Thu, 28 Jan 2021 03:41:59 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 12/25] hw/arm/mps2: Inline CMSDK_APB_TIMER creation Date: Thu, 28 Jan 2021 11:41:32 +0000 Message-Id: <20210128114145.20536-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) The old-style convenience function cmsdk_apb_timer_create() for creating CMSDK_APB_TIMER objects is used in only two places in mps2.c. Most of the rest of the code in that file uses the new "initialize in place" coding style. We want to connect up a Clock object which should be done between the object creation and realization; rather than adding a Clock* argument to the convenience function, convert the timer creation code in mps2.c to the same style as is used already for the watchdog, dualtimer and other devices, and delete the now-unused convenience function. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-13-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/timer/cmsdk-apb-timer.h | 21 --------------------- hw/arm/mps2.c | 18 ++++++++++++++++-- 2 files changed, 16 insertions(+), 23 deletions(-) diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-ap= b-timer.h index fc2aa97acac..54f7ec8c502 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -45,25 +45,4 @@ struct CMSDKAPBTimer { uint32_t intstatus; }; =20 -/** - * cmsdk_apb_timer_create - convenience function to create TYPE_CMSDK_APB_= TIMER - * @addr: location in system memory to map registers - * @pclk_frq: frequency in Hz of the PCLK clock (used for calculating baud= rate) - */ -static inline DeviceState *cmsdk_apb_timer_create(hwaddr addr, - qemu_irq timerint, - uint32_t pclk_frq) -{ - DeviceState *dev; - SysBusDevice *s; - - dev =3D qdev_new(TYPE_CMSDK_APB_TIMER); - s =3D SYS_BUS_DEVICE(dev); - qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - sysbus_realize_and_unref(s, &error_fatal); - sysbus_mmio_map(s, 0, addr); - sysbus_connect_irq(s, 0, timerint); - return dev; -} - #endif diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 9a8b23c64ce..f762d1b46af 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -83,6 +83,7 @@ struct MPS2MachineState { /* CMSDK APB subsystem */ CMSDKAPBDualTimer dualtimer; CMSDKAPBWatchdog watchdog; + CMSDKAPBTimer timer[2]; }; =20 #define TYPE_MPS2_MACHINE "mps2" @@ -330,8 +331,21 @@ static void mps2_common_init(MachineState *machine) } =20 /* CMSDK APB subsystem */ - cmsdk_apb_timer_create(0x40000000, qdev_get_gpio_in(armv7m, 8), SYSCLK= _FRQ); - cmsdk_apb_timer_create(0x40001000, qdev_get_gpio_in(armv7m, 9), SYSCLK= _FRQ); + for (i =3D 0; i < ARRAY_SIZE(mms->timer); i++) { + g_autofree char *name =3D g_strdup_printf("timer%d", i); + hwaddr base =3D 0x40000000 + i * 0x1000; + int irqno =3D 8 + i; + SysBusDevice *sbd; + + object_initialize_child(OBJECT(mms), name, &mms->timer[i], + TYPE_CMSDK_APB_TIMER); + sbd =3D SYS_BUS_DEVICE(&mms->timer[i]); + qdev_prop_set_uint32(DEVICE(&mms->timer[i]), "pclk-frq", SYSCLK_FR= Q); + sysbus_realize_and_unref(sbd, &error_fatal); + sysbus_mmio_map(sbd, 0, base); + sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(armv7m, irqno)); + } + object_initialize_child(OBJECT(mms), "dualtimer", &mms->dualtimer, TYPE_CMSDK_APB_DUALTIMER); qdev_prop_set_uint32(DEVICE(&mms->dualtimer), "pclk-frq", SYSCLK_FRQ); --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835147; cv=none; d=zohomail.com; s=zohoarc; b=kVSMxWysA4TgSJLYWS67IApiTNIBrBnsJnaCXTOaO5otyOzI1a2cIMoq/bZk7l/bujhr2P+DzHd1kzxbiKTPsaq1i2HEcJY0onZMgD+N4t1k2+/nl/FCpR1lYFB7UuEL1k8LKeiomof8IEoZFxbMgth5WD9LDuYCLfmJNR1X2EE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835147; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xRN3YGEBWk7hWGjfWYQ25vV7dydgRP+ZNx8pvaqAtbo=; b=Ei1fNAbYA701zHpr05F1Nu7b68zlU0PjjCq+DZcZlxLe5aGPb69Wh6AgJMTDBjKneh2y3McLmQw+nSBQfjMljCp+qPINMYHXTmE/8mwrljbdQagzTkaK/MObRTjCZ8nF8aFMlLAFP+e3WtbV03a9qTjaCToYBpeHLArHU7all9g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16118351473971023.7614866951069; Thu, 28 Jan 2021 03:59:07 -0800 (PST) Received: from localhost ([::1]:55902 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55x4-0006w7-Dt for importer@patchew.org; Thu, 28 Jan 2021 06:59:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33850) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55ge-0001VP-SI for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:10 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:40941) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gY-00069S-6V for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:08 -0500 Received: by mail-wr1-x433.google.com with SMTP id c12so5055458wrc.7 for ; Thu, 28 Jan 2021 03:42:01 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xRN3YGEBWk7hWGjfWYQ25vV7dydgRP+ZNx8pvaqAtbo=; b=QLzfGl/gsUVWZmRpP9wyWVS3NGPbItHdl8o3M545DlUsBIFJiwyOZd3nbbeBzKmP6q erUFt7BmfdiK9uiHkPtiqoglrHzmr+b4/7VScpVsCdyGNdO/VzcEN9K85f43cLabXd3L fzEBPO3RLszMZ6zPDjbqhQ8WkwKNcL5VsfI+UOzKWnp0mYtPgRpTQx3EnpGSvwqWYk45 VQlTFOy33GQakUxTJ+SpLao1Padump7xnQWaBpZDZK7xB5zkKvSzvfxtPMWc8dgN18O/ 0b7k7Gmmt+AbjKbpAk6sloEk6ky28zFbUkOSBpSCPWNj2AUSSKiKdfIDYpqpudBGX8LN ScMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xRN3YGEBWk7hWGjfWYQ25vV7dydgRP+ZNx8pvaqAtbo=; b=Vk+42qTOAVlXg3YMoMo+frG0VsrEx1dPpr5u+ecbosVlvBMQJxDFKJoz4fosSuKnY4 q4ajQ5NPaXC0VP/ia/EWcWyHKlE8J3tRQr3u5EsG1eeT2WCcd/SZOBBjQYMVeKEjNNtP pn5XPTyWwoHM/B2bvzt9CAjQ1o6qAsC7gIsy29UFrc9fDESp0+cwWpWg8A7wMhtNr5nU SzC1JTZOUVTF0MCUIvTCIBCgUdTqrpTaNRvnurKROVo+yXfrAI98H/X2cGAutLZ0opM0 3PUtLU18mASO3W2GJgByWsUbgi78M5bsTbvMF9HgYVPW5xlud06czozsgXrb3PNRikTJ bW9A== X-Gm-Message-State: AOAM530m6x0kPhgAN5LIesF451kDyeahYe2LC9LYDl9UUYPf0h59Er3m H8kxBvhetUfUOvJdFgbzb2sA2A== X-Google-Smtp-Source: ABdhPJxXiPmyZC/ktwQkNej3qbfXqdReqc2ajIzqDUWBJDF8j0i4KEMjzQrYzsN3Y361fxqiS7eO6w== X-Received: by 2002:adf:ba49:: with SMTP id t9mr15993891wrg.183.1611834120834; Thu, 28 Jan 2021 03:42:00 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 13/25] hw/arm/mps2: Create and connect SYSCLK Clock Date: Thu, 28 Jan 2021 11:41:33 +0000 Message-Id: <20210128114145.20536-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Create a fixed-frequency Clock object to be the SYSCLK, and wire it up to the devices that require it. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-14-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/mps2.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index f762d1b46af..cd1c215f941 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -46,6 +46,7 @@ #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/watchdog/cmsdk-apb-watchdog.h" +#include "hw/qdev-clock.h" #include "qom/object.h" =20 typedef enum MPS2FPGAType { @@ -84,6 +85,7 @@ struct MPS2MachineState { CMSDKAPBDualTimer dualtimer; CMSDKAPBWatchdog watchdog; CMSDKAPBTimer timer[2]; + Clock *sysclk; }; =20 #define TYPE_MPS2_MACHINE "mps2" @@ -140,6 +142,10 @@ static void mps2_common_init(MachineState *machine) exit(EXIT_FAILURE); } =20 + /* This clock doesn't need migration because it is fixed-frequency */ + mms->sysclk =3D clock_new(OBJECT(machine), "SYSCLK"); + clock_set_hz(mms->sysclk, SYSCLK_FRQ); + /* The FPGA images have an odd combination of different RAMs, * because in hardware they are different implementations and * connected to different buses, giving varying performance/size @@ -341,6 +347,7 @@ static void mps2_common_init(MachineState *machine) TYPE_CMSDK_APB_TIMER); sbd =3D SYS_BUS_DEVICE(&mms->timer[i]); qdev_prop_set_uint32(DEVICE(&mms->timer[i]), "pclk-frq", SYSCLK_FR= Q); + qdev_connect_clock_in(DEVICE(&mms->timer[i]), "pclk", mms->sysclk); sysbus_realize_and_unref(sbd, &error_fatal); sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(armv7m, irqno)); @@ -349,6 +356,7 @@ static void mps2_common_init(MachineState *machine) object_initialize_child(OBJECT(mms), "dualtimer", &mms->dualtimer, TYPE_CMSDK_APB_DUALTIMER); qdev_prop_set_uint32(DEVICE(&mms->dualtimer), "pclk-frq", SYSCLK_FRQ); + qdev_connect_clock_in(DEVICE(&mms->dualtimer), "TIMCLK", mms->sysclk); sysbus_realize(SYS_BUS_DEVICE(&mms->dualtimer), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(&mms->dualtimer), 0, qdev_get_gpio_in(armv7m, 10)); @@ -356,6 +364,7 @@ static void mps2_common_init(MachineState *machine) object_initialize_child(OBJECT(mms), "watchdog", &mms->watchdog, TYPE_CMSDK_APB_WATCHDOG); qdev_prop_set_uint32(DEVICE(&mms->watchdog), "wdogclk-frq", SYSCLK_FRQ= ); + qdev_connect_clock_in(DEVICE(&mms->watchdog), "WDOGCLK", mms->sysclk); sysbus_realize(SYS_BUS_DEVICE(&mms->watchdog), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(&mms->watchdog), 0, qdev_get_gpio_in_named(armv7m, "NMI", 0)); --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834766; cv=none; d=zohomail.com; s=zohoarc; b=dRVbPXb7k86VGGFfCLwrkCl518HefPGNOlm8vsjQHZwZafNrsd2X603Nbu0npfRzLqiu6WSAvcQ8POgxrolnWWVaObX1etxWchOe31s+VBhDDY5dLJCnYf0g1krGb5GY8UKJJ2d0y4y+bzpYawBheX63qJJTscI8Lzgbu896gd0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834766; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=O5f8WBqu2YhqzoSGVMquOcbgjjk1Qu9h4qYOyq13Wm8=; b=QPYK6qeEjbLGQ74f26hORqIIJuLkOLpzMfQNcpS4M9Um0zD2LNHiNZnd3FZ/lOQuk3aDRl9f8iLqZd/G/4gX7/98MtqIIOLJBMKcxAlyIdHM2O/ajjNsU08iiNBy/P3cFx+a8ngM4qKKWFV1pg6C5RlrzBrhM9uyxxhFnHWKSPE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834766435764.3368959071116; Thu, 28 Jan 2021 03:52:46 -0800 (PST) Received: from localhost ([::1]:36976 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55qv-0007LW-6H for importer@patchew.org; Thu, 28 Jan 2021 06:52:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33894) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gg-0001WO-PB for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:12 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:41724) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gZ-00069m-28 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:10 -0500 Received: by mail-wr1-x42f.google.com with SMTP id p15so5043445wrq.8 for ; Thu, 28 Jan 2021 03:42:02 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O5f8WBqu2YhqzoSGVMquOcbgjjk1Qu9h4qYOyq13Wm8=; b=b7J5LXFKzrSQ8q0SFLTNwnCpT61vqHegyEGXdmPMzFYFIaAHWnFMikf8pd8GrRvDY/ 4txoeAtk/Gc8WD3QQV1mZstHhd4tcZZVhsVldeGFhr76I7yb/sfK+1nbCHGEZozoyPFm IGhCt9QgEgfRnULivLaW/QOtOf9bfUxgCtXFppc19CIVeE/S7i7whnvFoAUagKsGZhXR 4mY/ypZq857oxXi6CJ5Asn79aD4H6qncMe4P1XrA8L7Pn6wLXD15dqHVF/x9nd0vBTg2 kOIWz17ku8QRgTlAc0vdYvEs8YoHTgH8ztu9S/ZHc0rwZksh88lkA2ALmE6DmjmRGO/G G/0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=O5f8WBqu2YhqzoSGVMquOcbgjjk1Qu9h4qYOyq13Wm8=; b=CcLHTfNN/N+QPBcwuUvp9cggITYfpnoqCzz1uPoLApkehqxiE1svvFBss6WMu6xRqn HzZ61jqtdfJG/rAMNXeMBEkTlLI/NK+n9NPt/mk4CaPHXXILw7m/X0p7uitsV7RXO+7S ZNU6JqH3Itn9IWo9ZSj0amYCQd2r6k4C92CfEr0+Z2KDe7R/TVMZKJGqMqNQYYznEJ2r pbsNFmTCwoOnptteCDplDiwR3CsDEr36CH3eshh/NnLfp42YomedtoUWJW0JPw0BZffP 3CulmR1R3w/cED0a1Co/NOlzlBoXD+aK7/n5g+PsJLq9v14AxzqHUKhdB0DjXELerEle y3ag== X-Gm-Message-State: AOAM531J0alQse0MiHXpJOm3Y627Dq4EST4AT+1MF9HgvhTg+lL4Jnce pEFaI901PN4eZIZEPXetFrr/UwB7c61g1Q== X-Google-Smtp-Source: ABdhPJxuQYsXHTew1A+WhgrvfoSifSQ+yd/uvsMPSaEvxDk63vV6O6p+pplkBThTdav7f0pHn0Xg5A== X-Received: by 2002:adf:f452:: with SMTP id f18mr15394981wrp.11.1611834121687; Thu, 28 Jan 2021 03:42:01 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 14/25] hw/arm/mps2-tz: Create and connect ARMSSE Clocks Date: Thu, 28 Jan 2021 11:41:34 +0000 Message-Id: <20210128114145.20536-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Create and connect the two clocks needed by the ARMSSE. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-15-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/mps2-tz.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 6a9eed9022a..7acdf490f28 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -62,6 +62,7 @@ #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/core/split-irq.h" +#include "hw/qdev-clock.h" #include "qom/object.h" =20 #define MPS2TZ_NUMIRQ 92 @@ -100,6 +101,8 @@ struct MPS2TZMachineState { qemu_or_irq uart_irq_orgate; DeviceState *lan9118; SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ]; + Clock *sysclk; + Clock *s32kclk; }; =20 #define TYPE_MPS2TZ_MACHINE "mps2tz" @@ -110,6 +113,8 @@ OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineCl= ass, MPS2TZ_MACHINE) =20 /* Main SYSCLK frequency in Hz */ #define SYSCLK_FRQ 20000000 +/* Slow 32Khz S32KCLK frequency in Hz */ +#define S32KCLK_FRQ (32 * 1000) =20 /* Create an alias of an entire original MemoryRegion @orig * located at @base in the memory map. @@ -396,6 +401,12 @@ static void mps2tz_common_init(MachineState *machine) exit(EXIT_FAILURE); } =20 + /* These clocks don't need migration because they are fixed-frequency = */ + mms->sysclk =3D clock_new(OBJECT(machine), "SYSCLK"); + clock_set_hz(mms->sysclk, SYSCLK_FRQ); + mms->s32kclk =3D clock_new(OBJECT(machine), "S32KCLK"); + clock_set_hz(mms->s32kclk, S32KCLK_FRQ); + object_initialize_child(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit, mmc->armsse_type); iotkitdev =3D DEVICE(&mms->iotkit); @@ -403,6 +414,8 @@ static void mps2tz_common_init(MachineState *machine) OBJECT(system_memory), &error_abort); qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", MPS2TZ_NUMIRQ); qdev_prop_set_uint32(iotkitdev, "MAINCLK_FRQ", SYSCLK_FRQ); + qdev_connect_clock_in(iotkitdev, "MAINCLK", mms->sysclk); + qdev_connect_clock_in(iotkitdev, "S32KCLK", mms->s32kclk); sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal); =20 /* --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834861; cv=none; d=zohomail.com; s=zohoarc; b=mVx2Ctz+iSsxnhFp/7KFdj2AGGlt9o8biqAkC/jFK+fE74f5gqm+o/7Ul+qRF+kJB59+ErrDaj913RKeY0hh8BdLUiAhS13WDBMHb9313qr7sWhOyfqZM5FPiYYn3RnwIS/VVQqwdI03udXo6lbFZX+gcoUVnaBpyMPjhK3hYQE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834861; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Bzo+HlCWYd6RpRkmDCS86OIn4z0/YeV5nKkyTCJsudM=; b=bvBKNMbC8ak6nzMFEPctp66zIFejFB6Fl9rh37+quiCQG272VFZIJiWgdCIHMAbthLJrrcYjH6YAKJYs3qgxN3cQVKAYP2SEBPJw5Sh1O4G2vr/LyQ50sEAqTdwAt5WKPPvfD4bUc23ziUbcTu470rdI+n5CoIXYNUBn/JCDMTc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834861676394.7812244063905; Thu, 28 Jan 2021 03:54:21 -0800 (PST) Received: from localhost ([::1]:42458 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55sS-0001FG-Gt for importer@patchew.org; Thu, 28 Jan 2021 06:54:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34014) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gp-0001c5-0h for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:19 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:51596) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gZ-0006Au-RM for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:17 -0500 Received: by mail-wm1-x32e.google.com with SMTP id m2so4050556wmm.1 for ; Thu, 28 Jan 2021 03:42:03 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Bzo+HlCWYd6RpRkmDCS86OIn4z0/YeV5nKkyTCJsudM=; b=jd1XBWvnfZt/mY8Al2ItoON0bBxtRfeonyw5CKEuAiwL8D5ZuaVumNIUedDdWRLikU l0pYMyoi9FB97cVyxwoTblG24pruA5jOsCQxTpUKx28v13MoVzW+KV7FOSjkgbugpdZO wOSlyvL8kIJ2c7OFWoiJFDDUZuEn5fIy2SJ9zhIzsthxOL2a0QZyEi6q8tWOasAcSWtd rxcGAFKblE/02I1azeDVcoKu9LzbRqwxbu9AmxCLj/YhqWsfddzrHzFqM7uEN0Uk8w7j NhHXWqKIwU79wJq7aAG/tzfJH+lLLImJPa5+6I48ONKX1cQU6sGbAscryf3dhVlx4X6K tEGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Bzo+HlCWYd6RpRkmDCS86OIn4z0/YeV5nKkyTCJsudM=; b=ZmzNUkPGNd/ShnS73X89Tq8o0fNRhZrspPZ6BhsTxG3Vb3gNLTKQzueVRjAefQOzO5 isQOh9cXUaEFwKhyvB3aEUEbd1XFPqt9UyUKBR8VdV7jG2wQXpZYw4xTd/d4J9q9UJ44 S2OmaW0xzHCmwQqDQFalFe2GShMeX+Yce1zgsYWNh98T/odBoVemlGtSLwhm1MstC4b6 Zpbfg9Gz9gdWtX6+9W/oT/ny7WyIscjRPXxPJwTkTPX/iQg98DICpMF9KjrIIK/J2EDN lqI6uM1c2jaLzKts7FGoBq+D5X9X00AdsS76LF8nmohK4lCeFMl/vCruf9Sd3DqTpb+v adHA== X-Gm-Message-State: AOAM530xyMQbw4Nqx5bnGpXK+YyaoQeE8PSzkvZDK/sv4AftRVlsaK1i GD8mtuOLWlnRE24Rzl3VXhJSogMPJlf2jw== X-Google-Smtp-Source: ABdhPJwivJx+QO2EjJCZqgLoHqQ8shgdau+HaSqkvFEZeiRG6Q4L2O7pL1yKbyY5bNkQmMdqnACuyA== X-Received: by 2002:a1c:9d08:: with SMTP id g8mr8280761wme.112.1611834122533; Thu, 28 Jan 2021 03:42:02 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 15/25] hw/arm/musca: Create and connect ARMSSE Clocks Date: Thu, 28 Jan 2021 11:41:35 +0000 Message-Id: <20210128114145.20536-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Create and connect the two clocks needed by the ARMSSE. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-16-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/musca.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index d82bef11cf2..a9292482a06 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -33,6 +33,7 @@ #include "hw/misc/tz-ppc.h" #include "hw/misc/unimp.h" #include "hw/rtc/pl031.h" +#include "hw/qdev-clock.h" #include "qom/object.h" =20 #define MUSCA_NUMIRQ_MAX 96 @@ -82,6 +83,8 @@ struct MuscaMachineState { UnimplementedDeviceState sdio; UnimplementedDeviceState gpio; UnimplementedDeviceState cryptoisland; + Clock *sysclk; + Clock *s32kclk; }; =20 #define TYPE_MUSCA_MACHINE "musca" @@ -96,6 +99,8 @@ OBJECT_DECLARE_TYPE(MuscaMachineState, MuscaMachineClass,= MUSCA_MACHINE) * don't model that in our SSE-200 model yet. */ #define SYSCLK_FRQ 40000000 +/* Slow 32Khz S32KCLK frequency in Hz */ +#define S32KCLK_FRQ (32 * 1000) =20 static qemu_irq get_sse_irq_in(MuscaMachineState *mms, int irqno) { @@ -367,6 +372,11 @@ static void musca_init(MachineState *machine) exit(1); } =20 + mms->sysclk =3D clock_new(OBJECT(machine), "SYSCLK"); + clock_set_hz(mms->sysclk, SYSCLK_FRQ); + mms->s32kclk =3D clock_new(OBJECT(machine), "S32KCLK"); + clock_set_hz(mms->s32kclk, S32KCLK_FRQ); + object_initialize_child(OBJECT(machine), "sse-200", &mms->sse, TYPE_SSE200); ssedev =3D DEVICE(&mms->sse); @@ -376,6 +386,8 @@ static void musca_init(MachineState *machine) qdev_prop_set_uint32(ssedev, "init-svtor", mmc->init_svtor); qdev_prop_set_uint32(ssedev, "SRAM_ADDR_WIDTH", mmc->sram_addr_width); qdev_prop_set_uint32(ssedev, "MAINCLK_FRQ", SYSCLK_FRQ); + qdev_connect_clock_in(ssedev, "MAINCLK", mms->sysclk); + qdev_connect_clock_in(ssedev, "S32KCLK", mms->s32kclk); /* * Musca-A takes the default SSE-200 FPU/DSP settings (ie no for * CPU0 and yes for CPU1); Musca-B1 explicitly enables them for CPU0. --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834504; cv=none; d=zohomail.com; s=zohoarc; b=ifywvEL4CvL1GAKQWV1C0q+coUzW9P5hfPlUsxVZJ5eqDH5RV/QXYD3fouL+3/xvKVsvJKthFE+mc7Ecb4AUGqxGkjtP4F7l+QArwh/ULVk7FUCTPmnytP0uKEUT0tCoYGyGeL/KF534HtUwZ5eqQMJARZ1a8sIi0yGuX0Ai7js= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834504; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LwvLOtKV5yAzTDJrixEESRLdwfXbvmLiIYp4SPJcLMI=; b=D0058j7D8haA5xmXfTL9gVdNhGyqfeLSLthSSw4/OREnq3GnODcfwBXOqwDsGsj4m54ksPm4AAe9sV2L9iGHCorC8So51nSsra2owHvi2HpxvKy3YkTO2haCZLzv4DHmZ1QYYSr/ncfIZNMoYWJuSDT5UenskHCSt+eHBoHqBKk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834504461353.9029063960795; Thu, 28 Jan 2021 03:48:24 -0800 (PST) Received: from localhost ([::1]:49796 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55mh-0000yE-7z for importer@patchew.org; Thu, 28 Jan 2021 06:48:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33932) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gk-0001Xt-3f for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:14 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:33138) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gb-0006BF-5L for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:13 -0500 Received: by mail-wm1-x332.google.com with SMTP id s24so4983293wmj.0 for ; Thu, 28 Jan 2021 03:42:04 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LwvLOtKV5yAzTDJrixEESRLdwfXbvmLiIYp4SPJcLMI=; b=LXJ3IwdsJPIOEp9hHMKnbhdlN0NedUIcvxzJ8yY5kfq6y5XBoV8baEvJfpILtYawF6 gGcKYoTSj9Rw+sKpJGhcgT6Hf+/p6lGaZGfrB33oEiRpXFicIWcUR5bZble/0/aEdlTv RDGgAVunx9p1bavoe5rvthaKtwto3goQFg28n7z+4y0QnKeMXmhIEDujP0tncw0T6M36 RbZwt8YTUNO46usdG2kGarkg6kFchBAbzBV+Kgk3fmfQ1ZTf3lLCFd/sRkD63r7mTutv 8bO20Ywrg/zZb3jGvFuIKeBoV0BQsiVQ9Dm8hgZUSRdrs4jL3yAf4jtoRHwJsR+TF7vY MlwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LwvLOtKV5yAzTDJrixEESRLdwfXbvmLiIYp4SPJcLMI=; b=kpvyjImB+dK5HuRfkay4TGTjjR3p212btfhofIsx7Me4MGvSOe6KgA3KX05ohKSFqu UYVyYPZ8uzmh+0QLhHxLofDy2KtxAUiEBpoKSxpv4FtdACBIoFjwPxTBk6WyC+xla+oC CLi/msLBNQFRQ2cE1K2QJUJRCjfxEjtkLPPM7NR36D+LqjEzhdrXe4P15pH/RZmEtQun uaHYbdJ5Hg8tWQDSYxq2cwbbn8nhgMlh3FstbyW8+4LT4VxQSa/FC1a51Y0TdVq7gNUY +BvWwphNARmQww9cFWSqWna4Nb08CeqOGV80BjPV9bDeUtkgZKIIxeEqNG74pYGAXIMT qAFQ== X-Gm-Message-State: AOAM533D5UaysWHMEjW1r2amTqwILEcYx5QJ/ZC74nOZmNgQRYIQhDXA tCV+r2GYaWkiVPIARBhRgZUS+g== X-Google-Smtp-Source: ABdhPJxAWi/QP3//I7OM8fL8etoUZQkeIo02R46PYL3wl2RZw4Pm/jNqP2/qcGN2dftDqj2IBrozDQ== X-Received: by 2002:a05:600c:28b:: with SMTP id 11mr3103900wmk.69.1611834123589; Thu, 28 Jan 2021 03:42:03 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 16/25] hw/arm/stellaris: Convert SSYS to QOM device Date: Thu, 28 Jan 2021 11:41:36 +0000 Message-Id: <20210128114145.20536-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Convert the SSYS code in the Stellaris boards (which encapsulates the system registers) to a proper QOM device. This will provide us with somewhere to put the output Clock whose frequency depends on the setting of the PLL configuration registers. This is a migration compatibility break for lm3s811evb, lm3s6965evb. We use 3-phase reset here because the Clock will need to propagate its value in the hold phase. For the moment we reset the device during the board creation so that the system_clock_scale global gets set; this will be removed in a subsequent commit. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20210121190622.22000-17-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/stellaris.c | 132 ++++++++++++++++++++++++++++++++++++--------- 1 file changed, 107 insertions(+), 25 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 652823195b1..0194ede2fe0 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -357,7 +357,12 @@ static void stellaris_gptm_realize(DeviceState *dev, E= rror **errp) =20 /* System controller. */ =20 -typedef struct { +#define TYPE_STELLARIS_SYS "stellaris-sys" +OBJECT_DECLARE_SIMPLE_TYPE(ssys_state, STELLARIS_SYS) + +struct ssys_state { + SysBusDevice parent_obj; + MemoryRegion iomem; uint32_t pborctl; uint32_t ldopctl; @@ -371,11 +376,18 @@ typedef struct { uint32_t dcgc[3]; uint32_t clkvclr; uint32_t ldoarst; + qemu_irq irq; + /* Properties (all read-only registers) */ uint32_t user0; uint32_t user1; - qemu_irq irq; - stellaris_board_info *board; -} ssys_state; + uint32_t did0; + uint32_t did1; + uint32_t dc0; + uint32_t dc1; + uint32_t dc2; + uint32_t dc3; + uint32_t dc4; +}; =20 static void ssys_update(ssys_state *s) { @@ -430,7 +442,7 @@ static uint32_t pllcfg_fury[16] =3D { =20 static int ssys_board_class(const ssys_state *s) { - uint32_t did0 =3D s->board->did0; + uint32_t did0 =3D s->did0; switch (did0 & DID0_VER_MASK) { case DID0_VER_0: return DID0_CLASS_SANDSTORM; @@ -456,19 +468,19 @@ static uint64_t ssys_read(void *opaque, hwaddr offset, =20 switch (offset) { case 0x000: /* DID0 */ - return s->board->did0; + return s->did0; case 0x004: /* DID1 */ - return s->board->did1; + return s->did1; case 0x008: /* DC0 */ - return s->board->dc0; + return s->dc0; case 0x010: /* DC1 */ - return s->board->dc1; + return s->dc1; case 0x014: /* DC2 */ - return s->board->dc2; + return s->dc2; case 0x018: /* DC3 */ - return s->board->dc3; + return s->dc3; case 0x01c: /* DC4 */ - return s->board->dc4; + return s->dc4; case 0x030: /* PBORCTL */ return s->pborctl; case 0x034: /* LDOPCTL */ @@ -646,9 +658,9 @@ static const MemoryRegionOps ssys_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 -static void ssys_reset(void *opaque) +static void stellaris_sys_reset_enter(Object *obj, ResetType type) { - ssys_state *s =3D (ssys_state *)opaque; + ssys_state *s =3D STELLARIS_SYS(obj); =20 s->pborctl =3D 0x7ffd; s->rcc =3D 0x078e3ac0; @@ -661,9 +673,19 @@ static void ssys_reset(void *opaque) s->rcgc[0] =3D 1; s->scgc[0] =3D 1; s->dcgc[0] =3D 1; +} + +static void stellaris_sys_reset_hold(Object *obj) +{ + ssys_state *s =3D STELLARIS_SYS(obj); + ssys_calculate_system_clock(s); } =20 +static void stellaris_sys_reset_exit(Object *obj) +{ +} + static int stellaris_sys_post_load(void *opaque, int version_id) { ssys_state *s =3D opaque; @@ -695,27 +717,66 @@ static const VMStateDescription vmstate_stellaris_sys= =3D { } }; =20 +static Property stellaris_sys_properties[] =3D { + DEFINE_PROP_UINT32("user0", ssys_state, user0, 0), + DEFINE_PROP_UINT32("user1", ssys_state, user1, 0), + DEFINE_PROP_UINT32("did0", ssys_state, did0, 0), + DEFINE_PROP_UINT32("did1", ssys_state, did1, 0), + DEFINE_PROP_UINT32("dc0", ssys_state, dc0, 0), + DEFINE_PROP_UINT32("dc1", ssys_state, dc1, 0), + DEFINE_PROP_UINT32("dc2", ssys_state, dc2, 0), + DEFINE_PROP_UINT32("dc3", ssys_state, dc3, 0), + DEFINE_PROP_UINT32("dc4", ssys_state, dc4, 0), + DEFINE_PROP_END_OF_LIST() +}; + +static void stellaris_sys_instance_init(Object *obj) +{ + ssys_state *s =3D STELLARIS_SYS(obj); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(s); + + memory_region_init_io(&s->iomem, obj, &ssys_ops, s, "ssys", 0x00001000= ); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq); +} + static int stellaris_sys_init(uint32_t base, qemu_irq irq, stellaris_board_info * board, uint8_t *macaddr) { - ssys_state *s; + DeviceState *dev =3D qdev_new(TYPE_STELLARIS_SYS); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); =20 - s =3D g_new0(ssys_state, 1); - s->irq =3D irq; - s->board =3D board; /* Most devices come preprogrammed with a MAC address in the user data= . */ - s->user0 =3D macaddr[0] | (macaddr[1] << 8) | (macaddr[2] << 16); - s->user1 =3D macaddr[3] | (macaddr[4] << 8) | (macaddr[5] << 16); + qdev_prop_set_uint32(dev, "user0", + macaddr[0] | (macaddr[1] << 8) | (macaddr[2] << 1= 6)); + qdev_prop_set_uint32(dev, "user1", + macaddr[3] | (macaddr[4] << 8) | (macaddr[5] << 1= 6)); + qdev_prop_set_uint32(dev, "did0", board->did0); + qdev_prop_set_uint32(dev, "did1", board->did1); + qdev_prop_set_uint32(dev, "dc0", board->dc0); + qdev_prop_set_uint32(dev, "dc1", board->dc1); + qdev_prop_set_uint32(dev, "dc2", board->dc2); + qdev_prop_set_uint32(dev, "dc3", board->dc3); + qdev_prop_set_uint32(dev, "dc4", board->dc4); + + sysbus_realize_and_unref(sbd, &error_fatal); + sysbus_mmio_map(sbd, 0, base); + sysbus_connect_irq(sbd, 0, irq); + + /* + * Normally we should not be resetting devices like this during + * board creation. For the moment we need to do so, because + * system_clock_scale will only get set when the STELLARIS_SYS + * device is reset, and we need its initial value to pass to + * the watchdog device. This hack can be removed once the + * watchdog has been converted to use a Clock input instead. + */ + device_cold_reset(dev); =20 - memory_region_init_io(&s->iomem, NULL, &ssys_ops, s, "ssys", 0x0000100= 0); - memory_region_add_subregion(get_system_memory(), base, &s->iomem); - ssys_reset(s); - vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_stellaris_sys= , s); return 0; } =20 - /* I2C controller. */ =20 #define TYPE_STELLARIS_I2C "stellaris-i2c" @@ -1553,11 +1614,32 @@ static const TypeInfo stellaris_adc_info =3D { .class_init =3D stellaris_adc_class_init, }; =20 +static void stellaris_sys_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + dc->vmsd =3D &vmstate_stellaris_sys; + rc->phases.enter =3D stellaris_sys_reset_enter; + rc->phases.hold =3D stellaris_sys_reset_hold; + rc->phases.exit =3D stellaris_sys_reset_exit; + device_class_set_props(dc, stellaris_sys_properties); +} + +static const TypeInfo stellaris_sys_info =3D { + .name =3D TYPE_STELLARIS_SYS, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(ssys_state), + .instance_init =3D stellaris_sys_instance_init, + .class_init =3D stellaris_sys_class_init, +}; + static void stellaris_register_types(void) { type_register_static(&stellaris_i2c_info); type_register_static(&stellaris_gptm_info); type_register_static(&stellaris_adc_info); + type_register_static(&stellaris_sys_info); } =20 type_init(stellaris_register_types) --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835438; cv=none; d=zohomail.com; s=zohoarc; b=DQWclSd9dg2jEhLg4DeZXi3ms114fo0koFAwN13GInhX2bwvvcijIj/j01b+Sd7Li6BaiJ6KfOs59Gs20r7QLryiAE4HtaQ1tM0JcSiab3MHna15kO7F5dIw8UR4k7ZM6Nfla7fx2d04Np83ZDDMeFnHPQxos9GXHbq94O5FgPA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835438; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Nifpo3xw4kmKoRcteNDK5FWNa7gwn40E7uhxQ3t57k8=; b=ekD4HxgQewYsAsdYwRwCoaS13Vm0LBeTWa3UWj1kTcUGJi3TMSOTcMsCET7qiC6yssq1qLi71Az3XeUJjQuxZUIcNL2bHQZuXfg6rDRphjrattbpwX1JBO8lWemY80C8qyPi5e6sogPtknvuQorEqsP0bwGrg1JerPBsgDefaeE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835438571445.1370236805021; Thu, 28 Jan 2021 04:03:58 -0800 (PST) Received: from localhost ([::1]:34552 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l561l-0001qf-3C for importer@patchew.org; Thu, 28 Jan 2021 07:03:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33996) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55go-0001by-0T for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:18 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:33199) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gc-0006Bi-61 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:17 -0500 Received: by mail-wr1-x42f.google.com with SMTP id 7so5083267wrz.0 for ; Thu, 28 Jan 2021 03:42:05 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Nifpo3xw4kmKoRcteNDK5FWNa7gwn40E7uhxQ3t57k8=; b=DEigW+LNQIRdeoxucN046sw1VoXfBRM18pNoo8A6+BHBR9TUK5qeF4dlxRWWzjEr7H 80y6KtnhiYPa0VXTBE3brhlyA6Mz41OerMSKnbP4viPb8ag18pJprkYqaTFtzhUA50tT 4yHB4CnwTurld1flzO8A+KASgq1gbsAn/hD46StFPyhcd3eHsnPrWSIqq4HCzMQ8dnS/ SczOZfcvG5EdUfVv7PSYi7NK1JRSEHxD313FvBh3yxfEbv7gFUeeb0khhseuYCrAvyd8 9QotK1BHOwTp7hUluDw2BVgledfJHFZe8FuYWCLw8BhHn1FvGpprJhG2/PGMWU4CyOE0 ws9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Nifpo3xw4kmKoRcteNDK5FWNa7gwn40E7uhxQ3t57k8=; b=lgTkOmFF/Orn86MGW+J1y0fZvNryt/kk9ER/Wb8IuDMUIvjrk3wFhYtSdozP7DsIgD 60Z/hUBkTJwI9RHFfLuYbLrRWnYJeuU0wbAZ445c60Has4lltTvOwp6emflOiBuhWFcW 9rfZ6e3a2fI2J37EH6IoA7TqA0J17tO4Ntzqr029nMRXu5lFGmW7Nr9rXToGmKo88V+6 FIdxptTr2X75cIs89xTG1Wr48obvjBxUV8lT4PuXy61Vz5h2JwzLs5FAfgIpRZssWcdL 7o+MVmRYM1CkPnsfPIJbLkTVutH7QaSlhyoi4AYd9sYrs1CXXCGFZklS/OiIp2AXFnRq YJ1Q== X-Gm-Message-State: AOAM530fvF/96zfeBEGjVq5+oxE6iDR361lTaqe7w/AB5Xqo9TpoNoxD a2kdgmy9319ZDnjPQFKl/BaBNQ== X-Google-Smtp-Source: ABdhPJzkyTfPAsYlxliSe0yoD7OwC7tGzsvgQaRhbOudnvr9zFibTPWHPqPfdK6lD8w/NHDnSc/4gA== X-Received: by 2002:adf:c6c1:: with SMTP id c1mr6580310wrh.326.1611834124537; Thu, 28 Jan 2021 03:42:04 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 17/25] hw/arm/stellaris: Create Clock input for watchdog Date: Thu, 28 Jan 2021 11:41:37 +0000 Message-Id: <20210128114145.20536-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Create and connect the Clock input for the watchdog device on the Stellaris boards. Because the Stellaris boards model the ability to change the clock rate by programming PLL registers, we have to create an output Clock on the ssys_state device and wire it up to the watchdog. Note that the old comment on ssys_calculate_system_clock() got the units wrong -- system_clock_scale is in nanoseconds, not milliseconds. Improve the commentary to clarify how we are calculating the period. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20210121190622.22000-18-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/stellaris.c | 43 +++++++++++++++++++++++++++++++------------ 1 file changed, 31 insertions(+), 12 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 0194ede2fe0..9b67c739ef2 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -26,6 +26,7 @@ #include "hw/watchdog/cmsdk-apb-watchdog.h" #include "migration/vmstate.h" #include "hw/misc/unimp.h" +#include "hw/qdev-clock.h" #include "cpu.h" #include "qom/object.h" =20 @@ -377,6 +378,7 @@ struct ssys_state { uint32_t clkvclr; uint32_t ldoarst; qemu_irq irq; + Clock *sysclk; /* Properties (all read-only registers) */ uint32_t user0; uint32_t user1; @@ -555,15 +557,26 @@ static bool ssys_use_rcc2(ssys_state *s) } =20 /* - * Caculate the sys. clock period in ms. + * Calculate the system clock period. We only want to propagate + * this change to the rest of the system if we're not being called + * from migration post-load. */ -static void ssys_calculate_system_clock(ssys_state *s) +static void ssys_calculate_system_clock(ssys_state *s, bool propagate_cloc= k) { + /* + * SYSDIV field specifies divisor: 0 =3D=3D /1, 1 =3D=3D /2, etc. Inp= ut + * clock is 200MHz, which is a period of 5 ns. Dividing the clock + * frequency by X is the same as multiplying the period by X. + */ if (ssys_use_rcc2(s)) { system_clock_scale =3D 5 * (((s->rcc2 >> 23) & 0x3f) + 1); } else { system_clock_scale =3D 5 * (((s->rcc >> 23) & 0xf) + 1); } + clock_set_ns(s->sysclk, system_clock_scale); + if (propagate_clock) { + clock_propagate(s->sysclk); + } } =20 static void ssys_write(void *opaque, hwaddr offset, @@ -598,7 +611,7 @@ static void ssys_write(void *opaque, hwaddr offset, s->int_status |=3D (1 << 6); } s->rcc =3D value; - ssys_calculate_system_clock(s); + ssys_calculate_system_clock(s, true); break; case 0x070: /* RCC2 */ if (ssys_board_class(s) =3D=3D DID0_CLASS_SANDSTORM) { @@ -610,7 +623,7 @@ static void ssys_write(void *opaque, hwaddr offset, s->int_status |=3D (1 << 6); } s->rcc2 =3D value; - ssys_calculate_system_clock(s); + ssys_calculate_system_clock(s, true); break; case 0x100: /* RCGC0 */ s->rcgc[0] =3D value; @@ -679,7 +692,8 @@ static void stellaris_sys_reset_hold(Object *obj) { ssys_state *s =3D STELLARIS_SYS(obj); =20 - ssys_calculate_system_clock(s); + /* OK to propagate clocks from the hold phase */ + ssys_calculate_system_clock(s, true); } =20 static void stellaris_sys_reset_exit(Object *obj) @@ -690,7 +704,7 @@ static int stellaris_sys_post_load(void *opaque, int ve= rsion_id) { ssys_state *s =3D opaque; =20 - ssys_calculate_system_clock(s); + ssys_calculate_system_clock(s, false); =20 return 0; } @@ -713,6 +727,7 @@ static const VMStateDescription vmstate_stellaris_sys = =3D { VMSTATE_UINT32_ARRAY(dcgc, ssys_state, 3), VMSTATE_UINT32(clkvclr, ssys_state), VMSTATE_UINT32(ldoarst, ssys_state), + /* No field for sysclk -- handled in post-load instead */ VMSTATE_END_OF_LIST() } }; @@ -738,11 +753,12 @@ static void stellaris_sys_instance_init(Object *obj) memory_region_init_io(&s->iomem, obj, &ssys_ops, s, "ssys", 0x00001000= ); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->irq); + s->sysclk =3D qdev_init_clock_out(DEVICE(s), "SYSCLK"); } =20 -static int stellaris_sys_init(uint32_t base, qemu_irq irq, - stellaris_board_info * board, - uint8_t *macaddr) +static DeviceState *stellaris_sys_init(uint32_t base, qemu_irq irq, + stellaris_board_info *board, + uint8_t *macaddr) { DeviceState *dev =3D qdev_new(TYPE_STELLARIS_SYS); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); @@ -774,7 +790,7 @@ static int stellaris_sys_init(uint32_t base, qemu_irq i= rq, */ device_cold_reset(dev); =20 - return 0; + return dev; } =20 /* I2C controller. */ @@ -1341,6 +1357,7 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) int flash_size; I2CBus *i2c; DeviceState *dev; + DeviceState *ssys_dev; int i; int j; =20 @@ -1391,8 +1408,8 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) } } =20 - stellaris_sys_init(0x400fe000, qdev_get_gpio_in(nvic, 28), - board, nd_table[0].macaddr.a); + ssys_dev =3D stellaris_sys_init(0x400fe000, qdev_get_gpio_in(nvic, 28), + board, nd_table[0].macaddr.a); =20 =20 if (board->dc1 & (1 << 3)) { /* watchdog present */ @@ -1401,6 +1418,8 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) /* system_clock_scale is valid now */ uint32_t mainclk =3D NANOSECONDS_PER_SECOND / system_clock_scale; qdev_prop_set_uint32(dev, "wdogclk-frq", mainclk); + qdev_connect_clock_in(dev, "WDOGCLK", + qdev_get_clock_out(ssys_dev, "SYSCLK")); =20 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834640; cv=none; d=zohomail.com; s=zohoarc; b=nw6nTqtXCjyveOLKdP59jfYfC6GNVsccGE44KKEvpez/nkGyrjYLkZQKAodwLOB2jEDRut/un2VFxsqM0knjdON0oSJ4ZZu6XwYLzFE4Wdiam3i2J/tmMDUEqylrcgkVSd91Wm/dKOrs7ZOP1T8cpZtccgFrS639kmqfaEofJlE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834640; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yZ8xu0Lo6T+SwLC4D2n+MG9CZOTMUcUo5Src/38TuZs=; b=EEfSDAEdrzbjjC1nHz+E6uXdNM8p/GolsYBwjFmpQzTMcHGF6s9e7rH+sHu/mLrbDGzUqNHYwI/6Kit9FzVplChFGM9cHuP8SM3vxCKBT+Ri2LnByQFZdLlt7k7+8S7Zuvu+MYFR0Zt3uMZtAJ6qxnxPG2ErEkZ3FxC9R/JbHHM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161183464078480.02103420013577; Thu, 28 Jan 2021 03:50:40 -0800 (PST) Received: from localhost ([::1]:57562 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55ot-00047W-Lp for importer@patchew.org; Thu, 28 Jan 2021 06:50:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34028) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gq-0001dZ-7b for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:20 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:51111) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gd-0006Bv-2M for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:19 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 190so4054107wmz.0 for ; Thu, 28 Jan 2021 03:42:06 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yZ8xu0Lo6T+SwLC4D2n+MG9CZOTMUcUo5Src/38TuZs=; b=g40UFwzgOTp7m7ioPZrkGlaY3gtXHEjV3giEP6Wq40EvOKxWkRsJpy81y164YY8mvF NgeCt/QzrnHr5Py+P8rdaSWwY1LOy6VEzLgzriUOeiBbkF1xQY89QX8TCZzIIkaxdvEI BGZpE9dSabTgaBrDMQ5MjDDOQFY9yng6uJdmUsSFg7y17CXFIeddxEN7djZBJtWnEQ2/ x60YRnj/7Wj+5w6+rYGHG36G2gz2dkLVBr794ekiRiy3oeDNti8Cdx7VAlGoxGNVGlf5 Jd6NKaNbz1MIQx8ec8EHFd4D9StJblj8re7I5ila3zAkXVIu/Wysvfi1Cyj9c54Z4fgH H2vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yZ8xu0Lo6T+SwLC4D2n+MG9CZOTMUcUo5Src/38TuZs=; b=o8ICjrlMW1HnEpfpe4o1gEKORYZE4dJyrG1dZR2RlSeucX88qxiKxDOiKduLKNMjE+ C8phH7lwj7YiAtERWkM9mqScv3U+3z1G//fBdcvlz9NMMbyTD8evMcPDsR5wA5JZLiju YYiFvy1YdqGIEQthxjPCLgzXRKoghNj8WrVg7xPz9Y4S7ILbM7b0WsUrb1MtgvEITj7X drzif6YwDIhh4kZQvGiAly11gXJDbRkD9qFdzL26h5xsRHJ4wMhNXZX/TTqTyUnQVPqI WRvyvo/GNiQu6ly19kTtpY3/w3yoGEFJKvX+VmkU/DbTjyO6hgzW8Gd7B6B9yzfQf3dM rGQQ== X-Gm-Message-State: AOAM533Dw75oN13RHzDM4B2Dbpk4Mmvu8qXLT2UH17lgpt0vbgEoHNNO 6aIKl2xs6OFUOCUTDdDcbv+l3A== X-Google-Smtp-Source: ABdhPJz3Ju3ClAVHoeEHEAj63UJfFdyGb3g3+9ZFwP4kkh86QQzUk4Ooikt5wxpwqE/mQyVxto6Tug== X-Received: by 2002:a05:600c:2295:: with SMTP id 21mr8506158wmf.133.1611834125570; Thu, 28 Jan 2021 03:42:05 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 18/25] hw/timer/cmsdk-apb-timer: Convert to use Clock input Date: Thu, 28 Jan 2021 11:41:38 +0000 Message-Id: <20210128114145.20536-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Switch the CMSDK APB timer device over to using its Clock input; the pclk-frq property is now ignored. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-19-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/timer/cmsdk-apb-timer.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index c63145ff553..f053146d88f 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -204,6 +204,15 @@ static void cmsdk_apb_timer_reset(DeviceState *dev) ptimer_transaction_commit(s->timer); } =20 +static void cmsdk_apb_timer_clk_update(void *opaque) +{ + CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(opaque); + + ptimer_transaction_begin(s->timer); + ptimer_set_period_from_clock(s->timer, s->pclk, 1); + ptimer_transaction_commit(s->timer); +} + static void cmsdk_apb_timer_init(Object *obj) { SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); @@ -213,15 +222,16 @@ static void cmsdk_apb_timer_init(Object *obj) s, "cmsdk-apb-timer", 0x1000); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->timerint); - s->pclk =3D qdev_init_clock_in(DEVICE(s), "pclk", NULL, NULL); + s->pclk =3D qdev_init_clock_in(DEVICE(s), "pclk", + cmsdk_apb_timer_clk_update, s); } =20 static void cmsdk_apb_timer_realize(DeviceState *dev, Error **errp) { CMSDKAPBTimer *s =3D CMSDK_APB_TIMER(dev); =20 - if (s->pclk_frq =3D=3D 0) { - error_setg(errp, "CMSDK APB timer: pclk-frq property must be set"); + if (!clock_has_source(s->pclk)) { + error_setg(errp, "CMSDK APB timer: pclk clock must be connected"); return; } =20 @@ -232,7 +242,7 @@ static void cmsdk_apb_timer_realize(DeviceState *dev, E= rror **errp) PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); =20 ptimer_transaction_begin(s->timer); - ptimer_set_freq(s->timer, s->pclk_frq); + ptimer_set_period_from_clock(s->timer, s->pclk, 1); ptimer_transaction_commit(s->timer); } =20 --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835678; cv=none; d=zohomail.com; s=zohoarc; b=Wqov9p4OGjLjBo5Z1NpWFekMy/5ZTQj5rTYkrC4h3WFTGp585ywum8ZjifBgnNe27hfJf/QfqotAoqipDoFIX0qTcWmqWTJ+3wVxxu1L7f0iDqGJka6q574v7QaPvN4JayknqNVgIpBpMYLYHcQ80bBYRorOMmi+8KO+izHIifA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835678; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lnxZhqtkhnY8r8cAKmASAC+5gwFe5OR+EW9jsx4r30I=; b=SUh4nAPWrrY91lqClk5QLaLiQGb9zW0Txk5GANJbjGCMgVcgxla5ee5K3/Omlg0X7Hm4GeCWldDtf4t2EihabsJJyOArRIxsdyMBLIKt98GQmMPJxRua6mnfsO7vJtyP34MbHUVoPIHg3NiKRzphNDDbiKCiRrvl2+axR9uyRqw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835678263400.54497390027507; Thu, 28 Jan 2021 04:07:58 -0800 (PST) Received: from localhost ([::1]:40994 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l565b-0004gU-7T for importer@patchew.org; Thu, 28 Jan 2021 07:07:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34034) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gq-0001ex-OA for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:20 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]:35809) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gd-0006Ci-V0 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:20 -0500 Received: by mail-wm1-x32b.google.com with SMTP id e15so4312700wme.0 for ; Thu, 28 Jan 2021 03:42:07 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lnxZhqtkhnY8r8cAKmASAC+5gwFe5OR+EW9jsx4r30I=; b=joboC/LwkMaPmMA0p5XXNdEhlITVvPRWh/mbxR1x6DbOcuGK0b0EF75nvBhcNs/pTp /vcX3EK8lzL3UDINlkye3e4iO0n490rShzQMstZFXbjGR+iwrfECO9nYTB8mWMWUMZiZ AmVVM6PNPqFEwOAWr2m7Z7hx4LWzU4JhAbKHe0w9wF8136t92n9tQR4IsjU5RNfplWH5 Y/ikC04jsktA72Z2gy/kJ7IWwTk9fe5dannrx0iQK+OAqbz/p67/XO8aRa09TJRUiVkI UsbF4jJl4SSwiXGMQsxHC/uBsjC+aOEyfiV0Cq6s4dZRkFTFqhJgyk5YJ/heNeINqEu7 P92Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lnxZhqtkhnY8r8cAKmASAC+5gwFe5OR+EW9jsx4r30I=; b=SRIZLZCUZse8Xq4leCNooZYrqlc2NDpU5Ggt68ucJfyj2gRGQ+vCaVF0w09RHzqaEY edwLCXRzDMl+MhLjqGEa8iJyBE+57+ccHpkfdvyPLBAilunhnuDGPgce3ndpKxU7MeL1 0gFYnVQcf4VUBU5UfXm+AjJHui4Hileg5fDUaqS19YCDn09TzNO7IjrmIiaHbmyiW/Ch MDj+m5PoM+aPbJF9yjCjV1+Le9sLZesoduKtG1zH6fru8FYk3TCAUgRoRYB2DkI46Lq/ ig19wKd8Ds5I5aEJeiTJK1eBLnwkN2PCf6+/Nnw5CGqkAsUUwJUzlBN8dFXylg1vbRk+ TlvQ== X-Gm-Message-State: AOAM530YnlDR4skezlrzKBsM88HjMjvmVa8FMdNle5PgaclGnCmR64Jo xFEzVwNCNuGOmKxamDKzL8tAKg== X-Google-Smtp-Source: ABdhPJxNY3aGkHTh3kNqtkX4j5acTRG6ZsJ/X74A7CR0MUqL+PKUSt7pS25fzb19DKN/zop/fCfm8Q== X-Received: by 2002:a1c:e043:: with SMTP id x64mr8465245wmg.48.1611834126547; Thu, 28 Jan 2021 03:42:06 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 19/25] hw/timer/cmsdk-apb-dualtimer: Convert to use Clock input Date: Thu, 28 Jan 2021 11:41:39 +0000 Message-Id: <20210128114145.20536-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Switch the CMSDK APB dualtimer device over to using its Clock input; the pclk-frq property is now ignored. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20210121190622.22000-20-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/timer/cmsdk-apb-dualtimer.c | 42 ++++++++++++++++++++++++++++++---- 1 file changed, 37 insertions(+), 5 deletions(-) diff --git a/hw/timer/cmsdk-apb-dualtimer.c b/hw/timer/cmsdk-apb-dualtimer.c index 781b496037b..828127b366f 100644 --- a/hw/timer/cmsdk-apb-dualtimer.c +++ b/hw/timer/cmsdk-apb-dualtimer.c @@ -106,6 +106,22 @@ static void cmsdk_apb_dualtimer_update(CMSDKAPBDualTim= er *s) qemu_set_irq(s->timerintc, timintc); } =20 +static int cmsdk_dualtimermod_divisor(CMSDKAPBDualTimerModule *m) +{ + /* Return the divisor set by the current CONTROL.PRESCALE value */ + switch (FIELD_EX32(m->control, CONTROL, PRESCALE)) { + case 0: + return 1; + case 1: + return 16; + case 2: + case 3: /* UNDEFINED, we treat like 2 (and complained when it was set)= */ + return 256; + default: + g_assert_not_reached(); + } +} + static void cmsdk_dualtimermod_write_control(CMSDKAPBDualTimerModule *m, uint32_t newctrl) { @@ -146,7 +162,7 @@ static void cmsdk_dualtimermod_write_control(CMSDKAPBDu= alTimerModule *m, default: g_assert_not_reached(); } - ptimer_set_freq(m->timer, m->parent->pclk_frq / divisor); + ptimer_set_period_from_clock(m->timer, m->parent->timclk, divisor); } =20 if (changed & R_CONTROL_MODE_MASK) { @@ -414,7 +430,8 @@ static void cmsdk_dualtimermod_reset(CMSDKAPBDualTimerM= odule *m) * limit must both be set to 0xffff, so we wrap at 16 bits. */ ptimer_set_limit(m->timer, 0xffff, 1); - ptimer_set_freq(m->timer, m->parent->pclk_frq); + ptimer_set_period_from_clock(m->timer, m->parent->timclk, + cmsdk_dualtimermod_divisor(m)); ptimer_transaction_commit(m->timer); } =20 @@ -432,6 +449,20 @@ static void cmsdk_apb_dualtimer_reset(DeviceState *dev) s->timeritop =3D 0; } =20 +static void cmsdk_apb_dualtimer_clk_update(void *opaque) +{ + CMSDKAPBDualTimer *s =3D CMSDK_APB_DUALTIMER(opaque); + int i; + + for (i =3D 0; i < ARRAY_SIZE(s->timermod); i++) { + CMSDKAPBDualTimerModule *m =3D &s->timermod[i]; + ptimer_transaction_begin(m->timer); + ptimer_set_period_from_clock(m->timer, m->parent->timclk, + cmsdk_dualtimermod_divisor(m)); + ptimer_transaction_commit(m->timer); + } +} + static void cmsdk_apb_dualtimer_init(Object *obj) { SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); @@ -446,7 +477,8 @@ static void cmsdk_apb_dualtimer_init(Object *obj) for (i =3D 0; i < ARRAY_SIZE(s->timermod); i++) { sysbus_init_irq(sbd, &s->timermod[i].timerint); } - s->timclk =3D qdev_init_clock_in(DEVICE(s), "TIMCLK", NULL, NULL); + s->timclk =3D qdev_init_clock_in(DEVICE(s), "TIMCLK", + cmsdk_apb_dualtimer_clk_update, s); } =20 static void cmsdk_apb_dualtimer_realize(DeviceState *dev, Error **errp) @@ -454,8 +486,8 @@ static void cmsdk_apb_dualtimer_realize(DeviceState *de= v, Error **errp) CMSDKAPBDualTimer *s =3D CMSDK_APB_DUALTIMER(dev); int i; =20 - if (s->pclk_frq =3D=3D 0) { - error_setg(errp, "CMSDK APB timer: pclk-frq property must be set"); + if (!clock_has_source(s->timclk)) { + error_setg(errp, "CMSDK APB dualtimer: TIMCLK clock must be connec= ted"); return; } =20 --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834981; cv=none; d=zohomail.com; s=zohoarc; b=NfffPdJwCwQ3bDpIXK0CMfC9jb6wvjmSgQhvAG2LUzZbaVqoBLvRwqbmI1b9gDQ9zy23D/Jc0vOJxgbYjxXiCHFYnNAWjEeyfqa88Oin0RyHjhqaZPr/9tPPvJ+EaZS5Fiez0g0ltWXw2gMsMAYIdnlYgGERnh0yKtduAyMhb20= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834981; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=FLhKJfJA3wJXHxcMZPwl39x9goxCdaNuR65Z80YJ5OE=; b=VxYxS5ZdhxXN0uvapex33MAzNF7jOuYRQRAtHD8/Cq9nOqNO3TdXpTIZRNx10BRF5ocLg0hylbO2o8DZ8owyd8zvlTVPOgIQj5oHaI3iHCYN9jpJf/xeFDqfK01zxFAlrVnNwDBCrBgNeCgAQksoInQUExcfGdWYDcOTi6q2c5I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834981906102.98846460775587; Thu, 28 Jan 2021 03:56:21 -0800 (PST) Received: from localhost ([::1]:46874 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55uO-0003Av-RN for importer@patchew.org; Thu, 28 Jan 2021 06:56:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34040) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gq-0001fK-Rw for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:20 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:40944) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55ge-0006DJ-V0 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:20 -0500 Received: by mail-wr1-x435.google.com with SMTP id c12so5055806wrc.7 for ; Thu, 28 Jan 2021 03:42:08 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FLhKJfJA3wJXHxcMZPwl39x9goxCdaNuR65Z80YJ5OE=; b=dvL1tvBW0hb+ABtbTnHOaDtgaVPGUu/yGvYan8qVNWP1vnhCE/+Fwwu5T/F6ZzgaL+ VLnzY8sQq71XXz833C+mYNEjgn8YmE8U7OfdO7VHs0Y24sErXopLKSZ6uRsHdaMEVwgn 4rxgOztIQ7Yo4z5rsEhCvNCzB81NaO00cgTUWFavGl+YLz+fnNH34CGwyZQ96AFPRGJ7 s7yv2Vq9EI9R8ZPOKbKVDPu83+LTNA2Z6dNe7+yNCycedsYd82RxcPOSzjlhodEeQMfj lKHMBzMo5gOeCQu4weHzTKAcvZ7yeeR+UsLd410XQ4KjbBVPksIk7AWwxYgIXa4SqBUO ovmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FLhKJfJA3wJXHxcMZPwl39x9goxCdaNuR65Z80YJ5OE=; b=QGGtz3p/dP9PmCZ27LbsjnBa4XrBMicPTp6BK+vCwuyaz2N3NclRHTl46MvfDhdAg5 pISJ8T8BvOhGwDpf1XRSqLwnYjlBwwkDuwr2JsAsDKjY9ZyjQOGJXY4sItia6ijVLNbW lkbzj4pK8d966QioC/M1qdAHifkb2vyKPZ+SS144x7yunyRZF25RUzvPhW7TwR+YpSbj o46GBIy9P3WZCQjBlslNSyZOP4+C97fBRwYLuM0XJ52EwC8OBaFq2k9ucoQTEuv9FjUf tfPko6+Jq24SWYaCq4368NHI7acL93X5g2Z7GT4tX98DewA6bvio6msQT9Ny7IVeOsxo KiMw== X-Gm-Message-State: AOAM530MyzWyBbVL2LZHRrFdMGK1qFjR3gxR6WSaMkwIKyRYKPyyq8+o 14bY3qsNsxeYTPxHoXHoQVKaqA== X-Google-Smtp-Source: ABdhPJxMreuamRMoqLMOWVicTPnlrnRQ6KEgY+AWOcJj4r3vdlolY+gDU/ARAOq0DOvjQd1H+i1T0g== X-Received: by 2002:a05:6000:188c:: with SMTP id a12mr16295896wri.105.1611834127506; Thu, 28 Jan 2021 03:42:07 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 20/25] hw/watchdog/cmsdk-apb-watchdog: Convert to use Clock input Date: Thu, 28 Jan 2021 11:41:40 +0000 Message-Id: <20210128114145.20536-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Switch the CMSDK APB watchdog device over to using its Clock input; the wdogclk_frq property is now ignored. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-21-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/watchdog/cmsdk-apb-watchdog.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-watch= dog.c index b03bcb73628..9cad0c67da4 100644 --- a/hw/watchdog/cmsdk-apb-watchdog.c +++ b/hw/watchdog/cmsdk-apb-watchdog.c @@ -310,6 +310,15 @@ static void cmsdk_apb_watchdog_reset(DeviceState *dev) ptimer_transaction_commit(s->timer); } =20 +static void cmsdk_apb_watchdog_clk_update(void *opaque) +{ + CMSDKAPBWatchdog *s =3D CMSDK_APB_WATCHDOG(opaque); + + ptimer_transaction_begin(s->timer); + ptimer_set_period_from_clock(s->timer, s->wdogclk, 1); + ptimer_transaction_commit(s->timer); +} + static void cmsdk_apb_watchdog_init(Object *obj) { SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); @@ -319,7 +328,8 @@ static void cmsdk_apb_watchdog_init(Object *obj) s, "cmsdk-apb-watchdog", 0x1000); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->wdogint); - s->wdogclk =3D qdev_init_clock_in(DEVICE(s), "WDOGCLK", NULL, NULL); + s->wdogclk =3D qdev_init_clock_in(DEVICE(s), "WDOGCLK", + cmsdk_apb_watchdog_clk_update, s); =20 s->is_luminary =3D false; s->id =3D cmsdk_apb_watchdog_id; @@ -329,9 +339,9 @@ static void cmsdk_apb_watchdog_realize(DeviceState *dev= , Error **errp) { CMSDKAPBWatchdog *s =3D CMSDK_APB_WATCHDOG(dev); =20 - if (s->wdogclk_frq =3D=3D 0) { + if (!clock_has_source(s->wdogclk)) { error_setg(errp, - "CMSDK APB watchdog: wdogclk-frq property must be set"); + "CMSDK APB watchdog: WDOGCLK clock must be connected"); return; } =20 @@ -342,7 +352,7 @@ static void cmsdk_apb_watchdog_realize(DeviceState *dev= , Error **errp) PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); =20 ptimer_transaction_begin(s->timer); - ptimer_set_freq(s->timer, s->wdogclk_frq); + ptimer_set_period_from_clock(s->timer, s->wdogclk, 1); ptimer_transaction_commit(s->timer); } =20 --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835079; cv=none; d=zohomail.com; s=zohoarc; b=Z1NAiSdgOQnXXP36+WDKhJYLL9fl7eEmKCElZTPPUgCkD8I1I9Z8qAE0IbbHn1OZB+1OlVUfdj67+EPtlVnEBv8E+rHve9C5GrB9fRWj68xm03vHisTrxnewp+4wf9nd1tICL1m3I+avaankGUrkYToF6C3AKlheOkAH/wxmB7g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835079; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=iLfQwzRXcvknxpkyMmoH4p1ex2pddLgB3eHdSm55wjg=; b=kshb0SKab0wKD1ehtTzdb+2AuiVT5aU0ui18fEqmHjO1kCdORl2B0qDB6b7Jr75YZanOQRWjcUx4k2sLZa8fRVqpIvYY4mjBGrK87JkQnEGmMPUUw5Nkkj+adHL6Ignnva53wK0eV0M26qdQiqVYyE5fIduX+4WgklN2Z7bEruQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835079958186.85082085938484; Thu, 28 Jan 2021 03:57:59 -0800 (PST) Received: from localhost ([::1]:51508 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55vy-00057f-Ua for importer@patchew.org; Thu, 28 Jan 2021 06:57:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34074) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gr-0001hn-Po for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:21 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:43641) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gg-0006Do-E1 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:21 -0500 Received: by mail-wr1-x435.google.com with SMTP id z6so5009044wrq.10 for ; Thu, 28 Jan 2021 03:42:09 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iLfQwzRXcvknxpkyMmoH4p1ex2pddLgB3eHdSm55wjg=; b=bwwv7KEmATInReiDbCBFcHGyBcUZ53s8dsPWBufV3bWMQiRK96Rof6CB4H9cZZE3Ic M1/mdkrDVgiXxuOZSzAYebUOmo+vsEXWZI3q/GP1sLzeE2YdCiyRqhsWRfM3odUmuGRA YmIFZ2uBbyVgcQxfNacgALYcIhq9UK8pFCD1XucWBBHtbtmoE3cQ7t0PxKMYrU1GofBG AIzAXVkkiSLQanRSAfkgFPWzIXi7hIqXgIYon/TWPDHqE4h3mRvDmWB++otkEHoaeXEu 5t/DE9LCWlDftlTNSf7cBRjNg0TqmxZenqnyW4X1AoNngG625hfUPYTaccT9ItsRK2tG khUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iLfQwzRXcvknxpkyMmoH4p1ex2pddLgB3eHdSm55wjg=; b=T/DQJPK1iA8G4opF+vzppf+AVtikmWC7040+1B1wHW94Eih3tpM201pV3gUfHnieDS iRl+h8qhIE44Br7QLkfMQtVjTeFfB5PjBOiY5VKnuQQ4Q+iBYI9HBrJw95uztLsuH1oi XWqN2EPyRYJiZlVcnJP51RbSOHIhhfVVVT9h59NR6a3SU73MKimWbmEjYgVg/yYhpN8a EYGpUu1OjfyPgmeNgVmQj6gg+hQ1F2GLN6qJw8W2zuTT7oUlA7mqLbB4/noJaGG5DYZn aNtl6UxhP4mucdT6xaeydm7Ht/VJq+4vsh0g33b3bUSsdgqRGnZKy0BEfNxFsLFOrZ5P ZLng== X-Gm-Message-State: AOAM532LbED5M90xdrwjj3ImHaA5CLiRMWB9rMnk8/I5gQ14OLyK09kE 1TQyC7PDlcLx6iYKWXgebWgPiQ== X-Google-Smtp-Source: ABdhPJyT3RhlRzzrd538Maf2qicyvsTCcWi1bt8LcnmvDCoyl6s0EDNFtTaC1TPzSpS5CsCkjUVfwg== X-Received: by 2002:a5d:4402:: with SMTP id z2mr15797119wrq.265.1611834128404; Thu, 28 Jan 2021 03:42:08 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 21/25] tests/qtest/cmsdk-apb-watchdog-test: Test clock changes Date: Thu, 28 Jan 2021 11:41:41 +0000 Message-Id: <20210128114145.20536-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Now that the CMSDK APB watchdog uses its Clock input, it will correctly respond when the system clock frequency is changed using the RCC register on in the Stellaris board system registers. Test that when the RCC register is written it causes the watchdog timer to change speed. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-22-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- tests/qtest/cmsdk-apb-watchdog-test.c | 52 +++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/tests/qtest/cmsdk-apb-watchdog-test.c b/tests/qtest/cmsdk-apb-= watchdog-test.c index 950f64c527b..2710cb17b86 100644 --- a/tests/qtest/cmsdk-apb-watchdog-test.c +++ b/tests/qtest/cmsdk-apb-watchdog-test.c @@ -15,6 +15,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/bitops.h" #include "libqtest-single.h" =20 /* @@ -31,6 +32,11 @@ #define WDOGMIS 0x14 #define WDOGLOCK 0xc00 =20 +#define SSYS_BASE 0x400fe000 +#define RCC 0x60 +#define SYSDIV_SHIFT 23 +#define SYSDIV_LENGTH 4 + static void test_watchdog(void) { g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); @@ -61,6 +67,50 @@ static void test_watchdog(void) g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); } =20 +static void test_clock_change(void) +{ + uint32_t rcc; + + /* + * Test that writing to the stellaris board's RCC register to + * change the system clock frequency causes the watchdog + * to change the speed it counts at. + */ + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); + + writel(WDOG_BASE + WDOGCONTROL, 1); + writel(WDOG_BASE + WDOGLOAD, 1000); + + /* Step to just past the 500th tick */ + clock_step(80 * 500 + 1); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 500); + + /* Rewrite RCC.SYSDIV from 16 to 8, so the clock is now 40ns per tick = */ + rcc =3D readl(SSYS_BASE + RCC); + g_assert_cmpuint(extract32(rcc, SYSDIV_SHIFT, SYSDIV_LENGTH), =3D=3D, = 0xf); + rcc =3D deposit32(rcc, SYSDIV_SHIFT, SYSDIV_LENGTH, 7); + writel(SSYS_BASE + RCC, rcc); + + /* Just past the 1000th tick: timer should have fired */ + clock_step(40 * 500); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 1); + + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 0); + + /* VALUE reloads at following tick */ + clock_step(41); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 1000); + + /* Writing any value to WDOGINTCLR clears the interrupt and reloads */ + clock_step(40 * 500); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 500); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 1); + writel(WDOG_BASE + WDOGINTCLR, 0); + g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), =3D=3D, 1000); + g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), =3D=3D, 0); +} + int main(int argc, char **argv) { int r; @@ -70,6 +120,8 @@ int main(int argc, char **argv) qtest_start("-machine lm3s811evb"); =20 qtest_add_func("/cmsdk-apb-watchdog/watchdog", test_watchdog); + qtest_add_func("/cmsdk-apb-watchdog/watchdog_clock_change", + test_clock_change); =20 r =3D g_test_run(); =20 --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835793; cv=none; d=zohomail.com; s=zohoarc; b=TWdEEG9Iq5Ik6NJuIj2uUmYKmoKx6+brt6AYY7qyB9TQi1rSUI4qlwkgyf9LQNZ/gZWyzpHBqRhW0p6B2uuvuq90BL35GWO5sJMuJ0PXh4JpZtenoxiUSlJ5PLImYGtzvNYji+rIwn1sQR+bQ8dG6QzFGFOYuZWpoAi3eHHCOTY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835793; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dejnN+1TE+bIdVsXEIIkkiDTxwZNugqOzXyFunr0NOY=; b=Rd8lqnBkMPku6165TTBl2MEPmwUO1plDS5KrxId/Un3b/E+mIVmHLlgt0y0JGXMpOO96GyFuNrY3+1pbW4han/WUMwv6rqMPrH3/wQ4LjV4VM5Xu4ot9WOTzkrWXSX8iLhSCnfP118KDkZ9EIwOWgIDwxqrShUwwXl/VpVxa8DY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835793285174.6237921550537; Thu, 28 Jan 2021 04:09:53 -0800 (PST) Received: from localhost ([::1]:47284 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l567T-0007Ho-Vu for importer@patchew.org; Thu, 28 Jan 2021 07:09:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34080) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gs-0001ip-6u for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:22 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:35814) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gh-0006E8-SQ for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:21 -0500 Received: by mail-wm1-x330.google.com with SMTP id e15so4312846wme.0 for ; Thu, 28 Jan 2021 03:42:10 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dejnN+1TE+bIdVsXEIIkkiDTxwZNugqOzXyFunr0NOY=; b=dpZlRgzdCo/g1pxVEUJCNQOzV46NEadFGZUmVYhIW9hAFmvKTKQcU94WQwsKytPdbh qUxi0VyHrjNdnEUJPrQ4m/oDQtNJmMFwKZsqMU/vnyCbEwBCfcAh9uqA7/kkgaHxItws +WVIge7vcM1La+a4gAzsoiVsDXhodDikSZXOsza+JvOU4+RHfbC1ZvyPh5aCZwMhXLMD 83NMYS1hers4buC3QL1l9qZ78zGIdecZu165rl2AklfMF/Nneaabt3wEzNKXXdfGJz8v KEqUYr/VMwpuRPzIXkIS0VrtSEky6Bpl5RyMgwxAFpTNdCsC2PqVwFkktSZjqMNR1o/Y Vlrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dejnN+1TE+bIdVsXEIIkkiDTxwZNugqOzXyFunr0NOY=; b=BjUOtOBQhZZK0A8LHBhcz4dgALTwhXjqPwYJkYXz4IS5calmCwNuiJuEp2wrGz717o lGjd0CV25v8IuNvAFMvpQQc5N0B1jRo+UYoMcvqHq+NwpbMF6UV1Bw6Y6llN4knwRmcZ GUbY3MQO1xcbLCg6wfqEx1qqxazRVHEIsI6qk71r3ZY/b6eYkgd3yV4GOEsmWXRem+kj A55teNOfEGcSwAOGXguYvfelr4VGoy9G7PakKPOQoqmEx/gMRWuNLRft1uHntTTptdGz QKTmjXVAcE/9sWU7O3IoTkw8idpzDAEn3fo0e7V+UltBxe5sk9Xu5RT51HSHV6GwD84n Ht9g== X-Gm-Message-State: AOAM5316hAVkjxeEVUwJxdh0TszMsLpadZufuS17LHdr4FUqPl7hFKwP 30uj+PEFvgAbFL0TJlEtrKPlaw== X-Google-Smtp-Source: ABdhPJwL7Q1cQ3eIM2UFET0tMGHQQaq5XHmUf8oxI0T/f47dFyDLfPlCjo/P4qqLyBBdNgJvJOXnEg== X-Received: by 2002:a7b:c08f:: with SMTP id r15mr8407531wmh.22.1611834129473; Thu, 28 Jan 2021 03:42:09 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 22/25] hw/arm/armsse: Use Clock to set system_clock_scale Date: Thu, 28 Jan 2021 11:41:42 +0000 Message-Id: <20210128114145.20536-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Use the MAINCLK Clock input to set the system_clock_scale variable rather than using the mainclk_frq property. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20210121190622.22000-23-peter.maydell@linaro.org Reviewed-by: Luc Michel Tested-by: Philippe Mathieu-Daud=C3=A9 --- v1->v2: wire armsse_mainclk_update() up as the Clock callback --- hw/arm/armsse.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 4349ce9bfdb..9a6b24c79aa 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -232,6 +232,16 @@ static void armsse_forward_sec_resp_cfg(ARMSSE *s) qdev_connect_gpio_out(dev_splitter, 2, s->sec_resp_cfg_in); } =20 +static void armsse_mainclk_update(void *opaque) +{ + ARMSSE *s =3D ARM_SSE(opaque); + /* + * Set system_clock_scale from our Clock input; this is what + * controls the tick rate of the CPU SysTick timer. + */ + system_clock_scale =3D clock_ticks_to_ns(s->mainclk, 1); +} + static void armsse_init(Object *obj) { ARMSSE *s =3D ARM_SSE(obj); @@ -242,7 +252,8 @@ static void armsse_init(Object *obj) assert(info->sram_banks <=3D MAX_SRAM_BANKS); assert(info->num_cpus <=3D SSE_MAX_CPUS); =20 - s->mainclk =3D qdev_init_clock_in(DEVICE(s), "MAINCLK", NULL, NULL); + s->mainclk =3D qdev_init_clock_in(DEVICE(s), "MAINCLK", + armsse_mainclk_update, s); s->s32kclk =3D qdev_init_clock_in(DEVICE(s), "S32KCLK", NULL, NULL); =20 memory_region_init(&s->container, obj, "armsse-container", UINT64_MAX); @@ -451,9 +462,11 @@ static void armsse_realize(DeviceState *dev, Error **e= rrp) return; } =20 - if (!s->mainclk_frq) { - error_setg(errp, "MAINCLK_FRQ property was not set"); - return; + if (!clock_has_source(s->mainclk)) { + error_setg(errp, "MAINCLK clock was not connected"); + } + if (!clock_has_source(s->s32kclk)) { + error_setg(errp, "S32KCLK clock was not connected"); } =20 assert(info->num_cpus <=3D SSE_MAX_CPUS); @@ -1115,7 +1128,8 @@ static void armsse_realize(DeviceState *dev, Error **= errp) */ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->container); =20 - system_clock_scale =3D NANOSECONDS_PER_SECOND / s->mainclk_frq; + /* Set initial system_clock_scale from MAINCLK */ + armsse_mainclk_update(s); } =20 static void armsse_idau_check(IDAUInterface *ii, uint32_t address, --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835233; cv=none; d=zohomail.com; s=zohoarc; b=Z9+REcuDq7H2vh08+oaT6dECnwtB4GxGIBVDLL3C05G9/smXEUJNIoTVusdhOuOef1wJpaWorJbWJNxL6Eii9rPq97ZYYQTOwvA1cpHjFCGINieEdwzBQw8Bhe7O5wPHWOosTMsbWgdQj2aCKFeIO0NM7Nt8HTF9gx5GDrQ3g9U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835233; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Jz9NDWJlL3r2GqLKIuRpg/kHH68d8J+FWgxl1TndnRQ=; b=D/bAcwH1PdwSzGosyMsQSoafVS8VQU8cvNum88wbWcv08HhdjYZyrEBetFUujd0jmusrnv/HTnn6kAz1cdvJk3Skvi0X1quskbocLtXFjkmHe+vX7e5nbOnA2boL0+9jB6PzSNQVnfKUt4K2hHzKJ+b8SujvDCm//bxFGmDO/+I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835233755274.83818015906706; Thu, 28 Jan 2021 04:00:33 -0800 (PST) Received: from localhost ([::1]:58316 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55yS-0007x6-EY for importer@patchew.org; Thu, 28 Jan 2021 07:00:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34124) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gu-0001kM-Di for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:25 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:39186) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gk-0006ET-EO for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:24 -0500 Received: by mail-wr1-x42a.google.com with SMTP id a1so5075662wrq.6 for ; Thu, 28 Jan 2021 03:42:13 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Jz9NDWJlL3r2GqLKIuRpg/kHH68d8J+FWgxl1TndnRQ=; b=yPyxG9nIm6gNg6JeGYh5/msRrjFyOZV8lfyeQ0rXzuxHON+vvP8rdmJKye8Xzrj4S8 tU5WqH4eY1H6c4smb61/oua1sW49rI7XJhJFKE7kzgMA1CVcKRNKBK1YSkRydvpeR7ZD WM8SL9/V2t5+AWMTJALnW9UNYX33MXSpHmTRmbdBT8BJtJBUbnRh4tLAAJJmSNHIUwJ6 XWJ34n1UaDLLuF+F/Vk3gnIaTj4cN5f+rv6MqXrJ+2K+AtXUVJXpqRKOmJFONQ/Vgn21 OB74Ja73gabYpFgFgoqLMFnuhawT4KA87a6RiM8oP4UJU1HNZ0NikLXrsriv38IfuTVX LpyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Jz9NDWJlL3r2GqLKIuRpg/kHH68d8J+FWgxl1TndnRQ=; b=b6VNUTlQxsK/2T9/Tc3eJmD0Wc8aNKc0qUjPWsUpcq+LSIedLl7Bez8Hbf0IhmFECU 6oI3HdBaPMf4cAJNjTN9pMEvhis861xbcDhM9RnyH7/vc+pC9Wglh2la/fpdmv8oHRbh 6x26a4i16l396PS8HdFVlsALHPeOQkNxQ8/4dcgBM1z7hCGKUEhKhAX5ZbnvET2H8gNl 6AuG/BfZK/PEHulVFQEW+R7Llldjf0akh1nwWThZpOnj6kpdIKmbbd6XN9oFxFVTxoU0 emyAI/+j8LWDUZHEpjsMqMyqiKfYXoQ8bKyUQ2Ynap0m0SMI6mFjQlIDMHqCK1aRgpK/ yEVg== X-Gm-Message-State: AOAM530xHoL56LTo7/AbTsQ7pGoJEeMGb+b1q+xLjROMRI21/RJhuGZD 6Nt7BLpnr/Z8JYimb26DDNkstg== X-Google-Smtp-Source: ABdhPJx4cRAZgxDRGWck1+kppNFBsbxdr/TdLyZLk5HkNXsFQMKD+rkhxUsQ6DjFiAPuvy8gjIlBMg== X-Received: by 2002:a5d:6686:: with SMTP id l6mr15715840wru.236.1611834132929; Thu, 28 Jan 2021 03:42:12 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 23/25] arm: Don't set freq properties on CMSDK timer, dualtimer, watchdog, ARMSSE Date: Thu, 28 Jan 2021 11:41:43 +0000 Message-Id: <20210128114145.20536-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Remove all the code that sets frequency properties on the CMSDK timer, dualtimer and watchdog devices and on the ARMSSE SoC device: these properties are unused now that the devices rely on their Clock inputs instead. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-24-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/armsse.c | 7 ------- hw/arm/mps2-tz.c | 1 - hw/arm/mps2.c | 3 --- hw/arm/musca.c | 1 - hw/arm/stellaris.c | 3 --- 5 files changed, 15 deletions(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 9a6b24c79aa..34855e667de 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -727,7 +727,6 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) * it to the appropriate PPC port; then we can realize the PPC and * map its upstream ends to the right place in the container. */ - qdev_prop_set_uint32(DEVICE(&s->timer0), "pclk-frq", s->mainclk_frq); qdev_connect_clock_in(DEVICE(&s->timer0), "pclk", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer0), errp)) { return; @@ -738,7 +737,6 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) object_property_set_link(OBJECT(&s->apb_ppc0), "port[0]", OBJECT(mr), &error_abort); =20 - qdev_prop_set_uint32(DEVICE(&s->timer1), "pclk-frq", s->mainclk_frq); qdev_connect_clock_in(DEVICE(&s->timer1), "pclk", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer1), errp)) { return; @@ -749,7 +747,6 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) object_property_set_link(OBJECT(&s->apb_ppc0), "port[1]", OBJECT(mr), &error_abort); =20 - qdev_prop_set_uint32(DEVICE(&s->dualtimer), "pclk-frq", s->mainclk_frq= ); qdev_connect_clock_in(DEVICE(&s->dualtimer), "TIMCLK", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->dualtimer), errp)) { return; @@ -908,7 +905,6 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) /* Devices behind APB PPC1: * 0x4002f000: S32K timer */ - qdev_prop_set_uint32(DEVICE(&s->s32ktimer), "pclk-frq", S32KCLK); qdev_connect_clock_in(DEVICE(&s->s32ktimer), "pclk", s->s32kclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32ktimer), errp)) { return; @@ -1002,7 +998,6 @@ static void armsse_realize(DeviceState *dev, Error **e= rrp) qdev_connect_gpio_out(DEVICE(&s->nmi_orgate), 0, qdev_get_gpio_in_named(DEVICE(&s->armv7m), "NMI"= , 0)); =20 - qdev_prop_set_uint32(DEVICE(&s->s32kwatchdog), "wdogclk-frq", S32KCLK); qdev_connect_clock_in(DEVICE(&s->s32kwatchdog), "WDOGCLK", s->s32kclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32kwatchdog), errp)) { return; @@ -1013,7 +1008,6 @@ static void armsse_realize(DeviceState *dev, Error **= errp) =20 /* 0x40080000 .. 0x4008ffff : ARMSSE second Base peripheral region */ =20 - qdev_prop_set_uint32(DEVICE(&s->nswatchdog), "wdogclk-frq", s->mainclk= _frq); qdev_connect_clock_in(DEVICE(&s->nswatchdog), "WDOGCLK", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->nswatchdog), errp)) { return; @@ -1022,7 +1016,6 @@ static void armsse_realize(DeviceState *dev, Error **= errp) armsse_get_common_irq_in(s, 1)); sysbus_mmio_map(SYS_BUS_DEVICE(&s->nswatchdog), 0, 0x40081000); =20 - qdev_prop_set_uint32(DEVICE(&s->swatchdog), "wdogclk-frq", s->mainclk_= frq); qdev_connect_clock_in(DEVICE(&s->swatchdog), "WDOGCLK", s->mainclk); if (!sysbus_realize(SYS_BUS_DEVICE(&s->swatchdog), errp)) { return; diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 7acdf490f28..90caa914934 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -413,7 +413,6 @@ static void mps2tz_common_init(MachineState *machine) object_property_set_link(OBJECT(&mms->iotkit), "memory", OBJECT(system_memory), &error_abort); qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", MPS2TZ_NUMIRQ); - qdev_prop_set_uint32(iotkitdev, "MAINCLK_FRQ", SYSCLK_FRQ); qdev_connect_clock_in(iotkitdev, "MAINCLK", mms->sysclk); qdev_connect_clock_in(iotkitdev, "S32KCLK", mms->s32kclk); sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal); diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index cd1c215f941..39add416db5 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -346,7 +346,6 @@ static void mps2_common_init(MachineState *machine) object_initialize_child(OBJECT(mms), name, &mms->timer[i], TYPE_CMSDK_APB_TIMER); sbd =3D SYS_BUS_DEVICE(&mms->timer[i]); - qdev_prop_set_uint32(DEVICE(&mms->timer[i]), "pclk-frq", SYSCLK_FR= Q); qdev_connect_clock_in(DEVICE(&mms->timer[i]), "pclk", mms->sysclk); sysbus_realize_and_unref(sbd, &error_fatal); sysbus_mmio_map(sbd, 0, base); @@ -355,7 +354,6 @@ static void mps2_common_init(MachineState *machine) =20 object_initialize_child(OBJECT(mms), "dualtimer", &mms->dualtimer, TYPE_CMSDK_APB_DUALTIMER); - qdev_prop_set_uint32(DEVICE(&mms->dualtimer), "pclk-frq", SYSCLK_FRQ); qdev_connect_clock_in(DEVICE(&mms->dualtimer), "TIMCLK", mms->sysclk); sysbus_realize(SYS_BUS_DEVICE(&mms->dualtimer), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(&mms->dualtimer), 0, @@ -363,7 +361,6 @@ static void mps2_common_init(MachineState *machine) sysbus_mmio_map(SYS_BUS_DEVICE(&mms->dualtimer), 0, 0x40002000); object_initialize_child(OBJECT(mms), "watchdog", &mms->watchdog, TYPE_CMSDK_APB_WATCHDOG); - qdev_prop_set_uint32(DEVICE(&mms->watchdog), "wdogclk-frq", SYSCLK_FRQ= ); qdev_connect_clock_in(DEVICE(&mms->watchdog), "WDOGCLK", mms->sysclk); sysbus_realize(SYS_BUS_DEVICE(&mms->watchdog), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(&mms->watchdog), 0, diff --git a/hw/arm/musca.c b/hw/arm/musca.c index a9292482a06..945643c3cd7 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -385,7 +385,6 @@ static void musca_init(MachineState *machine) qdev_prop_set_uint32(ssedev, "EXP_NUMIRQ", mmc->num_irqs); qdev_prop_set_uint32(ssedev, "init-svtor", mmc->init_svtor); qdev_prop_set_uint32(ssedev, "SRAM_ADDR_WIDTH", mmc->sram_addr_width); - qdev_prop_set_uint32(ssedev, "MAINCLK_FRQ", SYSCLK_FRQ); qdev_connect_clock_in(ssedev, "MAINCLK", mms->sysclk); qdev_connect_clock_in(ssedev, "S32KCLK", mms->s32kclk); /* diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 9b67c739ef2..5acb043a07e 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1415,9 +1415,6 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) if (board->dc1 & (1 << 3)) { /* watchdog present */ dev =3D qdev_new(TYPE_LUMINARY_WATCHDOG); =20 - /* system_clock_scale is valid now */ - uint32_t mainclk =3D NANOSECONDS_PER_SECOND / system_clock_scale; - qdev_prop_set_uint32(dev, "wdogclk-frq", mainclk); qdev_connect_clock_in(dev, "WDOGCLK", qdev_get_clock_out(ssys_dev, "SYSCLK")); =20 --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611835494; cv=none; d=zohomail.com; s=zohoarc; b=JQnHqwZniisMknBc+YOg+LtBi65aM18FthkIm6cgPa5O7gYlWMnfY6kNKfjVRLvYVRM/FRrlpYdqwJijUtoAa/AxKvhkOS0O1h5Lt6CtnxEOsB7M4Co5eZJoxBHEX68I6dKjbxis8ndEDnkhTG4DedY/145DjsClTrUJQm3Tiec= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611835494; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=b1B4mJgR4lBgZjUMT6hbN8S40F1jQ2hPVu8gVSF71KA=; b=i8s24tEKa0b22qKKRHxxa3MkKDDHxQFh5cHMbE/QlidqDSC0cUuzAmATNHYiwf38xCbz1gYIDf1vdZEuh442lymsfrwSnDnyXjZnCTwG6al3GmvCW0fuJ3OfU/fhnzeUuMD/UErFBWO4H4Y/YC7VpCtLc/bIyaw6i9mjcqX2a4o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611835494062681.2414733652182; Thu, 28 Jan 2021 04:04:54 -0800 (PST) Received: from localhost ([::1]:35622 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l562e-0002J3-Tv for importer@patchew.org; Thu, 28 Jan 2021 07:04:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34164) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gw-0001o6-Tp for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:26 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:45056) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gl-0006Ei-G1 for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:26 -0500 Received: by mail-wr1-x435.google.com with SMTP id m13so5044403wro.12 for ; Thu, 28 Jan 2021 03:42:14 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b1B4mJgR4lBgZjUMT6hbN8S40F1jQ2hPVu8gVSF71KA=; b=nJnN1/bx5Nl8WjOxtEqdcektnoYoyWE4KDZhFymddjOaw7KkFgpBtOUHevHhJzkH// 7JGlqa9q/xs7L3n9PWCn/3Qc0AvNkt1ReMPy2gMcDa/PbBvAYgckYWJrysmIHwZZ7UG0 n+1urKVBjllMpbgsrKzb0p/OSCtVHn3E9wjR/kq0UqQICEGzqkxslIv3u7qcG1C2o9lr qRnvnOhINBPH+SVyKg+lcGVX2xJthm+VVlDoamxZp0aYgaFbRUW9qeR5DpyNciLvOP+h FnpwIwmiXAP9pYaksAYcZefsVBAF3/l7T4u1rQQm4fWZMsQsBNiHBa5zy2fBTq9dfkN5 autQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b1B4mJgR4lBgZjUMT6hbN8S40F1jQ2hPVu8gVSF71KA=; b=oQPxbLsNn+EVSoZGcd3zTmlKGEiVojsTIEaQ7ybb44gS5zhpBrFUFsahPy30WIRTeH vQU0rEPPf5RT3A+wPqJwq+bZbC3D0svd3ZTtpr0KxRHorFdwyVFDQ43v5nk7PLi9D5rN FD/YZvrqUEc/m1CsZgqm0Otmn9zqFjdbheOxYRJ8d3ibWyzbt9R54cpDzqwXYTgjuapP 3/aKxYUErN+ovFc3deSF0u6m8aLLYd0QPA35xkyl4iSRBFz3ZF2XrfGj20oCsmrhhDyX 4dD+X3rVIGX0GLdjmi3u3pfuVnotiwawvKkVjsD+GCaVD2W4ymBTYSc6TJNMbMfwVFbu //OQ== X-Gm-Message-State: AOAM532brGTRb0ayG7qmW5iyA+b7CJP9e9Qu0qS40l2TMlfhWwF/x3+i wHVcyyAvNqNSxWQZt/rdp4ztUw== X-Google-Smtp-Source: ABdhPJwvpVt4KxD32VAcHVATOwE/tj2D7nLdjsSQ1kiLcl51VbJzBJyKCS2VCypZy5JNxKfeC+kNPQ== X-Received: by 2002:a05:6000:1547:: with SMTP id 7mr15911775wry.301.1611834133981; Thu, 28 Jan 2021 03:42:13 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 24/25] arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSE Date: Thu, 28 Jan 2021 11:41:44 +0000 Message-Id: <20210128114145.20536-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Now no users are setting the frq properties on the CMSDK timer, dualtimer, watchdog or ARMSSE SoC devices, we can remove the properties and the struct fields that back them. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20210121190622.22000-25-peter.maydell@linaro.org Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/armsse.h | 2 -- include/hw/timer/cmsdk-apb-dualtimer.h | 2 -- include/hw/timer/cmsdk-apb-timer.h | 2 -- include/hw/watchdog/cmsdk-apb-watchdog.h | 2 -- hw/arm/armsse.c | 2 -- hw/timer/cmsdk-apb-dualtimer.c | 6 ------ hw/timer/cmsdk-apb-timer.c | 6 ------ hw/watchdog/cmsdk-apb-watchdog.c | 6 ------ 8 files changed, 28 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index bfa1e79c4fe..676cd4f36b0 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -41,7 +41,6 @@ * + Clock input "S32KCLK": slow 32KHz clock used for a few peripherals * + QOM property "memory" is a MemoryRegion containing the devices provi= ded * by the board model. - * + QOM property "MAINCLK_FRQ" is the frequency of the main system clock * + QOM property "EXP_NUMIRQ" sets the number of expansion interrupts. * (In hardware, the SSE-200 permits the number of expansion interrupts * for the two CPUs to be configured separately, but we restrict it to @@ -218,7 +217,6 @@ struct ARMSSE { /* Properties */ MemoryRegion *board_memory; uint32_t exp_numirq; - uint32_t mainclk_frq; uint32_t sram_addr_width; uint32_t init_svtor; bool cpu_fpu[SSE_MAX_CPUS]; diff --git a/include/hw/timer/cmsdk-apb-dualtimer.h b/include/hw/timer/cmsd= k-apb-dualtimer.h index 3adbb01dd34..f3ec86c00b5 100644 --- a/include/hw/timer/cmsdk-apb-dualtimer.h +++ b/include/hw/timer/cmsdk-apb-dualtimer.h @@ -16,7 +16,6 @@ * https://developer.arm.com/products/system-design/system-design-kits/cor= tex-m-system-design-kit * * QEMU interface: - * + QOM property "pclk-frq": frequency at which the timer is clocked * + Clock input "TIMCLK": clock (for both timers) * + sysbus MMIO region 0: the register bank * + sysbus IRQ 0: combined timer interrupt TIMINTC @@ -63,7 +62,6 @@ struct CMSDKAPBDualTimer { /*< public >*/ MemoryRegion iomem; qemu_irq timerintc; - uint32_t pclk_frq; Clock *timclk; =20 CMSDKAPBDualTimerModule timermod[CMSDK_APB_DUALTIMER_NUM_MODULES]; diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-ap= b-timer.h index 54f7ec8c502..c4c7eae8499 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -23,7 +23,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBTimer, CMSDK_APB_TIMER) =20 /* * QEMU interface: - * + QOM property "pclk-frq": frequency at which the timer is clocked * + Clock input "pclk": clock for the timer * + sysbus MMIO region 0: the register bank * + sysbus IRQ 0: timer interrupt TIMERINT @@ -35,7 +34,6 @@ struct CMSDKAPBTimer { /*< public >*/ MemoryRegion iomem; qemu_irq timerint; - uint32_t pclk_frq; struct ptimer_state *timer; Clock *pclk; =20 diff --git a/include/hw/watchdog/cmsdk-apb-watchdog.h b/include/hw/watchdog= /cmsdk-apb-watchdog.h index 34069ca6969..c6b3e78731e 100644 --- a/include/hw/watchdog/cmsdk-apb-watchdog.h +++ b/include/hw/watchdog/cmsdk-apb-watchdog.h @@ -16,7 +16,6 @@ * https://developer.arm.com/products/system-design/system-design-kits/cor= tex-m-system-design-kit * * QEMU interface: - * + QOM property "wdogclk-frq": frequency at which the watchdog is clock= ed * + Clock input "WDOGCLK": clock for the watchdog's timer * + sysbus MMIO region 0: the register bank * + sysbus IRQ 0: watchdog interrupt @@ -53,7 +52,6 @@ struct CMSDKAPBWatchdog { /*< public >*/ MemoryRegion iomem; qemu_irq wdogint; - uint32_t wdogclk_frq; bool is_luminary; struct ptimer_state *timer; Clock *wdogclk; diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 34855e667de..26e1a8c95b6 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -48,7 +48,6 @@ static Property iotkit_properties[] =3D { DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64), - DEFINE_PROP_UINT32("MAINCLK_FRQ", ARMSSE, mainclk_frq, 0), DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15), DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000), DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], true), @@ -60,7 +59,6 @@ static Property armsse_properties[] =3D { DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64), - DEFINE_PROP_UINT32("MAINCLK_FRQ", ARMSSE, mainclk_frq, 0), DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15), DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000), DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], false), diff --git a/hw/timer/cmsdk-apb-dualtimer.c b/hw/timer/cmsdk-apb-dualtimer.c index 828127b366f..ef49f5852d3 100644 --- a/hw/timer/cmsdk-apb-dualtimer.c +++ b/hw/timer/cmsdk-apb-dualtimer.c @@ -533,11 +533,6 @@ static const VMStateDescription cmsdk_apb_dualtimer_vm= state =3D { } }; =20 -static Property cmsdk_apb_dualtimer_properties[] =3D { - DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBDualTimer, pclk_frq, 0), - DEFINE_PROP_END_OF_LIST(), -}; - static void cmsdk_apb_dualtimer_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -545,7 +540,6 @@ static void cmsdk_apb_dualtimer_class_init(ObjectClass = *klass, void *data) dc->realize =3D cmsdk_apb_dualtimer_realize; dc->vmsd =3D &cmsdk_apb_dualtimer_vmstate; dc->reset =3D cmsdk_apb_dualtimer_reset; - device_class_set_props(dc, cmsdk_apb_dualtimer_properties); } =20 static const TypeInfo cmsdk_apb_dualtimer_info =3D { diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index f053146d88f..ee51ce3369c 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -261,11 +261,6 @@ static const VMStateDescription cmsdk_apb_timer_vmstat= e =3D { } }; =20 -static Property cmsdk_apb_timer_properties[] =3D { - DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBTimer, pclk_frq, 0), - DEFINE_PROP_END_OF_LIST(), -}; - static void cmsdk_apb_timer_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -273,7 +268,6 @@ static void cmsdk_apb_timer_class_init(ObjectClass *kla= ss, void *data) dc->realize =3D cmsdk_apb_timer_realize; dc->vmsd =3D &cmsdk_apb_timer_vmstate; dc->reset =3D cmsdk_apb_timer_reset; - device_class_set_props(dc, cmsdk_apb_timer_properties); } =20 static const TypeInfo cmsdk_apb_timer_info =3D { diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-watch= dog.c index 9cad0c67da4..302f1711738 100644 --- a/hw/watchdog/cmsdk-apb-watchdog.c +++ b/hw/watchdog/cmsdk-apb-watchdog.c @@ -373,11 +373,6 @@ static const VMStateDescription cmsdk_apb_watchdog_vms= tate =3D { } }; =20 -static Property cmsdk_apb_watchdog_properties[] =3D { - DEFINE_PROP_UINT32("wdogclk-frq", CMSDKAPBWatchdog, wdogclk_frq, 0), - DEFINE_PROP_END_OF_LIST(), -}; - static void cmsdk_apb_watchdog_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -385,7 +380,6 @@ static void cmsdk_apb_watchdog_class_init(ObjectClass *= klass, void *data) dc->realize =3D cmsdk_apb_watchdog_realize; dc->vmsd =3D &cmsdk_apb_watchdog_vmstate; dc->reset =3D cmsdk_apb_watchdog_reset; - device_class_set_props(dc, cmsdk_apb_watchdog_properties); } =20 static const TypeInfo cmsdk_apb_watchdog_info =3D { --=20 2.20.1 From nobody Fri May 17 12:49:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1611834772; cv=none; d=zohomail.com; s=zohoarc; b=H2bAQBciBX5t73tYMBAQcw2YJWnweGnv6u/W+7PQTqGCw93/eFm2yObOHe4EfzDoXW+a+yZl0VY0u2f6dU+D7BFK3i9Yl861CFGuubK/l9fl2qTMZPtUT2ghnfrsF6sL1/EvA1Q8tu/IUdBeaw9ATQM8SWq8pNlHg+qwReU/ucc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611834772; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=pwpcLBXHOvRWj5QvyfZ6n6CIKMm7bWYCXZk6VnOW8cY=; b=FPVFmDW8MvF/Z/rdI5YiftymXciwGVgwzlhsOs8sOTuvJNi0MsdYH1TywwN1V00bQTDP/xJty0V4tr6yCHamqdzjVHTXw6p6+i81ZaujiGZ9wjrNi4B5RAE+NR4Fo7IdYP9i5GKWlnt5rYWOy1JqulAetdFzOHbO+AHJQ9iqgyA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1611834772328116.61800349890098; Thu, 28 Jan 2021 03:52:52 -0800 (PST) Received: from localhost ([::1]:37358 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l55r1-0007Wm-BA for importer@patchew.org; Thu, 28 Jan 2021 06:52:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34166) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l55gx-0001pC-8E for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:27 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:51114) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l55gm-0006G2-KZ for qemu-devel@nongnu.org; Thu, 28 Jan 2021 06:42:26 -0500 Received: by mail-wm1-x32e.google.com with SMTP id 190so4054465wmz.0 for ; Thu, 28 Jan 2021 03:42:15 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id q9sm6431033wme.18.2021.01.28.03.42.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 03:42:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pwpcLBXHOvRWj5QvyfZ6n6CIKMm7bWYCXZk6VnOW8cY=; b=LT3QeIr0r0xqgkpylzUf7BFx4Y+5U3eRFVm3/k7Px4fwmb3VTYGRikIPbYbTBhhPcn nAwEIBFTXFTOQgvnzHYRF0BQBxKGe8gixy05dXjj6uQUYKty2jGcV+eqNtHBgnTUtrDZ QWUnLuRaTqBoaJorwcum9I+s3sMjkDszgKlEaWBW8IfB+rhVWa0rqi5Cm+fFK+PBEsol 0LNeDLieDSqGNdHjPgQ5EwnZj5xoTsZI7RO0wbVewlr8LXOJ7Mvq+ZICwEpRR/1ItPrt qvekhU76tcc/lmoyC4D4U2VigSNcuS9h6rnv9ozN0jMLdwTm1UFmIb5vtxA3uL6TJ5eg f3IA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pwpcLBXHOvRWj5QvyfZ6n6CIKMm7bWYCXZk6VnOW8cY=; b=VJaWANy/yctrSUNQFOr8GA+h83o5gbaCkFjm6qm8eBuQlKkfVZYwFZnIFYrIUp00ik 2ciK23fU6uRjLpicudlG2NvWOu9JQVaEip3+h6sEt4e13yaeuexPs/+UFOjJdMoKusDT YIB8QCxBDdimZO6AE+hpNPxuxyxJR5mlBjEyZ4Ekq8uUf/KADVVQSXWwcirbG4wdD7g7 97dJFseFiFXWLmdVpfR1c58uX1AwutanNb2bWGHsagyk8ZZ+i8Y6ZQOFjeQt4OcUr3j0 x5aotx9jV99/xHwbTUEyB3P8zz16Fp0vF41xs1vpUUN0vKY3HI4cAcifN6JxQpQyUCFp gAAg== X-Gm-Message-State: AOAM531Et80+kYeS2hLRu9tB8aQ2/Dn0ONCNZwXXvT5iIEX5FfFpcYDz JzZzkBcTieoI5Z3s/o+Gfi6OZO5A4SZldA== X-Google-Smtp-Source: ABdhPJzb234Wp+hSBt6KPmuO8DPI3ey+5NFofyy/JM/bB3oP+kiLPIOJiDl6hUBWFOAYz2S/sjv2yA== X-Received: by 2002:a1c:408b:: with SMTP id n133mr8350905wma.103.1611834135053; Thu, 28 Jan 2021 03:42:15 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 25/25] hw/arm/stellaris: Remove board-creation reset of STELLARIS_SYS Date: Thu, 28 Jan 2021 11:41:45 +0000 Message-Id: <20210128114145.20536-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210128114145.20536-1-peter.maydell@linaro.org> References: <20210128114145.20536-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luc Michel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Now that the watchdog device uses its Clock input rather than being passed the value of system_clock_scale at creation time, we can remove the hack where we reset the STELLARIS_SYS at board creation time to force it to set system_clock_scale. Instead it will be reset at the usual point in startup and will inform the watchdog of the clock frequency at that point. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20210121190622.22000-26-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/stellaris.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 5acb043a07e..ad72c0959f1 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -780,16 +780,6 @@ static DeviceState *stellaris_sys_init(uint32_t base, = qemu_irq irq, sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, irq); =20 - /* - * Normally we should not be resetting devices like this during - * board creation. For the moment we need to do so, because - * system_clock_scale will only get set when the STELLARIS_SYS - * device is reset, and we need its initial value to pass to - * the watchdog device. This hack can be removed once the - * watchdog has been converted to use a Clock input instead. - */ - device_cold_reset(dev); - return dev; } =20 --=20 2.20.1