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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 25/33] target/arm: Update ZIP, UZP, TRN for pred_desc
Date: Tue, 19 Jan 2021 15:10:56 +0000
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From: Richard Henderson <richard.henderson@linaro.org>
Update all users of do_perm_pred3 for the new
predicate descriptor field definitions.
Cc: qemu-stable@nongnu.org
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210113062650.593824-4-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/sve_helper.c | 18 +++++++++---------
target/arm/translate-sve.c | 12 ++++--------
2 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index ff01851bf28..7eec4b6b73a 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -1868,9 +1868,9 @@ static uint64_t compress_bits(uint64_t x, int n)
=20
void HELPER(sve_zip_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
{
- intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2;
- int esz =3D extract32(pred_desc, SIMD_DATA_SHIFT, 2);
- intptr_t high =3D extract32(pred_desc, SIMD_DATA_SHIFT + 2, 1);
+ intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
+ int esz =3D FIELD_EX32(pred_desc, PREDDESC, ESZ);
+ intptr_t high =3D FIELD_EX32(pred_desc, PREDDESC, DATA);
uint64_t *d =3D vd;
intptr_t i;
=20
@@ -1929,9 +1929,9 @@ void HELPER(sve_zip_p)(void *vd, void *vn, void *vm, =
uint32_t pred_desc)
=20
void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
{
- intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2;
- int esz =3D extract32(pred_desc, SIMD_DATA_SHIFT, 2);
- int odd =3D extract32(pred_desc, SIMD_DATA_SHIFT + 2, 1) << esz;
+ intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
+ int esz =3D FIELD_EX32(pred_desc, PREDDESC, ESZ);
+ int odd =3D FIELD_EX32(pred_desc, PREDDESC, DATA) << esz;
uint64_t *d =3D vd, *n =3D vn, *m =3D vm;
uint64_t l, h;
intptr_t i;
@@ -1986,9 +1986,9 @@ void HELPER(sve_uzp_p)(void *vd, void *vn, void *vm, =
uint32_t pred_desc)
=20
void HELPER(sve_trn_p)(void *vd, void *vn, void *vm, uint32_t pred_desc)
{
- intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2;
- uintptr_t esz =3D extract32(pred_desc, SIMD_DATA_SHIFT, 2);
- bool odd =3D extract32(pred_desc, SIMD_DATA_SHIFT + 2, 1);
+ intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
+ int esz =3D FIELD_EX32(pred_desc, PREDDESC, ESZ);
+ int odd =3D FIELD_EX32(pred_desc, PREDDESC, DATA);
uint64_t *d =3D vd, *n =3D vn, *m =3D vm;
uint64_t mask;
int shr, shl;
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index efcb646f729..0baca176a09 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -2110,19 +2110,15 @@ static bool do_perm_pred3(DisasContext *s, arg_rrr_=
esz *a, bool high_odd,
=20
unsigned vsz =3D pred_full_reg_size(s);
=20
- /* Predicate sizes may be smaller and cannot use simd_desc.
- We cannot round up, as we do elsewhere, because we need
- the exact size for ZIP2 and REV. We retain the style for
- the other helpers for consistency. */
TCGv_ptr t_d =3D tcg_temp_new_ptr();
TCGv_ptr t_n =3D tcg_temp_new_ptr();
TCGv_ptr t_m =3D tcg_temp_new_ptr();
TCGv_i32 t_desc;
- int desc;
+ uint32_t desc =3D 0;
=20
- desc =3D vsz - 2;
- desc =3D deposit32(desc, SIMD_DATA_SHIFT, 2, a->esz);
- desc =3D deposit32(desc, SIMD_DATA_SHIFT + 2, 2, high_odd);
+ desc =3D FIELD_DP32(desc, PREDDESC, OPRSZ, vsz);
+ desc =3D FIELD_DP32(desc, PREDDESC, ESZ, a->esz);
+ desc =3D FIELD_DP32(desc, PREDDESC, DATA, high_odd);
=20
tcg_gen_addi_ptr(t_d, cpu_env, pred_full_reg_offset(s, a->rd));
tcg_gen_addi_ptr(t_n, cpu_env, pred_full_reg_offset(s, a->rn));
--=20
2.20.1