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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 24/33] target/arm: Update PFIRST, PNEXT for pred_desc
Date: Tue, 19 Jan 2021 15:10:55 +0000
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From: Richard Henderson <richard.henderson@linaro.org>
These two were odd, in that do_pfirst_pnext passed the
count of 64-bit words rather than bytes. Change to pass
the standard pred_full_reg_size to avoid confusion.
Cc: qemu-stable@nongnu.org
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210113062650.593824-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/sve_helper.c | 7 ++++---
target/arm/translate-sve.c | 6 +++---
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 5f037c3a8f8..ff01851bf28 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -889,8 +889,9 @@ static intptr_t last_active_element(uint64_t *g, intptr=
_t words, intptr_t esz)
return (intptr_t)-1 << esz;
}
=20
-uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t words)
+uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t pred_desc)
{
+ intptr_t words =3D DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ)=
, 8);
uint32_t flags =3D PREDTEST_INIT;
uint64_t *d =3D vd, *g =3D vg;
intptr_t i =3D 0;
@@ -914,8 +915,8 @@ uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_=
t words)
=20
uint32_t HELPER(sve_pnext)(void *vd, void *vg, uint32_t pred_desc)
{
- intptr_t words =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS);
- intptr_t esz =3D extract32(pred_desc, SIMD_DATA_SHIFT, 2);
+ intptr_t words =3D DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ)=
, 8);
+ intptr_t esz =3D FIELD_EX32(pred_desc, PREDDESC, ESZ);
uint32_t flags =3D PREDTEST_INIT;
uint64_t *d =3D vd, *g =3D vg, esz_mask;
intptr_t i, next;
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 0c3a6d21210..efcb646f729 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -1494,10 +1494,10 @@ static bool do_pfirst_pnext(DisasContext *s, arg_rr=
_esz *a,
TCGv_ptr t_pd =3D tcg_temp_new_ptr();
TCGv_ptr t_pg =3D tcg_temp_new_ptr();
TCGv_i32 t;
- unsigned desc;
+ unsigned desc =3D 0;
=20
- desc =3D DIV_ROUND_UP(pred_full_reg_size(s), 8);
- desc =3D deposit32(desc, SIMD_DATA_SHIFT, 2, a->esz);
+ desc =3D FIELD_DP32(desc, PREDDESC, OPRSZ, pred_full_reg_size(s));
+ desc =3D FIELD_DP32(desc, PREDDESC, ESZ, a->esz);
=20
tcg_gen_addi_ptr(t_pd, cpu_env, pred_full_reg_offset(s, a->rd));
tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, a->rn));
--=20
2.20.1