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[88.10.103.241]) by smtp.gmail.com with ESMTPSA id c20sm9452590wmb.38.2021.01.07.14.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 14:26:37 -0800 (PST) X-MC-Unique: h0Pw8-WCM2eHo3D8XbQzGQ-1 X-MC-Unique: pqEoUYosMQmBPXA_D3nJnA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=DQ4NcLmRVy40lLGUZw2vzkfPGYpNttR3tCsf5kFmz/8=; b=FwXLdCYiMPqUtdyJsztrp7TbEl+BMM8ymXuj/2JSYilW+Vmwp0y82FpExsN7VeURIZ xEVmp2FHVL9uPCe9omx0uPjO62qMS6ybcHoBk9OAuuItXtxH6zEZ7AjNQl1Zc67/zU14 3f1Cig87XdeGUT6WGLxVg67XPf2fcIuXSeNXConYn4Mdj0hhOmSzitlDLjoA6FBgKA08 X/l4HqOdeDZc+BlX5XUPj4M5XWs9rRVzZtGmEl4ILxfO0h66g7Ws+ejfFNwOvdrJD315 8G+/XjBvYFGvPkek4tPTcyRQJ8CwVgU3jRgG9gEo+03emQ0oqfe/H1hAqDjdnxy6EC2Z IPJg== X-Gm-Message-State: AOAM532QxCISqIBo5jZrA5+d1LqY9EsHwZgcQhDeKfUTvqsY/POodv/a djlV4jFSHkVsgZBlP8K8Mjg= X-Google-Smtp-Source: ABdhPJzthOoRVhYBVewfdJ5SzxIvoMQCudwx3jqR+BRb0cS7J1Aphov0/3GbpoYqe8QCK8ssEDuSNA== X-Received: by 2002:a5d:4704:: with SMTP id y4mr670512wrq.358.1610058397783; Thu, 07 Jan 2021 14:26:37 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 43/66] target/mips: Extract msa_translate_init() from mips_tcg_init() Date: Thu, 7 Jan 2021 23:22:30 +0100 Message-Id: <20210107222253.20382-44-f4bug@amsat.org> In-Reply-To: <20210107222253.20382-1-f4bug@amsat.org> References: <20210107222253.20382-1-f4bug@amsat.org> MIME-Version: 1.0 X-Mimecast-Impersonation-Protect: Policy=CLT - Impersonation Protection Definition; Similar Internal Domain=false; Similar Monitored External Domain=false; Custom External Domain=false; Mimecast External Domain=false; Newly Observed Domain=false; Internal User Name=false; Custom Display Name List=false; Reply-to Address Mismatch=false; Targeted Threat Dictionary=false; Mimecast Threat Dictionary=false; Custom Threat Dictionary=false X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-loop: libvir-list@redhat.com Cc: Aleksandar Rikalo , Paul Burton , kvm@vger.kernel.org, libvir-list@redhat.com, Huacai Chen , Richard Henderson , Laurent Vivier , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Aurelien Jarno X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The msa_wr_d[] registers are only initialized/used by MSA. They are declared static. We want to move them to the new 'msa_translate.c' unit in few commits, without having to declare them global (with extern). Extract first the logic initialization of the MSA registers from the generic initialization. We will later move this function along with the MSA registers to the new C unit. Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Jiaxun Yang Message-Id: <20201208003702.4088927-8-f4bug@amsat.org> --- target/mips/translate.h | 3 +++ target/mips/translate.c | 33 +++++++++++++++++++-------------- 2 files changed, 22 insertions(+), 14 deletions(-) diff --git a/target/mips/translate.h b/target/mips/translate.h index 402bc5e8846..b9cd315c7f4 100644 --- a/target/mips/translate.h +++ b/target/mips/translate.h @@ -162,4 +162,7 @@ extern TCGv bcond; } = \ } while (0) =20 +/* MSA */ +void msa_translate_init(void); + #endif diff --git a/target/mips/translate.c b/target/mips/translate.c index 30354fee828..bb9420b9f7f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31551,6 +31551,24 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, in= t flags) } } =20 +void msa_translate_init(void) +{ + int i; + + for (i =3D 0; i < 32; i++) { + int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); + + /* + * The MSA vector registers are mapped on the + * scalar floating-point unit (FPU) registers. + */ + msa_wr_d[i * 2] =3D fpu_f64[i]; + off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); + msa_wr_d[i * 2 + 1] =3D + tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1= ]); + } +} + void mips_tcg_init(void) { int i; @@ -31566,20 +31584,7 @@ void mips_tcg_init(void) =20 fpu_f64[i] =3D tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); } - /* MSA */ - for (i =3D 0; i < 32; i++) { - int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); - - /* - * The MSA vector registers are mapped on the - * scalar floating-point unit (FPU) registers. - */ - msa_wr_d[i * 2] =3D fpu_f64[i]; - off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); - msa_wr_d[i * 2 + 1] =3D - tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1= ]); - } - + msa_translate_init(); cpu_PC =3D tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, active_tc.PC), "PC"= ); for (i =3D 0; i < MIPS_DSP_ACC; i++) { --=20 2.26.2