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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.h | 2 +- tcg/mips/tcg-target.c.inc | 43 ++++++++++++++++++++++----------------- 2 files changed, 25 insertions(+), 20 deletions(-) diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index fbfe775fb4..ed5c347374 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -201,7 +201,7 @@ extern bool use_mips32r2_instructions; =20 #define TCG_TARGET_DEFAULT_MO (0) #define TCG_TARGET_HAS_MEMORY_BSWAP 1 -#define TCG_TARGET_SUPPORT_MIRROR 0 +#define TCG_TARGET_SUPPORT_MIRROR 1 =20 void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t); =20 diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 37faf1356c..a2201bd1dd 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -139,17 +139,18 @@ static const TCGReg tcg_target_call_oarg_regs[2] =3D { TCG_REG_V1 }; =20 -static tcg_insn_unit *tb_ret_addr; -static tcg_insn_unit *bswap32_addr; -static tcg_insn_unit *bswap32u_addr; -static tcg_insn_unit *bswap64_addr; +static const tcg_insn_unit *tb_ret_addr; +static const tcg_insn_unit *bswap32_addr; +static const tcg_insn_unit *bswap32u_addr; +static const tcg_insn_unit *bswap64_addr; =20 -static bool reloc_pc16(tcg_insn_unit *pc, const tcg_insn_unit *target) +static bool reloc_pc16(tcg_insn_unit *src_rw, const tcg_insn_unit *target) { /* Let the compiler perform the right-shift as part of the arithmetic.= */ - ptrdiff_t disp =3D target - (pc + 1); + const tcg_insn_unit *src_rx =3D tcg_splitwx_to_rx(src_rw); + ptrdiff_t disp =3D target - (src_rx + 1); if (disp =3D=3D (int16_t)disp) { - *pc =3D deposit32(*pc, 0, 16, disp); + *src_rw =3D deposit32(*src_rw, 0, 16, disp); return true; } return false; @@ -505,7 +506,7 @@ static void tcg_out_opc_sa64(TCGContext *s, MIPSInsn op= c1, MIPSInsn opc2, static bool tcg_out_opc_jmp(TCGContext *s, MIPSInsn opc, const void *targe= t) { uintptr_t dest =3D (uintptr_t)target; - uintptr_t from =3D (uintptr_t)s->code_ptr + 4; + uintptr_t from =3D (uintptr_t)tcg_splitwx_to_rx(s->code_ptr) + 4; int32_t inst; =20 /* The pc-region branch happens within the 256MB region of @@ -617,7 +618,7 @@ static inline void tcg_out_bswap16s(TCGContext *s, TCGR= eg ret, TCGReg arg) } } =20 -static void tcg_out_bswap_subr(TCGContext *s, tcg_insn_unit *sub) +static void tcg_out_bswap_subr(TCGContext *s, const tcg_insn_unit *sub) { bool ok =3D tcg_out_opc_jmp(s, OPC_JAL, sub); tcg_debug_assert(ok); @@ -1282,7 +1283,8 @@ static void add_qemu_ldst_label(TCGContext *s, int is= _ld, TCGMemOpIdx oi, label->datahi_reg =3D datahi; label->addrlo_reg =3D addrlo; label->addrhi_reg =3D addrhi; - label->raddr =3D raddr; + /* TODO: Cast goes away when all hosts converted */ + label->raddr =3D (void *)tcg_splitwx_to_rx(raddr); label->label_ptr[0] =3D label_ptr[0]; if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { label->label_ptr[1] =3D label_ptr[1]; @@ -1291,15 +1293,16 @@ static void add_qemu_ldst_label(TCGContext *s, int = is_ld, TCGMemOpIdx oi, =20 static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { + const tcg_insn_unit *tgt_rx =3D tcg_splitwx_to_rx(s->code_ptr); TCGMemOpIdx oi =3D l->oi; MemOp opc =3D get_memop(oi); TCGReg v0; int i; =20 /* resolve label address */ - if (!reloc_pc16(l->label_ptr[0], s->code_ptr) + if (!reloc_pc16(l->label_ptr[0], tgt_rx) || (TCG_TARGET_REG_BITS < TARGET_LONG_BITS - && !reloc_pc16(l->label_ptr[1], s->code_ptr))) { + && !reloc_pc16(l->label_ptr[1], tgt_rx))) { return false; } =20 @@ -1344,15 +1347,16 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s= , TCGLabelQemuLdst *l) =20 static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { + const tcg_insn_unit *tgt_rx =3D tcg_splitwx_to_rx(s->code_ptr); TCGMemOpIdx oi =3D l->oi; MemOp opc =3D get_memop(oi); MemOp s_bits =3D opc & MO_SIZE; int i; =20 /* resolve label address */ - if (!reloc_pc16(l->label_ptr[0], s->code_ptr) + if (!reloc_pc16(l->label_ptr[0], tgt_rx) || (TCG_TARGET_REG_BITS < TARGET_LONG_BITS - && !reloc_pc16(l->label_ptr[1], s->code_ptr))) { + && !reloc_pc16(l->label_ptr[1], tgt_rx))) { return false; } =20 @@ -2469,11 +2473,12 @@ static void tcg_target_qemu_prologue(TCGContext *s) * Return path for goto_ptr. Set return value to 0, a-la exit_tb, * and fall through to the rest of the epilogue. */ - tcg_code_gen_epilogue =3D s->code_ptr; + /* TODO: Cast goes away when all hosts converted */ + tcg_code_gen_epilogue =3D (void *)tcg_splitwx_to_rx(s->code_ptr); tcg_out_mov(s, TCG_TYPE_REG, TCG_REG_V0, TCG_REG_ZERO); =20 /* TB epilogue */ - tb_ret_addr =3D s->code_ptr; + tb_ret_addr =3D tcg_splitwx_to_rx(s->code_ptr); for (i =3D 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) { tcg_out_ld(s, TCG_TYPE_REG, tcg_target_callee_save_regs[i], TCG_REG_SP, SAVE_OFS + i * REG_SIZE); @@ -2493,7 +2498,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* * bswap32 -- 32-bit swap (signed result for mips64). a0 =3D abcd. */ - bswap32_addr =3D align_code_ptr(s); + bswap32_addr =3D tcg_splitwx_to_rx(align_code_ptr(s)); /* t3 =3D (ssss)d000 */ tcg_out_opc_sa(s, OPC_SLL, TCG_TMP3, TCG_TMP0, 24); /* t1 =3D 000a */ @@ -2521,7 +2526,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* * bswap32u -- unsigned 32-bit swap. a0 =3D ....abcd. */ - bswap32u_addr =3D align_code_ptr(s); + bswap32u_addr =3D tcg_splitwx_to_rx(align_code_ptr(s)); /* t1 =3D (0000)000d */ tcg_out_opc_imm(s, OPC_ANDI, TCG_TMP1, TCG_TMP0, 0xff); /* t3 =3D 000a */ @@ -2547,7 +2552,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* * bswap64 -- 64-bit swap. a0 =3D abcdefgh */ - bswap64_addr =3D align_code_ptr(s); + bswap64_addr =3D tcg_splitwx_to_rx(align_code_ptr(s)); /* t3 =3D h0000000 */ tcg_out_dsll(s, TCG_TMP3, TCG_TMP0, 56); /* t1 =3D 0000000a */ --=20 2.25.1