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[88.10.103.241]) by smtp.gmail.com with ESMTPSA id u26sm1148256wmm.24.2021.01.04.14.12.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jan 2021 14:12:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R7Zokvaf4P4DDS/Ik2Al7Dbfod5TeXUavdYyR3ya+5E=; b=MZbkZF26uB+3tr8PXNXP86R9z7n3OhJf14S1iZdw0jwtsK3Pid2k7rcwZuSiGXSyTL bXe/csqdQ0T4Tcn8/gyCXArnUvQn6pmz6l+49h0wYvmCohTBoHMERcvGOXor7VjpsknG FUeL1tsB8WyjYb4fLKWFb/c+KOzLrBhA0/QkJE/uVCwIWyNSAgHZjMR60oKXu0+ipdKX QNUTZKudWyP3LMpYwtTope6lqQIz8GsOp9D95i0s/BWzZnqaiC/ekmAn6fKfJUKLvbVh 14r10igKs3V2tkp9ztwBIjoSraYBvsnIb67G6SHpAKPlp4WFoQqJdG9Mzg7VwuHHUn06 tqTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=R7Zokvaf4P4DDS/Ik2Al7Dbfod5TeXUavdYyR3ya+5E=; b=SaxZ3WnRzke5dKfJRjZjbWVk/hoTOdcOpySb9gzvs2APYQDBpws5W8L90Y8EQQiewz mHa+s575ZGbU5+eos6EtvnkSr8xirfnAV5Z01gCCoejnMXtyNLcS06XG8uHUGReJLuvm lgj8ueWahR6QuZufnGeN0NNVlITgc5BiHzGegerJ/57FlgC3e4aX9ujhYFQzHklOhtrN fLftWpPZ27iKebmi1a6ZM1iOehK+du3EPkM7WcrPqlGLV69KGoQkW3vJydcBgDy0cFAD W0Fub1FllQju3uFvyzlaXujJKsVTYyI0u5yCcS6LMmZP6BuK7QKt2kEXKF0/E/ZleGDP rjPw== X-Gm-Message-State: AOAM530nEjxLF+rfDICknxW/vRVEkZG4thEqmwmZffidV+9tNY+g7N/K ZgQ0EvCQhuyaRVIom0VLCZY= X-Google-Smtp-Source: ABdhPJwAis58vSm7ZKecqPQC0BZoKBIV3xFktINRlCsnNue7ZCk9QhLMBkSo1iuMj8UgVpUqBG35dw== X-Received: by 2002:adf:9467:: with SMTP id 94mr84116673wrq.235.1609798364989; Mon, 04 Jan 2021 14:12:44 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Aurelien Jarno , Richard Henderson , Paul Burton , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 09/15] target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5 Date: Mon, 4 Jan 2021 23:11:48 +0100 Message-Id: <20210104221154.3127610-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210104221154.3127610-1-f4bug@amsat.org> References: <20210104221154.3127610-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Use the single ISA_MIPS32R5 definition to check if the Release 5 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R5 in few commits. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/mips-defs.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index ccdde0b4a43..b71127ddd7c 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -20,7 +20,6 @@ #define ISA_MIPS32R2 0x0000000000000040ULL #define ISA_MIPS32R3 0x0000000000000200ULL #define ISA_MIPS32R5 0x0000000000000800ULL -#define ISA_MIPS64R5 0x0000000000001000ULL #define ISA_MIPS32R6 0x0000000000002000ULL #define ISA_MIPS64R6 0x0000000000004000ULL #define ISA_NANOMIPS32 0x0000000000008000ULL @@ -84,7 +83,7 @@ =20 /* MIPS Technologies "Release 5" */ #define CPU_MIPS32R5 (CPU_MIPS32R3 | ISA_MIPS32R5) -#define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5) +#define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5) =20 /* MIPS Technologies "Release 6" */ #define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS32R6) --=20 2.26.2