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[83.57.172.194]) by smtp.gmail.com with ESMTPSA id a62sm30534517wmf.7.2021.01.03.12.52.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Jan 2021 12:52:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+YR78/DI/zhbyQEiorzjQWihYyclw/vAey+LLLhqz3U=; b=QMpHhP1au0ADhTZt4oNXMyqjY6kxlTyVgwlV9PvlS1FbJO5g8UYfehIq5Ts7RJCAu1 JBqYQY4tT+u1N+NYTtWshb1oJAjypEtkFpYCZWW4sWSwrVZXUWeWY0hYsgE6849hWcJd U6c5/11SgEoZ7KPVhOV2sq/ygkVtSDhFHZZQJ5x1+jPKLhr/sY8PY7SR89qrSYPtkUf/ 7Gs5bcGPXnxOLT2Xf01BPxVW/q8g7n1piezf5G5NgufsGxMSwH3gvI06dB8JpXCaUOuT 83zzUCyLUJLWb1xiC2g4LaXlsL0DdXAtTzwXgNTwfP+/tF6qXHMW/keYaES4rh0Gh1SK h1XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=+YR78/DI/zhbyQEiorzjQWihYyclw/vAey+LLLhqz3U=; b=qACLS0F2dwVpwWlyYcQ4IZ060uVPCNznybczkJh8ufGqD8nFbgIw4EsGorsbGRx3NS cPVIWkE0DynG5qv9yKWbUgqJt/3tZspGWnDI8KMbRH8N16UmtVRJEQ7IoE92jUMiyzxk XDIqtEhifN5N/WGWS+xMe6HIckyd2Lhhix7QcPq81GoKH3910ZmwxUSH6nHONxOZteta I+X5R7aP3vhGp3Zpc2wsrjQjiNXOqzv8vrs/+bEBkS2icV39QyJJk3X4h2OCV66v49SC Mr1CmsAYELzWGIoGy6ZI6qMuaTbGQybQtZuv0UImmIRoWirIP94SnBouzISkqwHKUNDb f72Q== X-Gm-Message-State: AOAM532zZPHii0zwOX3xYAuvziOGSrRzOU+KXuK2UTk22QSF9y5T3GQt fcJ4+ya3jOL6RSkA0M415Yw= X-Google-Smtp-Source: ABdhPJxCz4p4d74u/c2ZDk8nKSx9qWtWmV58MtnlRI0uNvflJntf8j1LFyjvb65lsSNNeCVO8+zdmQ== X-Received: by 2002:a1c:356:: with SMTP id 83mr24961640wmd.31.1609707139861; Sun, 03 Jan 2021 12:52:19 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aurelien Jarno , Huacai Chen , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 24/35] hw/mips: Implement fw_cfg_arch_key_name() Date: Sun, 3 Jan 2021 21:50:10 +0100 Message-Id: <20210103205021.2837760-25-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210103205021.2837760-1-f4bug@amsat.org> References: <20210103205021.2837760-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) From: Huacai Chen Implement fw_cfg_arch_key_name(), which returns the name of a mips-specific key. Co-developed-by: Jiaxun Yang Signed-off-by: Huacai Chen Signed-off-by: Jiaxun Yang Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20201221110538.3186646-3-chenhuacai@kernel.org> [PMD: Add FW_CFG_MIPS Kconfig selector] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/fw_cfg.h | 19 +++++++++++++++++++ hw/mips/fw_cfg.c | 35 +++++++++++++++++++++++++++++++++++ hw/mips/Kconfig | 3 +++ hw/mips/meson.build | 1 + 4 files changed, 58 insertions(+) create mode 100644 hw/mips/fw_cfg.h create mode 100644 hw/mips/fw_cfg.c diff --git a/hw/mips/fw_cfg.h b/hw/mips/fw_cfg.h new file mode 100644 index 00000000000..e317d5b9a3e --- /dev/null +++ b/hw/mips/fw_cfg.h @@ -0,0 +1,19 @@ +/* + * QEMU fw_cfg helpers (MIPS specific) + * + * Copyright (c) 2020 Huacai Chen + * + * SPDX-License-Identifier: MIT + */ + +#ifndef HW_MIPS_FW_CFG_H +#define HW_MIPS_FW_CFG_H + +#include "hw/boards.h" +#include "hw/nvram/fw_cfg.h" + +/* Data for BIOS to identify machine */ +#define FW_CFG_MACHINE_VERSION (FW_CFG_ARCH_LOCAL + 0) +#define FW_CFG_CPU_FREQ (FW_CFG_ARCH_LOCAL + 1) + +#endif diff --git a/hw/mips/fw_cfg.c b/hw/mips/fw_cfg.c new file mode 100644 index 00000000000..67c4a74f4be --- /dev/null +++ b/hw/mips/fw_cfg.c @@ -0,0 +1,35 @@ +/* + * QEMU fw_cfg helpers (MIPS specific) + * + * Copyright (c) 2020 Lemote, Inc. + * + * Author: + * Huacai Chen (chenhc@lemote.com) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "hw/mips/fw_cfg.h" +#include "hw/nvram/fw_cfg.h" + +const char *fw_cfg_arch_key_name(uint16_t key) +{ + static const struct { + uint16_t key; + const char *name; + } fw_cfg_arch_wellknown_keys[] =3D { + {FW_CFG_MACHINE_VERSION, "machine_version"}, + {FW_CFG_CPU_FREQ, "cpu_frequency"}, + }; + + for (size_t i =3D 0; i < ARRAY_SIZE(fw_cfg_arch_wellknown_keys); i++) { + if (fw_cfg_arch_wellknown_keys[i].key =3D=3D key) { + return fw_cfg_arch_wellknown_keys[i].name; + } + } + return NULL; +} diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 8be70122f4c..64ef42dd3fd 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -38,3 +38,6 @@ config MIPS_CPS =20 config MIPS_BOSTON bool + +config FW_CFG_MIPS + bool diff --git a/hw/mips/meson.build b/hw/mips/meson.build index 77b4d8f365e..ca5e4d0f943 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -1,5 +1,6 @@ mips_ss =3D ss.source_set() mips_ss.add(files('mips_int.c')) +mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c')) mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c')) mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c')) mips_ss.add(when: 'CONFIG_MALTA', if_true: files('gt64xxx_pci.c', 'malta.c= ')) --=20 2.26.2