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Sat, 19 Dec 2020 10:42:48 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, thuth@redhat.com Date: Sat, 19 Dec 2020 10:42:25 +0000 Message-Id: <20201219104229.1964-4-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201219104229.1964-1-mark.cave-ayland@ilande.co.uk> References: <20201219104229.1964-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 86.191.183.22 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH 3/7] macio: move heathrow PIC inside macio-oldworld device X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Signed-off-by: Mark Cave-Ayland --- hw/misc/macio/macio.c | 20 +++++------ hw/ppc/mac_oldworld.c | 66 +++++++++++++++++------------------ include/hw/misc/macio/macio.h | 2 +- 3 files changed, 43 insertions(+), 45 deletions(-) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index bb601f782c..cfb87da6c9 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -140,7 +140,7 @@ static void macio_oldworld_realize(PCIDevice *d, Error = **errp) { MacIOState *s =3D MACIO(d); OldWorldMacIOState *os =3D OLDWORLD_MACIO(d); - DeviceState *pic_dev =3D DEVICE(os->pic); + DeviceState *pic_dev =3D DEVICE(&os->pic); Error *err =3D NULL; SysBusDevice *sysbus_dev; =20 @@ -150,6 +150,14 @@ static void macio_oldworld_realize(PCIDevice *d, Error= **errp) return; } =20 + /* Heathrow PIC */ + if (!qdev_realize(DEVICE(&os->pic), BUS(&s->macio_bus), errp)) { + return; + } + sysbus_dev =3D SYS_BUS_DEVICE(&os->pic); + memory_region_add_subregion(&s->bar, 0x0, + sysbus_mmio_get_region(sysbus_dev, 0)); + qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) { @@ -175,11 +183,6 @@ static void macio_oldworld_realize(PCIDevice *d, Error= **errp) sysbus_mmio_get_region(sysbus_dev, 0)); pmac_format_nvram_partition(&os->nvram, os->nvram.size); =20 - /* Heathrow PIC */ - sysbus_dev =3D SYS_BUS_DEVICE(os->pic); - memory_region_add_subregion(&s->bar, 0x0, - sysbus_mmio_get_region(sysbus_dev, 0)); - /* IDE buses */ macio_realize_ide(s, &os->ide[0], qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), @@ -218,10 +221,7 @@ static void macio_oldworld_init(Object *obj) DeviceState *dev; int i; =20 - object_property_add_link(obj, "pic", TYPE_HEATHROW, - (Object **) &os->pic, - qdev_prop_allow_set_link_before_realize, - 0); + object_initialize_child(OBJECT(s), "pic", &os->pic, TYPE_HEATHROW); =20 object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); =20 diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index e58e0525fe..44ee99be88 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -98,7 +98,7 @@ static void ppc_heathrow_init(MachineState *machine) MACIOIDEState *macio_ide; ESCCState *escc; SysBusDevice *s; - DeviceState *dev, *pic_dev; + DeviceState *dev, *pic_dev, *grackle_dev; BusState *adb_bus; uint64_t bios_addr; int bios_size; @@ -227,10 +227,17 @@ static void ppc_heathrow_init(MachineState *machine) } } =20 + /* Timebase Frequency */ + if (kvm_enabled()) { + tbfreq =3D kvmppc_get_tbfreq(); + } else { + tbfreq =3D TBFREQ; + } + /* Grackle PCI host bridge */ - dev =3D qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE); - qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000); - s =3D SYS_BUS_DEVICE(dev); + grackle_dev =3D qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE); + qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000); + s =3D SYS_BUS_DEVICE(grackle_dev); sysbus_realize_and_unref(s, &error_fatal); =20 sysbus_mmio_map(s, 0, GRACKLE_BASE); @@ -242,14 +249,30 @@ static void ppc_heathrow_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), 0xfe000000, sysbus_mmio_get_region(s, 3)); =20 - /* XXX: we register only 1 output pin for heathrow PIC */ - pic_dev =3D qdev_new(TYPE_HEATHROW); - sysbus_realize_and_unref(SYS_BUS_DEVICE(pic_dev), &error_fatal); + pci_bus =3D PCI_HOST_BRIDGE(grackle_dev)->bus; + + /* MacIO */ + macio =3D pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO); + dev =3D DEVICE(macio); + qdev_prop_set_uint64(dev, "frequency", tbfreq); + + escc =3D ESCC(object_resolve_path_component(OBJECT(macio), "escc")); + qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0)); + qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1)); + + pci_realize_and_unref(macio, pci_bus, &error_fatal); + + pic_dev =3D DEVICE(object_resolve_path_component(OBJECT(macio), "pic")= ); + for (i =3D 0; i < 4; i++) { + qdev_connect_gpio_out(grackle_dev, i, + qdev_get_gpio_in(pic_dev, 0x15 + i)); + } =20 /* Connect the heathrow PIC outputs to the 6xx bus */ for (i =3D 0; i < smp_cpus; i++) { switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_6xx: + /* XXX: we register only 1 output pin for heathrow PIC */ qdev_connect_gpio_out(pic_dev, 0, ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]); break; @@ -259,40 +282,14 @@ static void ppc_heathrow_init(MachineState *machine) } } =20 - /* Timebase Frequency */ - if (kvm_enabled()) { - tbfreq =3D kvmppc_get_tbfreq(); - } else { - tbfreq =3D TBFREQ; - } - - for (i =3D 0; i < 4; i++) { - qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x15 + i)); - } - - pci_bus =3D PCI_HOST_BRIDGE(dev)->bus; - pci_vga_init(pci_bus); =20 for (i =3D 0; i < nb_nics; i++) { pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); } =20 + /* MacIO IDE */ ide_drive_get(hd, ARRAY_SIZE(hd)); - - /* MacIO */ - macio =3D pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO); - dev =3D DEVICE(macio); - qdev_prop_set_uint64(dev, "frequency", tbfreq); - object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev), - &error_abort); - - escc =3D ESCC(object_resolve_path_component(OBJECT(macio), "escc")); - qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0)); - qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1)); - - pci_realize_and_unref(macio, pci_bus, &error_fatal); - macio_ide =3D MACIO_IDE(object_resolve_path_component(OBJECT(macio), "ide[0]")); macio_ide_init_drives(macio_ide, hd); @@ -301,6 +298,7 @@ static void ppc_heathrow_init(MachineState *machine) "ide[1]")); macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); =20 + /* MacIO CUDA/ADB */ dev =3D DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); adb_bus =3D qdev_get_child_bus(dev, "adb.0"); dev =3D qdev_new(TYPE_ADB_KEYBOARD); diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h index 22b4e64b2c..707dfab50c 100644 --- a/include/hw/misc/macio/macio.h +++ b/include/hw/misc/macio/macio.h @@ -99,7 +99,7 @@ struct OldWorldMacIOState { MacIOState parent_obj; /*< public >*/ =20 - HeathrowState *pic; + HeathrowState pic; =20 MacIONVRAMState nvram; MACIOIDEState ide[2]; --=20 2.20.1