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[88.21.206.101]) by smtp.gmail.com with ESMTPSA id f11sm20317375edy.59.2020.12.15.14.59.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Dec 2020 14:59:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r721GGoO1vJJZamWSQ/I62tzPtsotRE5k1CFdAPPmsI=; b=ksGYyZqUjnjTpQUlnJkwvhrtsTgCJRP3j5mC6OARLNZQF2ZrJ1V+UhVw8CojGWW3/3 WO5B8qupZBGOhKvfYWG4DItmratQ+a/4+qPS1HLXosQWnWKkPc/nkPvCs4l+Jov8kDx/ t8HSxfIh8b5woyVg5KHKoYSQqbU2txnbWYDuKV6NSfRJQ/j+skrIqCkyHWey8VVbqiOM XM9lf20J9/7RHu09BygD1EfvPu3uGCxO3lFf1xFqjRZUCHqPNhVX/Xkxqw6aBL8HTfbW UPhbdt4btRRu8RbClKYwtZcbkLrYPvFR9aadTWTEpUQ0BSzijYdMj1wdVlse/Vx66Doe SxkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=r721GGoO1vJJZamWSQ/I62tzPtsotRE5k1CFdAPPmsI=; b=VkySPJNfdhhj4DAj8osCOiQWPXAYpUeVOvaBKA2Vvp8UI639gyxxxBEn+YlIgDzv7i M+YzYCSigmhRk9YbgEG/B3/bfCTcmHE+RFdZMcwXI5U+3xwhKECVfzJNsX79P02KqVC5 77ONNO+PkNqTM45LFRBrh4H3YC9y5ixQQcIMnokpaWZcWY60U4XQXXEvlQmxd+CWOMBM z20oZyW7VluD5CCGGcCpH+I57y3RT1R9QEfsywtXkyoEYozQ/Sg6WnZY3agD8Y14JFkf 4MgOVK1JI1QKeukmt9zyse+1lMaIAWAekF50mTFGxSNiZvly+w/JrSFakk5EWveRHOIv St0w== X-Gm-Message-State: AOAM533lTd3PHHiel+GCebeXT1BCE2q1OW3xmjnAxBAnZrxhgnJoGyzJ sD8fPnt5/gzbJSQoip6MrqQ= X-Google-Smtp-Source: ABdhPJzDX2qNpMB5rixf8fmszl3M6Xc5Sf7KCB17rbtRfsvmzCRyz1COJgMcmCqIhuY2FxDNAuNTPQ== X-Received: by 2002:aa7:d75a:: with SMTP id a26mr30675115eds.230.1608073159415; Tue, 15 Dec 2020 14:59:19 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Richard Henderson , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Huacai Chen Subject: [PATCH v2 14/24] target/mips: Move msa_reset() to mod-msa_helper.c Date: Tue, 15 Dec 2020 23:57:47 +0100 Message-Id: <20201215225757.764263-15-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201215225757.764263-1-f4bug@amsat.org> References: <20201215225757.764263-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) translate_init.c.inc mostly contains CPU definitions. msa_reset() doesn't belong here, move it with the MSA helpers. One comment style is updated to avoid checkpatch.pl warning. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/mips/internal.h | 2 ++ target/mips/cpu.c | 1 + target/mips/mod-msa_helper.c | 36 ++++++++++++++++++++++++++++++++++++ target/mips/cpu-defs.c.inc | 36 ------------------------------------ 4 files changed, 39 insertions(+), 36 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 1ab2454e61d..76269cfc7bb 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -199,6 +199,8 @@ static inline bool cpu_mips_hw_interrupts_pending(CPUMI= PSState *env) =20 void mips_tcg_init(void); =20 +void msa_reset(CPUMIPSState *env); + /* cp0_timer.c */ uint32_t cpu_mips_get_count(CPUMIPSState *env); void cpu_mips_store_count(CPUMIPSState *env, uint32_t value); diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 77ebd94c655..26e110b687e 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -33,6 +33,7 @@ #include "hw/qdev-clock.h" #include "hw/semihosting/semihost.h" #include "qapi/qapi-commands-machine-target.h" +#include "fpu_helper.h" =20 #if !defined(CONFIG_USER_ONLY) =20 diff --git a/target/mips/mod-msa_helper.c b/target/mips/mod-msa_helper.c index b89b4c44902..f0d728c03f0 100644 --- a/target/mips/mod-msa_helper.c +++ b/target/mips/mod-msa_helper.c @@ -8201,3 +8201,39 @@ void helper_msa_ffint_u_df(CPUMIPSState *env, uint32= _t df, uint32_t wd, =20 msa_move_v(pwd, pwx); } + +void msa_reset(CPUMIPSState *env) +{ + if (!ase_msa_available(env)) { + return; + } + +#ifdef CONFIG_USER_ONLY + /* MSA access enabled */ + env->CP0_Config5 |=3D 1 << CP0C5_MSAEn; + env->CP0_Status |=3D (1 << CP0St_CU1) | (1 << CP0St_FR); +#endif + + /* + * MSA CSR: + * - non-signaling floating point exception mode off (NX bit is 0) + * - Cause, Enables, and Flags are all 0 + * - round to nearest / ties to even (RM bits are 0) + */ + env->active_tc.msacsr =3D 0; + + restore_msa_fp_status(env); + + /* tininess detected after rounding.*/ + set_float_detect_tininess(float_tininess_after_rounding, + &env->active_tc.msa_fp_status); + + /* clear float_status exception flags */ + set_float_exception_flags(0, &env->active_tc.msa_fp_status); + + /* clear float_status nan mode */ + set_default_nan_mode(0, &env->active_tc.msa_fp_status); + + /* set proper signanling bit meaning ("1" means "quiet") */ + set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); +} diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index 325b24b8e2c..320ebf29f1f 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -18,8 +18,6 @@ * License along with this library; if not, see . */ =20 -#include "fpu_helper.h" - /* CPU / CPU family specific config register values. */ =20 /* Have config1, uncached coherency */ @@ -973,37 +971,3 @@ static void mvp_init(CPUMIPSState *env) (0x0 << CP0MVPC1_PCX) | (0x0 << CP0MVPC1_PCP2= ) | (0x1 << CP0MVPC1_PCP1); } - -static void msa_reset(CPUMIPSState *env) -{ - if (!ase_msa_available(env)) { - return; - } - -#ifdef CONFIG_USER_ONLY - /* MSA access enabled */ - env->CP0_Config5 |=3D 1 << CP0C5_MSAEn; - env->CP0_Status |=3D (1 << CP0St_CU1) | (1 << CP0St_FR); -#endif - - /* MSA CSR: - - non-signaling floating point exception mode off (NX bit is 0) - - Cause, Enables, and Flags are all 0 - - round to nearest / ties to even (RM bits are 0) */ - env->active_tc.msacsr =3D 0; - - restore_msa_fp_status(env); - - /* tininess detected after rounding.*/ - set_float_detect_tininess(float_tininess_after_rounding, - &env->active_tc.msa_fp_status); - - /* clear float_status exception flags */ - set_float_exception_flags(0, &env->active_tc.msa_fp_status); - - /* clear float_status nan mode */ - set_default_nan_mode(0, &env->active_tc.msa_fp_status); - - /* set proper signanling bit meaning ("1" means "quiet") */ - set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); -} --=20 2.26.2