From nobody Mon Feb 9 17:36:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.208.67 as permitted sender) client-ip=209.85.208.67; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-f67.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.67 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1608073144; cv=none; d=zohomail.com; s=zohoarc; b=MIlwPR0/XdeJl2uAHH5S+DkWuTeC5uiOR59qgLiZC3naGEURDR/ZHkfIcywv3Rh0HvTyU6sRMxuONDHzzboFw73UMHOhwvz9gG+mnIlIJ2TS4kpra7Ws0bs9UQxH4STLmbxV34apZVESMk6/s0V2p2fmqQhS5yHywtqpiSl6iCQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1608073144; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5zf2zjw7Ua1MQ7xeHvN/Qv9OOVErWs8JxWytfST3iqs=; b=MVG8eFzd5YN19fbl7BS+Vl1AEWLgHp3lRmVUZOU/qGfzah4XexGPaFIhGep00MNKpbjYg5WOGgsH3M1Y84uHi7xu0fg3z5aNb/T78QxLuHJkZ/5EkB9/Dj6V8k08OQPryBMsnyrwPOf3JwPrflnoVozD2L0C/19yeNdyJ5T6TMU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.67 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ed1-f67.google.com (mail-ed1-f67.google.com [209.85.208.67]) by mx.zohomail.com with SMTPS id 1608073144606900.7928870279699; Tue, 15 Dec 2020 14:59:04 -0800 (PST) Received: by mail-ed1-f67.google.com with SMTP id r5so22790283eda.12 for ; Tue, 15 Dec 2020 14:59:03 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (101.red-88-21-206.staticip.rima-tde.net. [88.21.206.101]) by smtp.gmail.com with ESMTPSA id d3sm15992825edt.32.2020.12.15.14.59.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Dec 2020 14:59:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5zf2zjw7Ua1MQ7xeHvN/Qv9OOVErWs8JxWytfST3iqs=; b=bd8VrEaOY0lIeveVRZ5st0UbMIrjDDKj5N77Igo82/CrIopTSTXJQGm0XpqALfBkK5 /c41Zd/4YVXlvBzpsa2yJGHme7YxKnYlj8DofH8CMCAvEKRMhLGnF+JuvnjTOPv6X0lv weWYEhpEjGEW4NztIO8KQkrOj/3gskyV7UCqhACkcHWUYKZCFNGzIjLTfLDyaEViPkG/ FTiiTwXTRCoMZxls8ENq3f3pKZuVYdpXwZl2l7bFglkBT9JeQms2fZxEOxdfWHn/0eyE 0LC4QCHPKb+IU54G8iKN5i2C9LO64KIcmW98dI19HHl3a5i4nilPpusJ7iay1JmSs2iN RC3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=5zf2zjw7Ua1MQ7xeHvN/Qv9OOVErWs8JxWytfST3iqs=; b=U+HCZ/GM+ywEPxBq2XA8/eNqMyzJuzryd41iBkhcYxTtjdqMRdWYi0A7agkncWT9/E NhEJPq1r+htO02DtjMFtBD1ySx9E+eniTk95nUhwniywh4RxAT1exgjs9P5zpMkj0CGE WyH44sq4RROPsamdiWfvTfFxEbkJp50gThr/APYNqMok20UBMyt42qIRm2yTwZndLn4N +STeLVb4YeSXs0tKvHOGuJIJyDP6OFWe+xQ1zm5AKxPyOoJ7M9k81uTYrRyVOsv0/ZJM rUD6dOu6oNBCC4edv97JUlxTwLkx+WjIf8ybWOEeQWROlqrByiqCN1mgNsF4SWPG3DvZ lhzA== X-Gm-Message-State: AOAM531qKoB3ja2bBYD73wNd0OUoLEz47I4pzcqckE4SwFYrknGZm+8d 7ZeinpxeFt/Rvjo/0l6zAuI= X-Google-Smtp-Source: ABdhPJzBXm9mLOTp9OQrBSWtUIaVLcn9f6UKQfa9eXf4LHOuRxZvnMSKdoWoiYQhVbL8L3orffphXg== X-Received: by 2002:a50:955b:: with SMTP id v27mr30892887eda.324.1608073142693; Tue, 15 Dec 2020 14:59:02 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Richard Henderson , qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Huacai Chen Subject: [PATCH v2 11/24] target/mips: Remove CPUMIPSState* argument from gen_msa*() methods Date: Tue, 15 Dec 2020 23:57:44 +0100 Message-Id: <20201215225757.764263-12-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201215225757.764263-1-f4bug@amsat.org> References: <20201215225757.764263-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The gen_msa*() methods don't use the "CPUMIPSState *env" argument. Remove it to simplify. Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/translate.c | 57 ++++++++++++++++++++--------------------- 1 file changed, 28 insertions(+), 29 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 2dc7b446e9a..a3618a3beb2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28615,7 +28615,7 @@ static void gen_check_zero_element(TCGv tresult, ui= nt8_t df, uint8_t wt) tcg_temp_free_i64(t1); } =20 -static void gen_msa_branch(CPUMIPSState *env, DisasContext *ctx, uint32_t = op1) +static void gen_msa_branch(DisasContext *ctx, uint32_t op1) { uint8_t df =3D (ctx->opcode >> 21) & 0x3; uint8_t wt =3D (ctx->opcode >> 16) & 0x1f; @@ -28660,7 +28660,7 @@ static void gen_msa_branch(CPUMIPSState *env, Disas= Context *ctx, uint32_t op1) ctx->hflags |=3D MIPS_HFLAG_BDS32; } =20 -static void gen_msa_i8(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_i8(DisasContext *ctx) { #define MASK_MSA_I8(op) (MASK_MSA_MINOR(op) | (op & (0x03 << 24))) uint8_t i8 =3D (ctx->opcode >> 16) & 0xff; @@ -28718,7 +28718,7 @@ static void gen_msa_i8(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(ti8); } =20 -static void gen_msa_i5(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_i5(DisasContext *ctx) { #define MASK_MSA_I5(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) uint8_t df =3D (ctx->opcode >> 21) & 0x3; @@ -28791,7 +28791,7 @@ static void gen_msa_i5(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(timm); } =20 -static void gen_msa_bit(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_bit(DisasContext *ctx) { #define MASK_MSA_BIT(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) uint8_t dfm =3D (ctx->opcode >> 16) & 0x7f; @@ -28875,7 +28875,7 @@ static void gen_msa_bit(CPUMIPSState *env, DisasCon= text *ctx) tcg_temp_free_i32(tws); } =20 -static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_3r(DisasContext *ctx) { #define MASK_MSA_3R(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) uint8_t df =3D (ctx->opcode >> 21) & 0x3; @@ -29857,7 +29857,7 @@ static void gen_msa_3r(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_elm_3e(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_elm_3e(DisasContext *ctx) { #define MASK_MSA_ELM_DF3E(op) (MASK_MSA_MINOR(op) | (op & (0x3FF << 16))) uint8_t source =3D (ctx->opcode >> 11) & 0x1f; @@ -29889,8 +29889,7 @@ static void gen_msa_elm_3e(CPUMIPSState *env, Disas= Context *ctx) tcg_temp_free_i32(tsr); } =20 -static void gen_msa_elm_df(CPUMIPSState *env, DisasContext *ctx, uint32_t = df, - uint32_t n) +static void gen_msa_elm_df(DisasContext *ctx, uint32_t df, uint32_t n) { #define MASK_MSA_ELM(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) uint8_t ws =3D (ctx->opcode >> 11) & 0x1f; @@ -30000,7 +29999,7 @@ static void gen_msa_elm_df(CPUMIPSState *env, Disas= Context *ctx, uint32_t df, tcg_temp_free_i32(tdf); } =20 -static void gen_msa_elm(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_elm(DisasContext *ctx) { uint8_t dfn =3D (ctx->opcode >> 16) & 0x3f; uint32_t df =3D 0, n =3D 0; @@ -30019,17 +30018,17 @@ static void gen_msa_elm(CPUMIPSState *env, DisasC= ontext *ctx) df =3D DF_DOUBLE; } else if (dfn =3D=3D 0x3E) { /* CTCMSA, CFCMSA, MOVE.V */ - gen_msa_elm_3e(env, ctx); + gen_msa_elm_3e(ctx); return; } else { gen_reserved_instruction(ctx); return; } =20 - gen_msa_elm_df(env, ctx, df, n); + gen_msa_elm_df(ctx, df, n); } =20 -static void gen_msa_3rf(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_3rf(DisasContext *ctx) { #define MASK_MSA_3RF(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) uint8_t df =3D (ctx->opcode >> 21) & 0x1; @@ -30187,7 +30186,7 @@ static void gen_msa_3rf(CPUMIPSState *env, DisasCon= text *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_2r(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_2r(DisasContext *ctx) { #define MASK_MSA_2R(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ (op & (0x7 << 18))) @@ -30271,7 +30270,7 @@ static void gen_msa_2r(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_2rf(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_2rf(DisasContext *ctx) { #define MASK_MSA_2RF(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ (op & (0xf << 17))) @@ -30342,7 +30341,7 @@ static void gen_msa_2rf(CPUMIPSState *env, DisasCon= text *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_vec_v(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_vec_v(DisasContext *ctx) { #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) uint8_t wt =3D (ctx->opcode >> 16) & 0x1f; @@ -30385,7 +30384,7 @@ static void gen_msa_vec_v(CPUMIPSState *env, DisasC= ontext *ctx) tcg_temp_free_i32(twt); } =20 -static void gen_msa_vec(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_vec(DisasContext *ctx) { switch (MASK_MSA_VEC(ctx->opcode)) { case OPC_AND_V: @@ -30395,13 +30394,13 @@ static void gen_msa_vec(CPUMIPSState *env, DisasC= ontext *ctx) case OPC_BMNZ_V: case OPC_BMZ_V: case OPC_BSEL_V: - gen_msa_vec_v(env, ctx); + gen_msa_vec_v(ctx); break; case OPC_MSA_2R: - gen_msa_2r(env, ctx); + gen_msa_2r(ctx); break; case OPC_MSA_2RF: - gen_msa_2rf(env, ctx); + gen_msa_2rf(ctx); break; default: MIPS_INVAL("MSA instruction"); @@ -30410,7 +30409,7 @@ static void gen_msa_vec(CPUMIPSState *env, DisasCon= text *ctx) } } =20 -static void gen_msa(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa(DisasContext *ctx) { uint32_t opcode =3D ctx->opcode; =20 @@ -30420,15 +30419,15 @@ static void gen_msa(CPUMIPSState *env, DisasConte= xt *ctx) case OPC_MSA_I8_00: case OPC_MSA_I8_01: case OPC_MSA_I8_02: - gen_msa_i8(env, ctx); + gen_msa_i8(ctx); break; case OPC_MSA_I5_06: case OPC_MSA_I5_07: - gen_msa_i5(env, ctx); + gen_msa_i5(ctx); break; case OPC_MSA_BIT_09: case OPC_MSA_BIT_0A: - gen_msa_bit(env, ctx); + gen_msa_bit(ctx); break; case OPC_MSA_3R_0D: case OPC_MSA_3R_0E: @@ -30439,18 +30438,18 @@ static void gen_msa(CPUMIPSState *env, DisasConte= xt *ctx) case OPC_MSA_3R_13: case OPC_MSA_3R_14: case OPC_MSA_3R_15: - gen_msa_3r(env, ctx); + gen_msa_3r(ctx); break; case OPC_MSA_ELM: - gen_msa_elm(env, ctx); + gen_msa_elm(ctx); break; case OPC_MSA_3RF_1A: case OPC_MSA_3RF_1B: case OPC_MSA_3RF_1C: - gen_msa_3rf(env, ctx); + gen_msa_3rf(ctx); break; case OPC_MSA_VEC: - gen_msa_vec(env, ctx); + gen_msa_vec(ctx); break; case OPC_LD_B: case OPC_LD_H: @@ -31044,7 +31043,7 @@ static bool decode_opc_legacy(CPUMIPSState *env, Di= sasContext *ctx) case OPC_BNZ_W: case OPC_BNZ_D: if (ase_msa_available(env)) { - gen_msa_branch(env, ctx, op1); + gen_msa_branch(ctx, op1); break; } default: @@ -31236,7 +31235,7 @@ static bool decode_opc_legacy(CPUMIPSState *env, Di= sasContext *ctx) } else { /* MDMX: Not implemented. */ if (ase_msa_available(env)) { - gen_msa(env, ctx); + gen_msa(ctx); } } break; --=20 2.26.2