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[88.21.206.101]) by smtp.gmail.com with ESMTPSA id m11sm12338992wmi.16.2020.12.13.12.21.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Dec 2020 12:21:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=34Gjpun7TNPsoaQVN38Yv8sG5iP6wLHtCCAjvvFP5UI=; b=BU3fUzi8DAzwsnOmXIJ76k8U4DrKlFD4XgiVs2SUI68jQ+iKUDSlr9JBsXwLewlN8J MDR35+6wJWQKp8NZ9NCwBBFSRnMsqAnE4kblbrdxgeuWNBEgv/KEOS0YdV54clSlunOG pmTEXF9/gqvpn1SUxQw/jGe9BhmRL4Ta/pxCNPx0KXBSGzNjJlwbTDdqT/R+1ppD9VNL wkVNTJ8ynCM0zNSOgU0iy4PdzHWWKAuBZ/3AdppawIr0PPXO7UCVzzV8EwKG0NrYen3X SCTqipVjLZOjlA5KRD6wCyMiGZh4cUAUpU9+md9tmT8RKZJHvo9KXxw561Vqvhqj9hvy VlYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=34Gjpun7TNPsoaQVN38Yv8sG5iP6wLHtCCAjvvFP5UI=; b=tk1HTaeDGKhRp2fiW48cxwqXtLAhNGhKw8RP/1MlC7NIbkIElFh5sdLp73kaFgSTte PvFxk0PS4Ey4Nvi4gCUr1TTH0MkhOH2+RnlEqmpikDrpgj4CJtQqEpxbNX3VvMMX5DMe lNe3Q9w++DmHxsm2vUkbWs37SC7yONzZD8zi4uVUboetNrbfoXkziaHipeMpvsYtjxab nd9M3pT1x9hgagNFEqzL70C3A692rp57N9sHaxj+mm/aYQrFm5l7oI/Lgd9jc0Vjb8cM fSfnUARMQ8ZtQVtOfhic4M3stG+kwNRYz+SRz7SUV0Yk55KCITuMgBzt88NuivwIE7PR j1cg== X-Gm-Message-State: AOAM533Sdu8mbRJ9CoQTBTdfd8O07UrU+3x/ksne0okQ3U+sF0In0hYd ijcVNDPLLku7Al3kUyUASyY= X-Google-Smtp-Source: ABdhPJxgeDq4WOxjOJQN0+vNyfwIGM036dcbEAa5GUj9cBrFjsN9I9AoZgNvo12QV4gNO6aX/iXePw== X-Received: by 2002:a5d:6682:: with SMTP id l2mr25344695wru.213.1607890883667; Sun, 13 Dec 2020 12:21:23 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Aurelien Jarno , Aleksandar Rikalo , kvm@vger.kernel.org, Jiaxun Yang , Huacai Chen , Paul Burton , Richard Henderson Subject: [PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE absent Date: Sun, 13 Dec 2020 21:19:39 +0100 Message-Id: <20201213201946.236123-20-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201213201946.236123-1-f4bug@amsat.org> References: <20201213201946.236123-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Do not initialize MT-related config register if the MT ASE is not present. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20201204222622.2743175-5-f4bug@amsat.org> --- hw/mips/malta.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 4651a1055c9..f06cb90a44a 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1135,8 +1135,10 @@ static void malta_mips_config(MIPSCPU *cpu) CPUMIPSState *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); =20 - env->mvp->CP0_MVPConf0 |=3D ((smp_cpus - 1) << CP0MVPC0_PVPE) | + if (ase_mt_available(env)) { + env->mvp->CP0_MVPConf0 |=3D ((smp_cpus - 1) << CP0MVPC0_PVPE) | ((smp_cpus * cs->nr_threads - 1) << CP0MVPC0_PTC); + } } =20 static void main_cpu_reset(void *opaque) --=20 2.26.2