From nobody Tue Nov 18 02:54:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1607185343; cv=none; d=zohomail.com; s=zohoarc; b=XAF7ha1EQkUzY8J5jowXdsBZcsg+911NFEfSfsuUdeo6uQAljTN05Q55BjGbtlnQ9iXNOyHfA5HHG6+kpUXaBdR+tfNuBZoiDICDq+DvjWAHpggRYuPVdOfn7pbSQh41Edz5J3OFk2XFN/WUf48H4b8+foZwGLvf8krstwQyI+8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1607185343; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vI0Oq3NRadAPwwBP+wD1PXx8lnf3EXwtZlG1BdTh6tw=; b=CNZmFBuvspKum/N6r75wI2P44ITpRDB+XnWsooSsju4+IsSxh+vcegDZDRCZN8Y8XUeLMFaB7g+Dr+PUzcETHFqcGqrjZp61LPWj0WQGYN/vQWwdIQrDrBJiJh6TK+lZvLUqPmb8IakF3vSBATgteBlhM+qenZsORIFsib24+7Y= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1607185343635562.2550517189286; Sat, 5 Dec 2020 08:22:23 -0800 (PST) Received: from localhost ([::1]:46564 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1klaKE-0006KK-Ee for importer@patchew.org; Sat, 05 Dec 2020 11:22:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44076) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1klaDc-0000aF-87 for qemu-devel@nongnu.org; Sat, 05 Dec 2020 11:15:32 -0500 Received: from mx2.suse.de ([195.135.220.15]:48090) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1klaDV-00007H-ER for qemu-devel@nongnu.org; Sat, 05 Dec 2020 11:15:32 -0500 Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 121CBAD80; Sat, 5 Dec 2020 16:15:24 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de From: Claudio Fontana To: Paolo Bonzini , Thomas Huth , Richard Henderson , Stefano Stabellini , Wenchao Wang , Roman Bolshakov , Sunil Muthuswamy , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC v8 03/27] accel/tcg: rename tcg-cpus functions to match module name Date: Sat, 5 Dec 2020 17:14:54 +0100 Message-Id: <20201205161518.14365-4-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201205161518.14365-1-cfontana@suse.de> References: <20201205161518.14365-1-cfontana@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Paul Durrant , Jason Wang , Marcelo Tosatti , qemu-devel@nongnu.org, Peter Xu , Dario Faggioli , Cameron Esfahani , haxm-team@intel.com, Claudio Fontana , Anthony Perard , Bruce Rogers , Olaf Hering , "Emilio G . Cota" , Colin Xu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Claudio Fontana Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- accel/tcg/tcg-cpus-icount.c | 24 ++++++------ accel/tcg/tcg-cpus-icount.h | 6 +-- accel/tcg/tcg-cpus-mttcg.c | 10 ++--- accel/tcg/tcg-cpus-rr.c | 74 ++++++++++++++++++------------------- accel/tcg/tcg-cpus-rr.h | 2 +- accel/tcg/tcg-cpus.c | 6 +-- accel/tcg/tcg-cpus.h | 6 +-- 7 files changed, 64 insertions(+), 64 deletions(-) diff --git a/accel/tcg/tcg-cpus-icount.c b/accel/tcg/tcg-cpus-icount.c index 82dbe2cacf..9f45432275 100644 --- a/accel/tcg/tcg-cpus-icount.c +++ b/accel/tcg/tcg-cpus-icount.c @@ -36,7 +36,7 @@ #include "tcg-cpus-icount.h" #include "tcg-cpus-rr.h" =20 -static int64_t tcg_get_icount_limit(void) +static int64_t icount_get_limit(void) { int64_t deadline; =20 @@ -68,37 +68,37 @@ static int64_t tcg_get_icount_limit(void) } } =20 -static void notify_aio_contexts(void) +static void icount_notify_aio_contexts(void) { /* Wake up other AioContexts. */ qemu_clock_notify(QEMU_CLOCK_VIRTUAL); qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); } =20 -void handle_icount_deadline(void) +void icount_handle_deadline(void) { assert(qemu_in_vcpu_thread()); int64_t deadline =3D qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL, QEMU_TIMER_ATTR_ALL); =20 if (deadline =3D=3D 0) { - notify_aio_contexts(); + icount_notify_aio_contexts(); } } =20 -void prepare_icount_for_run(CPUState *cpu) +void icount_prepare_for_run(CPUState *cpu) { int insns_left; =20 /* - * These should always be cleared by process_icount_data after + * These should always be cleared by icount_process_data after * each vCPU execution. However u16.high can be raised - * asynchronously by cpu_exit/cpu_interrupt/tcg_handle_interrupt + * asynchronously by cpu_exit/cpu_interrupt/tcg_cpus_handle_interrupt */ g_assert(cpu_neg(cpu)->icount_decr.u16.low =3D=3D 0); g_assert(cpu->icount_extra =3D=3D 0); =20 - cpu->icount_budget =3D tcg_get_icount_limit(); + cpu->icount_budget =3D icount_get_limit(); insns_left =3D MIN(0xffff, cpu->icount_budget); cpu_neg(cpu)->icount_decr.u16.low =3D insns_left; cpu->icount_extra =3D cpu->icount_budget - insns_left; @@ -106,11 +106,11 @@ void prepare_icount_for_run(CPUState *cpu) replay_mutex_lock(); =20 if (cpu->icount_budget =3D=3D 0 && replay_has_checkpoint()) { - notify_aio_contexts(); + icount_notify_aio_contexts(); } } =20 -void process_icount_data(CPUState *cpu) +void icount_process_data(CPUState *cpu) { /* Account for executed instructions */ icount_update(cpu); @@ -129,7 +129,7 @@ static void icount_handle_interrupt(CPUState *cpu, int = mask) { int old_mask =3D cpu->interrupt_request; =20 - tcg_handle_interrupt(cpu, mask); + tcg_cpus_handle_interrupt(cpu, mask); if (qemu_cpu_is_self(cpu) && !cpu->can_do_io && (mask & ~old_mask) !=3D 0) { @@ -139,7 +139,7 @@ static void icount_handle_interrupt(CPUState *cpu, int = mask) =20 const CpusAccel tcg_cpus_icount =3D { .create_vcpu_thread =3D rr_start_vcpu_thread, - .kick_vcpu_thread =3D qemu_cpu_kick_rr_cpus, + .kick_vcpu_thread =3D rr_kick_vcpu_thread, =20 .handle_interrupt =3D icount_handle_interrupt, .get_virtual_clock =3D icount_get, diff --git a/accel/tcg/tcg-cpus-icount.h b/accel/tcg/tcg-cpus-icount.h index cbcf76b413..b695939dfa 100644 --- a/accel/tcg/tcg-cpus-icount.h +++ b/accel/tcg/tcg-cpus-icount.h @@ -10,8 +10,8 @@ #ifndef TCG_CPUS_ICOUNT_H #define TCG_CPUS_ICOUNT_H =20 -void handle_icount_deadline(void); -void prepare_icount_for_run(CPUState *cpu); -void process_icount_data(CPUState *cpu); +void icount_handle_deadline(void); +void icount_prepare_for_run(CPUState *cpu); +void icount_process_data(CPUState *cpu); =20 #endif /* TCG_CPUS_ICOUNT_H */ diff --git a/accel/tcg/tcg-cpus-mttcg.c b/accel/tcg/tcg-cpus-mttcg.c index f2b892a380..9c3767d260 100644 --- a/accel/tcg/tcg-cpus-mttcg.c +++ b/accel/tcg/tcg-cpus-mttcg.c @@ -40,7 +40,7 @@ * current CPUState for a given thread. */ =20 -static void *tcg_cpu_thread_fn(void *arg) +static void *mttcg_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; =20 @@ -66,7 +66,7 @@ static void *tcg_cpu_thread_fn(void *arg) if (cpu_can_run(cpu)) { int r; qemu_mutex_unlock_iothread(); - r =3D tcg_cpu_exec(cpu); + r =3D tcg_cpus_exec(cpu); qemu_mutex_lock_iothread(); switch (r) { case EXCP_DEBUG: @@ -97,7 +97,7 @@ static void *tcg_cpu_thread_fn(void *arg) qemu_wait_io_event(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); =20 - qemu_tcg_destroy_vcpu(cpu); + tcg_cpus_destroy(cpu); qemu_mutex_unlock_iothread(); rcu_unregister_thread(); return NULL; @@ -124,7 +124,7 @@ static void mttcg_start_vcpu_thread(CPUState *cpu) snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", cpu->cpu_index); =20 - qemu_thread_create(cpu->thread, thread_name, tcg_cpu_thread_fn, + qemu_thread_create(cpu->thread, thread_name, mttcg_cpu_thread_fn, cpu, QEMU_THREAD_JOINABLE); =20 #ifdef _WIN32 @@ -136,5 +136,5 @@ const CpusAccel tcg_cpus_mttcg =3D { .create_vcpu_thread =3D mttcg_start_vcpu_thread, .kick_vcpu_thread =3D mttcg_kick_vcpu_thread, =20 - .handle_interrupt =3D tcg_handle_interrupt, + .handle_interrupt =3D tcg_cpus_handle_interrupt, }; diff --git a/accel/tcg/tcg-cpus-rr.c b/accel/tcg/tcg-cpus-rr.c index f3b262bec7..0181d2e4eb 100644 --- a/accel/tcg/tcg-cpus-rr.c +++ b/accel/tcg/tcg-cpus-rr.c @@ -37,7 +37,7 @@ #include "tcg-cpus-icount.h" =20 /* Kick all RR vCPUs */ -void qemu_cpu_kick_rr_cpus(CPUState *unused) +void rr_kick_vcpu_thread(CPUState *unused) { CPUState *cpu; =20 @@ -58,62 +58,62 @@ void qemu_cpu_kick_rr_cpus(CPUState *unused) * idleness is complete. */ =20 -static QEMUTimer *tcg_kick_vcpu_timer; -static CPUState *tcg_current_rr_cpu; +static QEMUTimer *rr_kick_vcpu_timer; +static CPUState *rr_current_cpu; =20 #define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10) =20 -static inline int64_t qemu_tcg_next_kick(void) +static inline int64_t rr_next_kick_time(void) { return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + TCG_KICK_PERIOD; } =20 /* Kick the currently round-robin scheduled vCPU to next */ -static void qemu_cpu_kick_rr_next_cpu(void) +static void rr_kick_next_cpu(void) { CPUState *cpu; do { - cpu =3D qatomic_mb_read(&tcg_current_rr_cpu); + cpu =3D qatomic_mb_read(&rr_current_cpu); if (cpu) { cpu_exit(cpu); } - } while (cpu !=3D qatomic_mb_read(&tcg_current_rr_cpu)); + } while (cpu !=3D qatomic_mb_read(&rr_current_cpu)); } =20 -static void kick_tcg_thread(void *opaque) +static void rr_kick_thread(void *opaque) { - timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick()); - qemu_cpu_kick_rr_next_cpu(); + timer_mod(rr_kick_vcpu_timer, rr_next_kick_time()); + rr_kick_next_cpu(); } =20 -static void start_tcg_kick_timer(void) +static void rr_start_kick_timer(void) { - if (!tcg_kick_vcpu_timer && CPU_NEXT(first_cpu)) { - tcg_kick_vcpu_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, - kick_tcg_thread, NULL); + if (!rr_kick_vcpu_timer && CPU_NEXT(first_cpu)) { + rr_kick_vcpu_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, + rr_kick_thread, NULL); } - if (tcg_kick_vcpu_timer && !timer_pending(tcg_kick_vcpu_timer)) { - timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick()); + if (rr_kick_vcpu_timer && !timer_pending(rr_kick_vcpu_timer)) { + timer_mod(rr_kick_vcpu_timer, rr_next_kick_time()); } } =20 -static void stop_tcg_kick_timer(void) +static void rr_stop_kick_timer(void) { - if (tcg_kick_vcpu_timer && timer_pending(tcg_kick_vcpu_timer)) { - timer_del(tcg_kick_vcpu_timer); + if (rr_kick_vcpu_timer && timer_pending(rr_kick_vcpu_timer)) { + timer_del(rr_kick_vcpu_timer); } } =20 -static void qemu_tcg_rr_wait_io_event(void) +static void rr_wait_io_event(void) { CPUState *cpu; =20 while (all_cpu_threads_idle()) { - stop_tcg_kick_timer(); + rr_stop_kick_timer(); qemu_cond_wait_iothread(first_cpu->halt_cond); } =20 - start_tcg_kick_timer(); + rr_start_kick_timer(); =20 CPU_FOREACH(cpu) { qemu_wait_io_event_common(cpu); @@ -124,13 +124,13 @@ static void qemu_tcg_rr_wait_io_event(void) * Destroy any remaining vCPUs which have been unplugged and have * finished running */ -static void deal_with_unplugged_cpus(void) +static void rr_deal_with_unplugged_cpus(void) { CPUState *cpu; =20 CPU_FOREACH(cpu) { if (cpu->unplug && !cpu_can_run(cpu)) { - qemu_tcg_destroy_vcpu(cpu); + tcg_cpus_destroy(cpu); break; } } @@ -144,7 +144,7 @@ static void deal_with_unplugged_cpus(void) * elsewhere. */ =20 -static void *tcg_rr_cpu_thread_fn(void *arg) +static void *rr_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; =20 @@ -171,7 +171,7 @@ static void *tcg_rr_cpu_thread_fn(void *arg) } } =20 - start_tcg_kick_timer(); + rr_start_kick_timer(); =20 cpu =3D first_cpu; =20 @@ -190,7 +190,7 @@ static void *tcg_rr_cpu_thread_fn(void *arg) * Run the timers here. This is much more efficient than * waking up the I/O thread and waiting for completion. */ - handle_icount_deadline(); + icount_handle_deadline(); } =20 replay_mutex_unlock(); @@ -201,7 +201,7 @@ static void *tcg_rr_cpu_thread_fn(void *arg) =20 while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) { =20 - qatomic_mb_set(&tcg_current_rr_cpu, cpu); + qatomic_mb_set(&rr_current_cpu, cpu); current_cpu =3D cpu; =20 qemu_clock_enable(QEMU_CLOCK_VIRTUAL, @@ -212,11 +212,11 @@ static void *tcg_rr_cpu_thread_fn(void *arg) =20 qemu_mutex_unlock_iothread(); if (icount_enabled()) { - prepare_icount_for_run(cpu); + icount_prepare_for_run(cpu); } - r =3D tcg_cpu_exec(cpu); + r =3D tcg_cpus_exec(cpu); if (icount_enabled()) { - process_icount_data(cpu); + icount_process_data(cpu); } qemu_mutex_lock_iothread(); =20 @@ -240,7 +240,7 @@ static void *tcg_rr_cpu_thread_fn(void *arg) } /* while (cpu && !cpu->exit_request).. */ =20 /* Does not need qatomic_mb_set because a spurious wakeup is okay.= */ - qatomic_set(&tcg_current_rr_cpu, NULL); + qatomic_set(&rr_current_cpu, NULL); =20 if (cpu && cpu->exit_request) { qatomic_mb_set(&cpu->exit_request, 0); @@ -254,8 +254,8 @@ static void *tcg_rr_cpu_thread_fn(void *arg) qemu_notify_event(); } =20 - qemu_tcg_rr_wait_io_event(); - deal_with_unplugged_cpus(); + rr_wait_io_event(); + rr_deal_with_unplugged_cpus(); } =20 rcu_unregister_thread(); @@ -279,7 +279,7 @@ void rr_start_vcpu_thread(CPUState *cpu) /* share a single thread for all cpus with TCG */ snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG"); qemu_thread_create(cpu->thread, thread_name, - tcg_rr_cpu_thread_fn, + rr_cpu_thread_fn, cpu, QEMU_THREAD_JOINABLE); =20 single_tcg_halt_cond =3D cpu->halt_cond; @@ -299,7 +299,7 @@ void rr_start_vcpu_thread(CPUState *cpu) =20 const CpusAccel tcg_cpus_rr =3D { .create_vcpu_thread =3D rr_start_vcpu_thread, - .kick_vcpu_thread =3D qemu_cpu_kick_rr_cpus, + .kick_vcpu_thread =3D rr_kick_vcpu_thread, =20 - .handle_interrupt =3D tcg_handle_interrupt, + .handle_interrupt =3D tcg_cpus_handle_interrupt, }; diff --git a/accel/tcg/tcg-cpus-rr.h b/accel/tcg/tcg-cpus-rr.h index 2e5943eda9..54f6ae6e86 100644 --- a/accel/tcg/tcg-cpus-rr.h +++ b/accel/tcg/tcg-cpus-rr.h @@ -13,7 +13,7 @@ #define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10) =20 /* Kick all RR vCPUs. */ -void qemu_cpu_kick_rr_cpus(CPUState *unused); +void rr_kick_vcpu_thread(CPUState *unused); =20 /* start the round robin vcpu thread */ void rr_start_vcpu_thread(CPUState *cpu); diff --git a/accel/tcg/tcg-cpus.c b/accel/tcg/tcg-cpus.c index 86fd09545a..e335f9f155 100644 --- a/accel/tcg/tcg-cpus.c +++ b/accel/tcg/tcg-cpus.c @@ -38,12 +38,12 @@ =20 /* common functionality among all TCG variants */ =20 -void qemu_tcg_destroy_vcpu(CPUState *cpu) +void tcg_cpus_destroy(CPUState *cpu) { cpu_thread_signal_destroyed(cpu); } =20 -int tcg_cpu_exec(CPUState *cpu) +int tcg_cpus_exec(CPUState *cpu) { int ret; #ifdef CONFIG_PROFILER @@ -64,7 +64,7 @@ int tcg_cpu_exec(CPUState *cpu) } =20 /* mask must never be zero, except for A20 change call */ -void tcg_handle_interrupt(CPUState *cpu, int mask) +void tcg_cpus_handle_interrupt(CPUState *cpu, int mask) { g_assert(qemu_mutex_iothread_locked()); =20 diff --git a/accel/tcg/tcg-cpus.h b/accel/tcg/tcg-cpus.h index b7ca954e13..d6893a32f8 100644 --- a/accel/tcg/tcg-cpus.h +++ b/accel/tcg/tcg-cpus.h @@ -18,8 +18,8 @@ extern const CpusAccel tcg_cpus_mttcg; extern const CpusAccel tcg_cpus_icount; extern const CpusAccel tcg_cpus_rr; =20 -void qemu_tcg_destroy_vcpu(CPUState *cpu); -int tcg_cpu_exec(CPUState *cpu); -void tcg_handle_interrupt(CPUState *cpu, int mask); +void tcg_cpus_destroy(CPUState *cpu); +int tcg_cpus_exec(CPUState *cpu); +void tcg_cpus_handle_interrupt(CPUState *cpu, int mask); =20 #endif /* TCG_CPUS_H */ --=20 2.26.2