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[88.21.205.111]) by smtp.gmail.com with ESMTPSA id bg4sm5437959ejb.24.2020.12.05.07.09.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Dec 2020 07:09:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=crREQeqOxchj14ePKrTFZ0Am1N1Q+elCMcIAzZWPF6c=; b=IedKKtf9kkyzZvrRzmZ4p2RYZnugxuezHR+FUdirmUCLlwvgMxPV3NKMPFVUmiXWQ4 HoZyw2ua2P4/yw/wpqwqwiXWS7sgj9jedGUxmW3Pq3GbdqJiRHES5zVxn8Zk1vwU+dV3 hzIY2dXLcswPuvaPynIm61fbSrXwJoGMYJKYYisOfHGnMGo4fa+GYuJPzVy2aJN12+Fx in1ZXAR+CVGa1vqtvs0i/qLcQXjFlWqofBy4LR6XEaUdbgA/s5bF91GmwsEARIYbiYvo iBiH4XPKUrAC9oQSoAb2iKqjSiUj3mstJ0ZN6OMndcpn7bURMSl6sneYAn+k9kEuwgDi 2tMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=crREQeqOxchj14ePKrTFZ0Am1N1Q+elCMcIAzZWPF6c=; b=hnNQl4HGM+I4NhuOlns22zqVc9K+vDko76Jh8HAj47nB/uJSvjCyeKr5zGPlAQ9GSO Mn6FCzAAD4VpUQRb3f7XSKHvQ5GC/n8KseGV6PSWfUl3WXnYZqvWwl842fPQ73Neo5uu /Hl0tA06tugdipCIy9dKZc/OamNrd/zIQY1LAMidKatSL4wzmvWRpOE7RDGux6dVZ4zn 20Goq1R456yoJVMV5/tJhzfp0GzBcvfTLeyCy8lIno57iZfXtdHsUPaQViHCpJWTg1dQ uMtjddJq31MqQUV/8/vDmkRRCV+UbpBkXXMZJ5stc/Set7DtgTXhKSYMy9yoEyScmC0P OMCg== X-Gm-Message-State: AOAM531iKicGf/C/yA92krj8VUKqYywt3/eU5kSlyuiUf0bWS1Ry3ngG bCy7Ipe2qMxwYPNagcwgCjw= X-Google-Smtp-Source: ABdhPJxweYLDBbaNeL8rGh9Z/kOLWcPov/cF2etsn0ClE0cwV179Djy+EDopnDInKFGKT8BBxN0zJg== X-Received: by 2002:a17:906:8617:: with SMTP id o23mr11821915ejx.274.1607180945900; Sat, 05 Dec 2020 07:09:05 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Artyom Tarasenko , "Michael S . Tsirkin" , Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yap KV , Benoit Canet , 1906905@bugs.launchpad.net Subject: [PATCH] hw/timer/slavio_timer: Allow 64-bit accesses Date: Sat, 5 Dec 2020 16:09:03 +0100 Message-Id: <20201205150903.3062711-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Per the "NCR89C105 Chip Specification" referenced in the header: Chip-level Address Map ------------------------------------------------------------------ | 1D0 0000 -> | Counter/Timers | W,D | | 1DF FFFF | | | ... The address map indicated the allowed accesses at each address. [...] W indicates a word access, and D indicates a double-word access. The SLAVIO timer controller is implemented expecting 32-bit accesses. Commit a3d12d073e1 restricted the memory accesses to 32-bit, while the device allows 64-bit accesses. This was not an issue until commit 5d971f9e67 which reverted ("memory: accept mismatching sizes in memory_region_access_valid"). Fix by renaming .valid MemoryRegionOps as .impl, and add the valid access range (W -> 4, D -> 8). Since commit 21786c7e598 ("memory: Log invalid memory accesses") this class of bug can be quickly debugged displaying 'guest_errors' accesses, as: $ qemu-system-sparc -M SS-20 -m 256 -bios ss20_v2.25_rom -serial stdio -d= guest_errors Power-ON Reset Invalid access at addr 0x0, size 8, region 'timer-1', reason: invalid siz= e (min:4 max:4) $ qemu-system-sparc -M SS-20 -m 256 -bios ss20_v2.25_rom -monitor stdio -S (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system ... 0000000ff1300000-0000000ff130000f (prio 0, i/o): timer-1 ^^^^^^^^^ ^^^^^^^ \ memory region base address and name / (qemu) info qtree bus: main-system-bus dev: slavio_timer, id "" <-- device type name gpio-out "sysbus-irq" 17 num_cpus =3D 1 (0x1) mmio 0000000ff1310000/0000000000000014 mmio 0000000ff1300000/0000000000000010 <--- base address mmio 0000000ff1301000/0000000000000010 mmio 0000000ff1302000/0000000000000010 ... Reported-by: Yap KV Buglink: https://bugs.launchpad.net/bugs/1906905 Fixes: a3d12d073e1 ("slavio_timer: convert to memory API") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland --- Cc: Benoit Canet Cc: <1906905@bugs.launchpad.net> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/timer/slavio_timer.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 5b2d20cb6a5..03e33fc5926 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -331,6 +331,10 @@ static const MemoryRegionOps slavio_timer_mem_ops =3D { .write =3D slavio_timer_mem_writel, .endianness =3D DEVICE_NATIVE_ENDIAN, .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 8, + }, + .impl =3D { .min_access_size =3D 4, .max_access_size =3D 4, }, --=20 2.26.2