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[88.21.205.111]) by smtp.gmail.com with ESMTPSA id t19sm440464eje.86.2020.12.02.10.44.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xk/Zq1xXAUYu4vZ1FKZqQpHvoK7NrbyHrURbYsCyDoM=; b=FmswlJTao8Y2QdCEg1sJYydqulsPhnWQDxYz/to1zmq5YjEqi71b5YaHRpWojdP/pj E65O/5tgKwiq76nJ47IZVH7aFOu1LQlbyv20N3Xn9KFhvlz3DCFX2EytF0zx8i2aakFX QMDM15WQTKlX6W8yRsE7Ns42BAZeVDFkLSOHoHrCxYyTIB8UbKwuYFUQiXiSJhU09WRp Yfpf4RzTkHfMOtBsJRmWulnVRrm+NK/LG+R6Pu0V2j1DrSIaporPi+O+4OZOJeMDgxfp OfIuRiQfVo1nmg00KCLbWr9UMunQGGWMwZqmzKQZtHPjmK4QrJipVOpqwFpjbANs9/PJ 5djA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=xk/Zq1xXAUYu4vZ1FKZqQpHvoK7NrbyHrURbYsCyDoM=; b=MO4zP7CLz+KTgoNddsM75g+42T4Btxkop1a9Vs8M8V1tIt3JrPFZW1IPZf9ruViH7S NFzLlgXQ0enjZ1kbfUvimSetU5th/Yg4sGI38hSwltNxkbnA+27Nxh6lFv18iYuMV/vM 66zV3ME33kWbSpTC4wKmVH9v9XWE3gYC7qfETMD676520c8v+gV2AYsr3aFFjX072ori tDf8lI7BPRIadlFsXdBc63WRgllWsTBCZBLnMUVlDkjcI+Ng5KD0d+amVHMrMVJeXjpE 1k+9rZmrDhOGXpO2iZuX09UMLmoRbrjRue9FCUDV7edLSR1pXgUEcY6WxCb4Zui9uG/A JCvg== X-Gm-Message-State: AOAM530kJL8l+RP/8bcpHp9+SxQiLVl+luvhFHVdodRiInJ1xyAanjpR wm2jGAYyBFX1bBXX3cewv2U= X-Google-Smtp-Source: ABdhPJybp/7ChjWK/qvpZtRmgllgrpJg/wIciJFaxPkewzGyNulPMFf/2FW4ujzwwpuSx1b/+v1FNw== X-Received: by 2002:a17:906:d10f:: with SMTP id b15mr1095121ejz.268.1606934663190; Wed, 02 Dec 2020 10:44:23 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 1/9] target/mips: Introduce ase_msa_available() helper Date: Wed, 2 Dec 2020 19:44:07 +0100 Message-Id: <20201202184415.1434484-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Instead of accessing CP0_Config3 directly and checking the 'MSA Present' bit, introduce an explicit helper, making the code easier to read. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/internal.h | 6 ++++++ target/mips/kvm.c | 12 ++++++------ target/mips/translate.c | 8 +++----- 3 files changed, 15 insertions(+), 11 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index dd8a7809b64..f882ac1580c 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -80,6 +80,12 @@ enum CPUMIPSMSADataFormat { DF_DOUBLE }; =20 +/* Check presence of MSA implementation */ +static inline bool ase_msa_available(CPUMIPSState *env) +{ + return env->CP0_Config3 & (1 << CP0C3_MSAP); +} + void mips_cpu_do_interrupt(CPUState *cpu); bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req); void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags); diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 72637a1e021..9bfd67ede39 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -81,7 +81,7 @@ int kvm_arch_init_vcpu(CPUState *cs) } } =20 - if (kvm_mips_msa_cap && env->CP0_Config3 & (1 << CP0C3_MSAP)) { + if (kvm_mips_msa_cap && ase_msa_available(env)) { ret =3D kvm_vcpu_enable_cap(cs, KVM_CAP_MIPS_MSA, 0, 0); if (ret < 0) { /* mark unsupported so it gets disabled on reset */ @@ -107,7 +107,7 @@ void kvm_mips_reset_vcpu(MIPSCPU *cpu) warn_report("KVM does not support FPU, disabling"); env->CP0_Config1 &=3D ~(1 << CP0C1_FP); } - if (!kvm_mips_msa_cap && env->CP0_Config3 & (1 << CP0C3_MSAP)) { + if (!kvm_mips_msa_cap && ase_msa_available(env)) { warn_report("KVM does not support MSA, disabling"); env->CP0_Config3 &=3D ~(1 << CP0C3_MSAP); } @@ -624,7 +624,7 @@ static int kvm_mips_put_fpu_registers(CPUState *cs, int= level) * FPU register state is a subset of MSA vector state, so don't pu= t FPU * registers if we're emulating a CPU with MSA. */ - if (!(env->CP0_Config3 & (1 << CP0C3_MSAP))) { + if (!ase_msa_available(env)) { /* Floating point registers */ for (i =3D 0; i < 32; ++i) { if (env->CP0_Status & (1 << CP0St_FR)) { @@ -643,7 +643,7 @@ static int kvm_mips_put_fpu_registers(CPUState *cs, int= level) } =20 /* Only put MSA state if we're emulating a CPU with MSA */ - if (env->CP0_Config3 & (1 << CP0C3_MSAP)) { + if (ase_msa_available(env)) { /* MSA Control Registers */ if (level =3D=3D KVM_PUT_FULL_STATE) { err =3D kvm_mips_put_one_reg(cs, KVM_REG_MIPS_MSA_IR, @@ -704,7 +704,7 @@ static int kvm_mips_get_fpu_registers(CPUState *cs) * FPU register state is a subset of MSA vector state, so don't sa= ve FPU * registers if we're emulating a CPU with MSA. */ - if (!(env->CP0_Config3 & (1 << CP0C3_MSAP))) { + if (!ase_msa_available(env)) { /* Floating point registers */ for (i =3D 0; i < 32; ++i) { if (env->CP0_Status & (1 << CP0St_FR)) { @@ -723,7 +723,7 @@ static int kvm_mips_get_fpu_registers(CPUState *cs) } =20 /* Only get MSA state if we're emulating a CPU with MSA */ - if (env->CP0_Config3 & (1 << CP0C3_MSAP)) { + if (ase_msa_available(env)) { /* MSA Control Registers */ err =3D kvm_mips_get_one_reg(cs, KVM_REG_MIPS_MSA_IR, &env->msair); diff --git a/target/mips/translate.c b/target/mips/translate.c index c64a1bc42e1..a7c01c2ea5b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -25049,8 +25049,7 @@ static void decode_opc_special(CPUMIPSState *env, D= isasContext *ctx) gen_trap(ctx, op1, rs, rt, -1); break; case OPC_LSA: /* OPC_PMON */ - if ((ctx->insn_flags & ISA_MIPS32R6) || - (env->CP0_Config3 & (1 << CP0C3_MSAP))) { + if ((ctx->insn_flags & ISA_MIPS32R6) || ase_msa_available(env)) { decode_opc_special_r6(env, ctx); } else { /* Pmon entry point, also R4010 selsl */ @@ -25152,8 +25151,7 @@ static void decode_opc_special(CPUMIPSState *env, D= isasContext *ctx) } break; case OPC_DLSA: - if ((ctx->insn_flags & ISA_MIPS32R6) || - (env->CP0_Config3 & (1 << CP0C3_MSAP))) { + if ((ctx->insn_flags & ISA_MIPS32R6) || ase_msa_available(env)) { decode_opc_special_r6(env, ctx); } break; @@ -32000,7 +31998,7 @@ void cpu_state_reset(CPUMIPSState *env) } =20 /* MSA */ - if (env->CP0_Config3 & (1 << CP0C3_MSAP)) { + if (ase_msa_available(env)) { msa_reset(env); } =20 --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.67 as permitted sender) client-ip=209.85.218.67; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f67.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.67 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1606934670; cv=none; d=zohomail.com; s=zohoarc; b=Tsh8oKKi7w7u3bl2erpYipuCs5CiUlEDgz4lvgSP07Sj/x68H+tEWDKzgZPIb4dqf+pF34O//lRtoOuTvB2nI/8PJQNt1Cnd2QiZ0bPfGf3ygso1Yv+R0sFpYAdFOAitgnOqOpBnWlvVaOQaS628hJ8rjjlLoJTzV3XX3fXKCZQ= ARC-Message-Signature: i=1; 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[88.21.205.111]) by smtp.gmail.com with ESMTPSA id p91sm550214edp.9.2020.12.02.10.44.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cd+cZl3lcOYz3Gxtj1/bjHSaDTLTKsW2lXk6GJRA4IU=; b=S2pR8EmGeeVTU63mgKk5Ud1W84JypeTfvaScnRER/pLP+zhKc7dFIbwqQywoU8Sk6l 6hs/J8GZ4N4fmmVTk/zb4WGXKxjjY/ZZ9WW8CW0Qs7ylTTn25wfjNkppjruxwne46iAJ 4EZYq6ljyoPw/QqwcQvsFDrcq4iEZ31gy4PcFZclYqxksynZOnjaleoZlOb3YY69+EQK 2UwSy9tUeBNUaEyiF2s8my6cYm7deOfQb98F13nZEhSuRLY7ub88SoazSM+CpQmJYIyV ugiN1YMf3DE5AKJPngoLMuSsNhd9353DkzFOjasJ+E9+Xzd1pfWzHr1HW4rotZlGcKUI qtIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Cd+cZl3lcOYz3Gxtj1/bjHSaDTLTKsW2lXk6GJRA4IU=; b=uieP5c/IA305wOtvbz3htfNr7mk6C3cIIvHWxQ28IL+Dz2XxRo7OytpjkgSmV2xeK1 OBEIwh8hBfHXYk0ZZ9gi+VCj+u39wBitf3aLOirO1XqH4uFQdspe+HrEmRJJsT1U0h3v b8FUYSAyq3Sp+jCTu48wuOlXvQ7EY3sCSezLNDGNNS2uvQkXkbHvNtHYs/4+ZpWtkCfN /Tr6qaviIs7/RGXJBumkV9pL4XyVGZJ3TvbueE1r193QnA9pEia96379x8iPlG/dhkc2 8txMe6RV+YahSQEM96HtfKJiRq0xb/fjZ8Ffl0LxZ62UrhS9egVBl9pvI4JIrtB981os NpYg== X-Gm-Message-State: AOAM530BpPds/VvfIFULRbgNbXmxaD4CKPy7FtoetamQh/LEHrZutIyX iG5Ld10AeFT140YDj1hPYpQ= X-Google-Smtp-Source: ABdhPJwV+gLJt4YMjpfq4QmFKSJ/vB4g2/7zLmukJCqDsckb+0ljrPmo2gKywnORW4y3V4vD2C5YXQ== X-Received: by 2002:a17:906:3704:: with SMTP id d4mr1151640ejc.338.1606934668730; Wed, 02 Dec 2020 10:44:28 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 2/9] target/mips: Simplify msa_reset() Date: Wed, 2 Dec 2020 19:44:08 +0100 Message-Id: <20201202184415.1434484-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Call msa_reset() inconditionally, but only reset the MSA registers if MSA is implemented. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- Maybe not very useful. --- target/mips/translate.c | 5 +---- target/mips/translate_init.c.inc | 4 ++++ 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index a7c01c2ea5b..803ffefba2c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31997,10 +31997,7 @@ void cpu_state_reset(CPUMIPSState *env) env->hflags |=3D MIPS_HFLAG_M16; } =20 - /* MSA */ - if (ase_msa_available(env)) { - msa_reset(env); - } + msa_reset(env); =20 compute_hflags(env); restore_fp_status(env); diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.= c.inc index 79f75ed863c..3b069190ed8 100644 --- a/target/mips/translate_init.c.inc +++ b/target/mips/translate_init.c.inc @@ -1018,6 +1018,10 @@ static void mvp_init (CPUMIPSState *env, const mips_= def_t *def) =20 static void msa_reset(CPUMIPSState *env) { + if (!ase_msa_available(env)) { + return; + } + #ifdef CONFIG_USER_ONLY /* MSA access enabled */ env->CP0_Config5 |=3D 1 << CP0C5_MSAEn; --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.208.68 as permitted sender) client-ip=209.85.208.68; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-f68.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.68 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1606934676; cv=none; d=zohomail.com; s=zohoarc; b=g+xLlkiJca8JEfnCuSQkn8Uc/ep4tvukRIxnVQefLGOhXaqidI6xM3XlBRiysJJKWv9FsIHz8Dh2hG956HbjWRw5lX/qsyuJN1lBwy+r23ZEu+xqGofAzdKnK0f/if7gmXhshdYGPK48dpbcP/79QeQ0oEYN2IFldWfotDWNPA0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606934676; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=b+Fxow+oEWbA9tjXcJhsn1mux7Y5BxnpxnFopCv/eKM=; b=c5sxCdlZ/rxbzjK7RdL055pBpUOKanfcOWcuN+DVoau1ZKLCbRBLMC3IF9NfrNwDVZ1QNcWGKFGzUZF6FUwjIvk4RaBbA9AxrxalQCCbHcouOWzdrfmSFJHkZYIY+7FRe0bXhX/hkrYiiqnqfhJfC0mbP2BS6SK4muwjot/9KiE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.68 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ed1-f68.google.com (mail-ed1-f68.google.com [209.85.208.68]) by mx.zohomail.com with SMTPS id 1606934676027349.79383322825936; Wed, 2 Dec 2020 10:44:36 -0800 (PST) Received: by mail-ed1-f68.google.com with SMTP id cw27so1071227edb.5 for ; Wed, 02 Dec 2020 10:44:35 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (111.red-88-21-205.staticip.rima-tde.net. [88.21.205.111]) by smtp.gmail.com with ESMTPSA id e20sm538625edu.25.2020.12.02.10.44.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b+Fxow+oEWbA9tjXcJhsn1mux7Y5BxnpxnFopCv/eKM=; b=cSkNktiztvfwPcj9TDhtlpU0QAlBiEme6zG8hSJcre7bL/ueRjM25Ez9ZSMsY/dFRv 2eD864BfOuCJXrIj8nWLQUsg1zQKecHrC5QwDVcrSPmkDFOqN3YLVJnmlIk0U7xSc6aM aRNISKDggqfYo8TUHXgY4EvUeUw3hFs1H2D9OdMsWI9I7e7x29y72rBUR7uKysbY1JUr S37URkEsXMr48P1xKmcrAlDlL55Ap0jN+6ZlPl+N7vDWZq8nZXo1lSVWntkRePN9180X E9is08RpfODNm40dc1a1EMQ3z8hRzd0JlgWhO6sV0WMQONg4tlQCEq4hqJMlR8Dn359B Iq8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=b+Fxow+oEWbA9tjXcJhsn1mux7Y5BxnpxnFopCv/eKM=; b=k/AuJ/PpbXWJJfN8ajHjYwryHnDQF7PKxwIq8kHypSAG0yEIq+vrQaFGL/71A2dgQT soaKJz8q2SKggfFfedXYhErhNTVvoDwxNLs1euqWo7vuUJvL4iI9SYpakzitcLo/vzIq UgRmaxAd1+flu6vWBLyjwQRyMe9rwDRwmOCyVPiPb1rNyo3Tw1RjcuFVKdX/ZNTLSeuE lAiUo3TGqCV2t/KnhZMQaQjLdIHtfwz6P4EDsOwPhe0Vnq+e0DHzLwx2DeFdspX9F40O OEQS9yywMWLeEIRbRVuyuOVtckGd2VlKMimsW8wBoKn/tDBLDyO9TH94v5dp0Jp5Mwsf S0PQ== X-Gm-Message-State: AOAM532+p70tM2u7tkCbFvB0KnhVtPfbNgOhcEl7IZVN/jNYP1JgVRMb p1JnTofvPU6G35yeGAYJCm0= X-Google-Smtp-Source: ABdhPJzyBCo/fleK9MKte6zyYGXYyVa/HiaUOmGcqj9QDuopKYgN6NjtRhKkEgMnlAYPgNx6fS7OEA== X-Received: by 2002:aa7:dccd:: with SMTP id w13mr1277839edu.385.1606934674152; Wed, 02 Dec 2020 10:44:34 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA Date: Wed, 2 Dec 2020 19:44:09 +0100 Message-Id: <20201202184415.1434484-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) MSA presence is expressed by the MSAP bit of CP0_Config3. We don't need to check anything else. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index f882ac1580c..95cbd314018 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -433,7 +433,7 @@ static inline void compute_hflags(CPUMIPSState *env) env->hflags |=3D MIPS_HFLAG_COP1X; } } - if (env->insn_flags & ASE_MSA) { + if (ase_msa_available(env)) { if (env->CP0_Config5 & (1 << CP0C5_MSAEn)) { env->hflags |=3D MIPS_HFLAG_MSA; } --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.65 as permitted sender) client-ip=209.85.218.65; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f65.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.65 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail(p=none dis=none) header.from=amsat.org ARC-Seal: i=1; a=rsa-sha256; t=1606934681; cv=none; d=zohomail.com; s=zohoarc; b=G1YaWSkpzIk1F5/vQPb30cS/VangbO3gzRP9zlWyh0tCgqLNbycMyh7gF9SrI6hmqWBq5WgF6e60jeSjC2qjgVy+oEq6BuspnnzNqqKYnhIDHk5hf7VzIIeQOr5WvpC6eYLA/sfambKfYqcxykJiQx04kst8evQ7kwTzLXUT+Bo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606934681; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EfZKBB7TEk79ikaLZVaA0qdMSWTD8SEXSh/4GRS42BA=; b=PIqZc0rC5Xw4nJdZN/kCu6e5fcuJt0qRCIrpfD/wgIR1dGy7psWWSUMtuzyPdqtVrFm4Rk9KlDn4LoYVxGYfWPGitMbau3uvvv0/B4pdrYeWsYDO1q1k31J9kG0DYL5aMmpwK0yaKiwI1ULa11T1dwBpmIgpXoSoGlsItSjPucI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.65 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail-ej1-f65.google.com (mail-ej1-f65.google.com [209.85.218.65]) by mx.zohomail.com with SMTPS id 1606934681487728.4563242855149; Wed, 2 Dec 2020 10:44:41 -0800 (PST) Received: by mail-ej1-f65.google.com with SMTP id x16so5919291ejj.7 for ; Wed, 02 Dec 2020 10:44:40 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (111.red-88-21-205.staticip.rima-tde.net. [88.21.205.111]) by smtp.gmail.com with ESMTPSA id j20sm426900ejy.124.2020.12.02.10.44.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EfZKBB7TEk79ikaLZVaA0qdMSWTD8SEXSh/4GRS42BA=; b=P95A6tbhEC27Gb2iNPVIYBHFIIvucWz+VR+a4ybKvU3EiTnVdOdYajv6KzVoLOw1vi A5V1AmZVeBhnxduxA8gceXaEvcuEIXVge8O1e4n1GovoLkYDGjTiuil+mktQHpL9YvAA /BUVrienxo7FMO0jf4z1LVzfH49eNkNd8CTbt+APgo340yoKP77xI0/WAXuY39ujR0W+ inWBo6IXm1A3Qwr5oxXmVJeFB/481K9L+0E5jiJ/j1DVjBfJFy7uLyjpVfKD+fmVNXJg q26FGfDnStuNY7oJYTSdkNTZ1f9UxxxdYRtnCK+Mitu15gS/DMkF21uwmDPDYy4xFL4a G+Xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=EfZKBB7TEk79ikaLZVaA0qdMSWTD8SEXSh/4GRS42BA=; b=G9MY4SBY2ZQQph8ZIK97SGw+VUyWgQ6oaekkitKB0O0/wvyupPa9aJSRHYDjUmMJjN EySdBWSJulBPr6dD/A6E3FsExkB1OWU81Kx663bzo5T4liZW/n6YI5fzNpkv0XsU+hJB ow7iePmge2YpO1T/Eg6zjcDQEPfQ+KExQ+8klITDq/wE25si9mW0aXYvL9330EaLvAET 0llXOQdqEbBEJmAvprIrp1ldvc6Eeoluy4Mk5fi7TH6uwyzeJxL0m8G58rQJC/8X8l7B kApEcpFF7ma+HgU/ZoQjnxzK9hojO+3ggca20eOvN6wL2A1cDjGVZYhWQ9DguI+dxb+n 3Oag== X-Gm-Message-State: AOAM530dNcpChdT7e7Jn97uio5ONM74FHVWbwqy0n9pdEpuocYoz39Cp ActT5ZTJENbpThiT191Xoxw= X-Google-Smtp-Source: ABdhPJy49hwDReaOMfO3lnaEZQ3M3+pPQZ3B7DhL9efpAUnk5pW2RtqwkM/bDuoXEOF/WQE/LJCZXA== X-Received: by 2002:a17:906:2a19:: with SMTP id j25mr1082013eje.506.1606934679580; Wed, 02 Dec 2020 10:44:39 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 4/9] target/mips: Simplify MSA TCG logic Date: Wed, 2 Dec 2020 19:44:10 +0100 Message-Id: <20201202184415.1434484-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Only decode MSA opcodes if MSA is present (implemented). Now than check_msa_access() will only be called if MSA is present, the only way to have MIPS_HFLAG_MSA unset is if MSA is disabled (bit CP0C5_MSAEn cleared, see previous commit). Therefore we can remove the 'reserved instruction' exception. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/translate.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 803ffefba2c..a05c25e50b8 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28697,13 +28697,8 @@ static inline int check_msa_access(DisasContext *c= tx) } =20 if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) { - if (ctx->insn_flags & ASE_MSA) { - generate_exception_end(ctx, EXCP_MSADIS); - return 0; - } else { - generate_exception_end(ctx, EXCP_RI); - return 0; - } + generate_exception_end(ctx, EXCP_MSADIS); + return 0; } return 1; } @@ -30547,7 +30542,7 @@ static void gen_msa_vec(CPUMIPSState *env, DisasCon= text *ctx) static void gen_msa(CPUMIPSState *env, DisasContext *ctx) { uint32_t opcode =3D ctx->opcode; - check_insn(ctx, ASE_MSA); + check_msa_access(ctx); =20 switch (MASK_MSA_MINOR(opcode)) { @@ -31194,9 +31189,10 @@ static void decode_opc(CPUMIPSState *env, DisasCon= text *ctx) case OPC_BNZ_H: case OPC_BNZ_W: case OPC_BNZ_D: - check_insn(ctx, ASE_MSA); - gen_msa_branch(env, ctx, op1); - break; + if (ase_msa_available(env)) { + gen_msa_branch(env, ctx, op1); + break; + } default: MIPS_INVAL("cp1"); generate_exception_end(ctx, EXCP_RI); @@ -31385,7 +31381,9 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) #endif } else { /* MDMX: Not implemented. */ - gen_msa(env, ctx); + if (ase_msa_available(env)) { + gen_msa(env, ctx); + } } break; case OPC_PCREL: --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.50 as permitted sender) client-ip=209.85.218.50; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f50.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.50 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1606934686; cv=none; d=zohomail.com; s=zohoarc; b=a2dCFVbHQULOH5QkhD8Z/hfRZSGm6UhI5EgtUNlaHPMcAfCPV3RNx7imzWymEhvrW1y7f2eN6IaBJWtvFW13hR5WPbUEGjfIl7OxOvTWdAxM44f1EOPNtTMQBmPyyqTvyQbJxzG0qUVv9WtYPQ+s7Tjt4MryYNGFBnMVOcCTh+E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606934686; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vLfle+Khrb+jNknl9qLNu4/IaRmhOoPiQ1bCWscTpa8=; b=h1YrwsvOWwtgnb4iuQlyFuwlyOD+uXCcjNvYyuK4jLJxHBIcpgcLHR0HGyAXfm0JIrOl9yjzJ8M6kj+waivZVDZnZocXmfY8NyT8XHGohb8oIDq4OQJtQcS3rXcAO4ftruK+n78toHGtBJPV+3MlooiPjr0zFF1vQQny8zppf+A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.50 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) by mx.zohomail.com with SMTPS id 1606934686865352.64633150777445; Wed, 2 Dec 2020 10:44:46 -0800 (PST) Received: by mail-ej1-f50.google.com with SMTP id jx16so5896268ejb.10 for ; Wed, 02 Dec 2020 10:44:46 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (111.red-88-21-205.staticip.rima-tde.net. [88.21.205.111]) by smtp.gmail.com with ESMTPSA id z2sm506002edr.47.2020.12.02.10.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vLfle+Khrb+jNknl9qLNu4/IaRmhOoPiQ1bCWscTpa8=; b=k6LA4FjKbLo1e0EZcAw8OjDx6WJRuZ5isiJf2gQbNT7J7zzMdv0z55vmdw8Q453dXO 09RT0/fwoLyjryvAieQaTswBEoRM4BNXid0l0uoXhQkvZMikjylHyqYWgFG+Ikd+Iivt kQDn7uSfPOKwyK96uoNxyjC6K7zfgA9HRwbrYHanRhpsoFx2OXl4JyHdu7pmOz2Zqc9U rveBrE3r+RK+pZwMkUirkq9bj0hubckUDcbo88yRk9FnlMV1XOGVT+8KjivlxjaB4ZA6 2yu1Agbhe0LYXfcWHa0JmCga7AUWcDETq/bh2MXTOTq89D0nnAhR4V50nFbyr2y7Klvo qUJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=vLfle+Khrb+jNknl9qLNu4/IaRmhOoPiQ1bCWscTpa8=; b=i3WACw958rOUWdHZI7aKAu3JWPEWkQC4SG9B1l6pAc0HvJNzl+8Ksxs99IkEPIzMxb hIXNXOZyGXaiTa8x4PTXwOZbkas3Uz59iOa5223J/4w3Tnor7M4q2DyniOJYGhIiSZvc v4XKgKOlnoqBHwKyfAiqv1JOTBRodH/eWBGILlshlKSsoQx3TCtf9m+fkSDoffE2o0H4 /4NfZFGTlRFbagEFqjUla7/Qjv5po8pPqF8CjFeksHBC4vnjg7Tn/4tsTB1HRkvR8SBD XKZX3TfRvBS+zjPFGVHWtauAx4k6HIiTkIwW8AReJw4pAMeFL72er46X00KBZmAGGVqG MbXg== X-Gm-Message-State: AOAM532ekIfrF0P/ps/TcmAzh4L7v+E8FFF/UjDlycB84bwNnTRL6r9n d39nJeiuAR9bVd5lIJ7ObfU= X-Google-Smtp-Source: ABdhPJxANmBj/O2gJNTPFlCEZrpLeO/u99wBmHVQ9W8gHFrDNamvLDWP6Os/K+Pwap/GKdend2V7pQ== X-Received: by 2002:a17:907:214d:: with SMTP id rk13mr1105171ejb.501.1606934685030; Wed, 02 Dec 2020 10:44:45 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 5/9] target/mips: Remove now unused ASE_MSA definition Date: Wed, 2 Dec 2020 19:44:11 +0100 Message-Id: <20201202184415.1434484-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) We don't use ASE_MSA anymore (replaced by ase_msa_available() checking MSAP bit from CP0_Config3). Remove it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/mips-defs.h | 1 - target/mips/translate_init.c.inc | 8 ++++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index ed6a7a9e545..805034b8956 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -45,7 +45,6 @@ #define ASE_MT 0x0000000040000000ULL #define ASE_SMARTMIPS 0x0000000080000000ULL #define ASE_MICROMIPS 0x0000000100000000ULL -#define ASE_MSA 0x0000000200000000ULL /* * bits 40-51: vendor-specific base instruction sets */ diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.= c.inc index 3b069190ed8..2170f8ace6f 100644 --- a/target/mips/translate_init.c.inc +++ b/target/mips/translate_init.c.inc @@ -408,7 +408,7 @@ const mips_def_t mips_defs[] =3D .CP1_fcr31_rw_bitmask =3D 0xFF83FFFF, .SEGBITS =3D 32, .PABITS =3D 40, - .insn_flags =3D CPU_MIPS32R5 | ASE_MSA, + .insn_flags =3D CPU_MIPS32R5, .mmu_type =3D MMU_TYPE_R4000, }, { @@ -719,7 +719,7 @@ const mips_def_t mips_defs[] =3D .MSAIR =3D 0x03 << MSAIR_ProcID, .SEGBITS =3D 48, .PABITS =3D 48, - .insn_flags =3D CPU_MIPS64R6 | ASE_MSA, + .insn_flags =3D CPU_MIPS64R6, .mmu_type =3D MMU_TYPE_R4000, }, { @@ -759,7 +759,7 @@ const mips_def_t mips_defs[] =3D .MSAIR =3D 0x03 << MSAIR_ProcID, .SEGBITS =3D 48, .PABITS =3D 48, - .insn_flags =3D CPU_MIPS64R6 | ASE_MSA, + .insn_flags =3D CPU_MIPS64R6, .mmu_type =3D MMU_TYPE_R4000, }, { @@ -885,7 +885,7 @@ const mips_def_t mips_defs[] =3D .CP1_fcr31_rw_bitmask =3D 0xFF83FFFF, .SEGBITS =3D 48, .PABITS =3D 48, - .insn_flags =3D CPU_LOONGSON3A | ASE_MSA, + .insn_flags =3D CPU_LOONGSON3A, .mmu_type =3D MMU_TYPE_R4000, }, { --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.208.67 as permitted sender) client-ip=209.85.208.67; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-f67.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.67 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1606934692; cv=none; d=zohomail.com; s=zohoarc; b=QcRj4/9dzG2nyS60nOZs7ZLVk56MJ6CO5B6v1UC0iTKB+wh+GWKwpg+aD49u0NkDUrNIQpvX1D19XRCT0WIZATwzoff16+G5lmD9WcO2WvpY2nFlpyK74vrTrLhjUfKi0cgEOZaV2q4qJ0h/xV2JHL+Ab1pbUmKnmi8fxxhIBSw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606934692; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=O0Gmy5kVHrWtz2x/frWgI7xbHwcEYiFbHswDBnArJKk=; b=j1PMRdI7a7Oi3+PDf2gnS5/yC3udZjdot4Ws1creVBjR5btDfQoqEJV0qThEr/p4uR/ZooD3m0RTYvqpebNGMck/Rj3IRvOLWh9zc0xqWeakchlRn+85PXagQ6qoE9xzPNfZNhJb9C2Ujqz1Z7pZXwc7hXFJtUMwtCOi37PtJKU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.208.67 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ed1-f67.google.com (mail-ed1-f67.google.com [209.85.208.67]) by mx.zohomail.com with SMTPS id 1606934692442569.5761335534302; Wed, 2 Dec 2020 10:44:52 -0800 (PST) Received: by mail-ed1-f67.google.com with SMTP id u19so5127736edx.2 for ; Wed, 02 Dec 2020 10:44:51 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (111.red-88-21-205.staticip.rima-tde.net. [88.21.205.111]) by smtp.gmail.com with ESMTPSA id e12sm570657edm.48.2020.12.02.10.44.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O0Gmy5kVHrWtz2x/frWgI7xbHwcEYiFbHswDBnArJKk=; b=Cy9L94FFo4sSHWJnhtRu1Ih4nCtDWyS9sjq2wZBOV77ZLvh8BUlgDknPH9FR1PoIzt Dw/0hHJ6B8ugGuyL2qEKrB6fF0GkTonB76CuDVUCU0vB4vRRjLiGquMiky7KCDI7iNEz n7laZwqSDybgcWtezsBFArsIEiTm+MSRfw+BTblAKpR9IUR9iuopeoqdkjlOkqU7NlHJ Mzc7B1uzoCREAVxXMpWU8gtXQA22fbdepHUyBbMB3jCp17yDkAyUC8K1sbNiaOkcioZU yb7HtSCUwL+s4z3yrJgdENlNCi+0Yctgf5pLZ3rawYbNHDPVlYlMzLsvP135t+7JS9Xs mUmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=O0Gmy5kVHrWtz2x/frWgI7xbHwcEYiFbHswDBnArJKk=; b=XO3tdSSmkGYBODDeVRmUVCIQJQOzjr+RQkdZYYgN2cNF1+iWEGlu7kpiW9G4Xv56xM Yd5KQOKNRZEBfDFXNhsR8HErzuVgD6djSJriq9Td6XxW+bsK52w0RmsxkBkVj7UrhE7r z0eYPr/y4EYuqRCliKU1hApL16xP9xo1cN7NhXsLnIsYmhD/blEUc4vDCM1Vp2DD79l/ UimTin93tJcyQxfkMfLuL/kSHGtHtBnvVxp1j0EUzW6hs4nRRq3T4UYc4qTN3Aw4x5aY GHfJ5EOmDxLkJ47gI70hVZKeioR0EQNJVQ5CU7npgm0uKSDJvDTK0IFbO0BQC6MqstF2 sFzw== X-Gm-Message-State: AOAM533Q1CzK5m1ZMQapZ03K7kKFg7Cuf2GgnHqehjOIPIogfOB7Ijgt X01Q0zj9yNkwVOURZCyS3j0= X-Google-Smtp-Source: ABdhPJzH0s/mvRJGBWMPJEUdTKPTxukUS8ZrESWtCMCmpvq+4sQLddwuyMLZaTIeUkLh/3YtQrq5zw== X-Received: by 2002:a50:ff0c:: with SMTP id a12mr1312530edu.79.1606934690471; Wed, 02 Dec 2020 10:44:50 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers Date: Wed, 2 Dec 2020 19:44:12 +0100 Message-Id: <20201202184415.1434484-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Commits 863f264d10f ("add msa_reset(), global msa register") and cb269f273fd ("fix multiple TCG registers covering same data") removed the FPU scalar registers and replaced them by aliases to the MSA vector registers. While this might be the case for CPU implementing MSA, this makes QEMU code incoherent for CPU not implementing it. It is simpler to inverse the logic and alias the MSA vector registers on the FPU scalar ones. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/translate.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index a05c25e50b8..41880f21abd 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31682,16 +31682,20 @@ void mips_tcg_init(void) offsetof(CPUMIPSState, active_tc.gpr[i]), regnames[i]); - for (i =3D 0; i < 32; i++) { int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); - msa_wr_d[i * 2] =3D - tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]); + + fpu_f64[i] =3D tcg_global_mem_new_i64(cpu_env, off, msaregnames[i = * 2]); + } + /* MSA */ + for (i =3D 0; i < 32; i++) { + int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); + /* - * The scalar floating-point unit (FPU) registers are mapped on - * the MSA vector registers. + * The MSA vector registers are mapped on the + * scalar floating-point unit (FPU) registers. */ - fpu_f64[i] =3D msa_wr_d[i * 2]; + msa_wr_d[i * 2] =3D fpu_f64[i]; off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); msa_wr_d[i * 2 + 1] =3D tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1= ]); --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.65 as permitted sender) client-ip=209.85.218.65; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f65.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.65 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1606934697; cv=none; d=zohomail.com; s=zohoarc; b=HEv6CEZHlKmgGXaPoSyhCHJzHZkkMiiW30a+Zjry2uUqMMMbnyKhSjCNWq6vUTsbB+JkXl6g6QkXqm3Bdea+BBv2G/FuAuhEElOLmhRv5TA81da5tdNj9VX3nubcsyP62DVOpcYcqPEAjmnOg970vVCjm2bpEREgHHVwF8tK34g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606934697; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=g86VgmSNy4f4zzNJeVPl770oLi4Jhzj+nbmAAlUIF60=; b=fUWeB/hZrqcG5aGf6eaOmAP2uMcPWVP4Y0hvJ2rPJbBzDnJCsMSXICb85m/4dOgd0qtyX9mm7RbssftNDRk0GtKHHP3LlUBWHC9oJP7G3yXjA5L1FIUXPOgezap+X+MNxX4uKkSy6czvK/4pI4JnTzdLn7SMW47yqLROm72xHiY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.65 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f65.google.com (mail-ej1-f65.google.com [209.85.218.65]) by mx.zohomail.com with SMTPS id 160693469778888.50819134479741; Wed, 2 Dec 2020 10:44:57 -0800 (PST) Received: by mail-ej1-f65.google.com with SMTP id n26so709474eju.6 for ; Wed, 02 Dec 2020 10:44:57 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (111.red-88-21-205.staticip.rima-tde.net. [88.21.205.111]) by smtp.gmail.com with ESMTPSA id d7sm575737edv.17.2020.12.02.10.44.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:44:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g86VgmSNy4f4zzNJeVPl770oLi4Jhzj+nbmAAlUIF60=; b=Oi1mz7FptywDHxL4wFFotazbFkvsdN+8GtFfpfUzmHCiPc/x2VxgbGdYABGUrTFIbU 5Hmko5FGjblPU29p6aui0qp6lJMZsFt92u1DXkyHFhFVxQNCQyXUaxO1CRI/M8hlioKF z8NaUrdaS0ptFNJ96W+aVYOn5EOkM4DBCzMrpZ112PWuQL6BS1jdFvt3UGE+hkXf2mL8 DveDDsY4P6Yp1kXA0meLFC8kNo2Zm+ZO8yb257XDpNMHd0ieSMxfTKQHdwc43X+FNJmh jykwuofme+rQ2v8HYxmRURyGMbJjTCkqpgjCfRkljDq3OmfTpfzmMUSHVSoxmcVDsvH+ ucGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=g86VgmSNy4f4zzNJeVPl770oLi4Jhzj+nbmAAlUIF60=; b=gC2ijtZpTWiHXGr4eBXC0t4VQN/UGDqguMdje4D9V4+3NVZro+fI/FCMydhym0NFeW lFQOvl2llwRdSEBo7k+g8HygzPyuWJMh1YMqyhS3avJuKJYuDODCmbU7intU4MP9fEyB qcxhY5pKtfXW/2nVKHDbtOFlI9Q0QZuANzXmr0Jhiu73WlcCa1TTthy6gPvIahiW6wEq zRVDb4BVvehywHKOTxoZzgJIk3DnblwRP79YG3MuRkVOAxY8RgJtitXt/e59H5Ow+sqj DP7GmDYph9IuJqL7Gghq5hne/uXT60EaX/W4wFVZkjeItw2uBa9xp2lM0o2TVegST/JK eFHw== X-Gm-Message-State: AOAM533gOaZKF0eUmYN6eqpMB7J7u7PBzLwJLAMOv9/sQDOSWh7kHkQ+ YphPDEeTX4hCTGi0Kx5l5K4= X-Google-Smtp-Source: ABdhPJwjeCuvpeuBnGWFwyPDgCk9BaHv5eStq6XWq+D3+5rh2254O9WeuxjHg+qB3zX5zSHBorSF5A== X-Received: by 2002:a17:906:6713:: with SMTP id a19mr1164126ejp.468.1606934695848; Wed, 02 Dec 2020 10:44:55 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init() Date: Wed, 2 Dec 2020 19:44:13 +0100 Message-Id: <20201202184415.1434484-8-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Extract the logic initialization of the MSA registers from the generic initialization. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/translate.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 41880f21abd..a5112acc351 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31672,6 +31672,24 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, in= t flags) } } =20 +static void msa_translate_init(void) +{ + int i; + + for (i =3D 0; i < 32; i++) { + int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); + + /* + * The MSA vector registers are mapped on the + * scalar floating-point unit (FPU) registers. + */ + msa_wr_d[i * 2] =3D fpu_f64[i]; + off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); + msa_wr_d[i * 2 + 1] =3D + tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1= ]); + } +} + void mips_tcg_init(void) { int i; @@ -31685,22 +31703,9 @@ void mips_tcg_init(void) for (i =3D 0; i < 32; i++) { int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); =20 - fpu_f64[i] =3D tcg_global_mem_new_i64(cpu_env, off, msaregnames[i = * 2]); + fpu_f64[i] =3D tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); } - /* MSA */ - for (i =3D 0; i < 32; i++) { - int off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); - - /* - * The MSA vector registers are mapped on the - * scalar floating-point unit (FPU) registers. - */ - msa_wr_d[i * 2] =3D fpu_f64[i]; - off =3D offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); - msa_wr_d[i * 2 + 1] =3D - tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1= ]); - } - + msa_translate_init(); cpu_PC =3D tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, active_tc.PC), "PC"= ); for (i =3D 0; i < MIPS_DSP_ACC; i++) { --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.218.66 as permitted sender) client-ip=209.85.218.66; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-f66.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.66 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1606934703; cv=none; d=zohomail.com; s=zohoarc; b=KPTNfFU5zTrwjutrIkJSN8nlU86+fPgd652SGfcuPs5hJwPV9xwNUovfCs/fn9xXmdT7VN1EpGreISrfUyk2zo5ESbJnPDO9rYob3p/Fcdl5tgaXpTgS8eV6E4GooK39bhuUjo/4oynnmWQjUWk9Fdg9bcW3yt+w3qEgOshVumM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606934703; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=eHXFXj870qIY4C/nWYXRi/ekP6hdOkoFn16uMxuOt10=; b=TeR+YuFMR1KBzLoiN2aijSWe4knNPB1sVsB+FjsTUFWb0xMyO2egFWI0a45Fhy6ORSTY1dRDBihRuYxwMB+f9OqD7wKT8cekRNB1mgcPznAPqk2MK7RVqoUPI4Y3qtPwXXlgz9h+IpNtSSb6tP7SejbOVV6yaykyIwK/Tgwkt9U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.218.66 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-ej1-f66.google.com (mail-ej1-f66.google.com [209.85.218.66]) by mx.zohomail.com with SMTPS id 1606934703247518.2404401966269; Wed, 2 Dec 2020 10:45:03 -0800 (PST) Received: by mail-ej1-f66.google.com with SMTP id jx16so5897387ejb.10 for ; Wed, 02 Dec 2020 10:45:02 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (111.red-88-21-205.staticip.rima-tde.net. [88.21.205.111]) by smtp.gmail.com with ESMTPSA id cb14sm449258ejb.105.2020.12.02.10.44.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:45:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eHXFXj870qIY4C/nWYXRi/ekP6hdOkoFn16uMxuOt10=; b=MOATcFxyWEXuIJOfCzgDGP/eo9oBYc/wwsOhQbE4b+OvOC1874QiVJXWDWt0x/vyop LwyMaNRD+fNKQMU3Xf5AN5Zg8HhoXohX2VnCiCWQDU9PepFqNbexMVRi/T2eHJRfnzAp ZDRWF6GupuD4xpKe3E8vEqEikkQUg4weSQ7ekH+iegJvqyljIqX6g4XdWFqoJT/b2hdu jCn0rg0XJMGotIJXVNGKX8Cgwex9acBzZKaQHQ4SWcEzX93Uhsy0PugTyo8qv8wMy5Cc JCUXdmgOtqdXxKJp9wEjIBH7pPoHuGe6sAg3jAyWUwdreWrSSf/YfCRL5mqcrLruZZJq TF3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=eHXFXj870qIY4C/nWYXRi/ekP6hdOkoFn16uMxuOt10=; b=Ho1Oel8gEDh9t9F9TzHHW9W8ik9vN/Z7vJFD+ZajvuEjjFBbbUE1kHZq11SSoUP+rB zBMyLwhe5l5iOu5ek65+gqko8x8zG/BJO3C5ebkCJjpgMptspdDKoi3T/ruWvUCAYV/6 pauFPQvOjtJtWIGQGYu8WmYkQfhDsdAENUucIQIsnSmtXb/oDeMyfiA/E9lQE58QU4LR ItSE3J/bQqSNsoehUp0gYkWPthtOhMsHcT8ZD239lVSW9r5BNHg36xP8+Nv3RqZO64PI 8Ey9XD1ziyGNgQVaOnP+C7VAgJMys61KVp8K3c9SR1jDsqG+rfVWN6kloHfrUO1sYxKJ H8UQ== X-Gm-Message-State: AOAM533XKJBEeY8jpb/d/5kOogYkDPU2uORLMOZQ9LhwH7b6BieBfquF pXzuL+ZtworI3t9lJtrxORw= X-Google-Smtp-Source: ABdhPJzY357Mkj0Ye7EAR4HvTrZLd8oLHnF74RVnfog/mNjIQhygZUKsA+/cv185VPgcdjEsEiLMBw== X-Received: by 2002:a17:907:210b:: with SMTP id qn11mr1141345ejb.41.1606934701182; Wed, 02 Dec 2020 10:45:01 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 8/9] target/mips: Remove CPUMIPSState* argument from gen_msa*() methods Date: Wed, 2 Dec 2020 19:44:14 +0100 Message-Id: <20201202184415.1434484-9-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The gen_msa*() methods don't use the "CPUMIPSState *env" argument. Remove it to simplify. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/translate.c | 57 ++++++++++++++++++++--------------------- 1 file changed, 28 insertions(+), 29 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index a5112acc351..5311e6ced62 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28744,7 +28744,7 @@ static void gen_check_zero_element(TCGv tresult, ui= nt8_t df, uint8_t wt) tcg_temp_free_i64(t1); } =20 -static void gen_msa_branch(CPUMIPSState *env, DisasContext *ctx, uint32_t = op1) +static void gen_msa_branch(DisasContext *ctx, uint32_t op1) { uint8_t df =3D (ctx->opcode >> 21) & 0x3; uint8_t wt =3D (ctx->opcode >> 16) & 0x1f; @@ -28789,7 +28789,7 @@ static void gen_msa_branch(CPUMIPSState *env, Disas= Context *ctx, uint32_t op1) ctx->hflags |=3D MIPS_HFLAG_BDS32; } =20 -static void gen_msa_i8(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_i8(DisasContext *ctx) { #define MASK_MSA_I8(op) (MASK_MSA_MINOR(op) | (op & (0x03 << 24))) uint8_t i8 =3D (ctx->opcode >> 16) & 0xff; @@ -28847,7 +28847,7 @@ static void gen_msa_i8(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(ti8); } =20 -static void gen_msa_i5(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_i5(DisasContext *ctx) { #define MASK_MSA_I5(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) uint8_t df =3D (ctx->opcode >> 21) & 0x3; @@ -28920,7 +28920,7 @@ static void gen_msa_i5(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(timm); } =20 -static void gen_msa_bit(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_bit(DisasContext *ctx) { #define MASK_MSA_BIT(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) uint8_t dfm =3D (ctx->opcode >> 16) & 0x7f; @@ -29004,7 +29004,7 @@ static void gen_msa_bit(CPUMIPSState *env, DisasCon= text *ctx) tcg_temp_free_i32(tws); } =20 -static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_3r(DisasContext *ctx) { #define MASK_MSA_3R(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) uint8_t df =3D (ctx->opcode >> 21) & 0x3; @@ -29986,7 +29986,7 @@ static void gen_msa_3r(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_elm_3e(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_elm_3e(DisasContext *ctx) { #define MASK_MSA_ELM_DF3E(op) (MASK_MSA_MINOR(op) | (op & (0x3FF << 16))) uint8_t source =3D (ctx->opcode >> 11) & 0x1f; @@ -30018,8 +30018,7 @@ static void gen_msa_elm_3e(CPUMIPSState *env, Disas= Context *ctx) tcg_temp_free_i32(tsr); } =20 -static void gen_msa_elm_df(CPUMIPSState *env, DisasContext *ctx, uint32_t = df, - uint32_t n) +static void gen_msa_elm_df(DisasContext *ctx, uint32_t df, uint32_t n) { #define MASK_MSA_ELM(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) uint8_t ws =3D (ctx->opcode >> 11) & 0x1f; @@ -30129,7 +30128,7 @@ static void gen_msa_elm_df(CPUMIPSState *env, Disas= Context *ctx, uint32_t df, tcg_temp_free_i32(tdf); } =20 -static void gen_msa_elm(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_elm(DisasContext *ctx) { uint8_t dfn =3D (ctx->opcode >> 16) & 0x3f; uint32_t df =3D 0, n =3D 0; @@ -30148,17 +30147,17 @@ static void gen_msa_elm(CPUMIPSState *env, DisasC= ontext *ctx) df =3D DF_DOUBLE; } else if (dfn =3D=3D 0x3E) { /* CTCMSA, CFCMSA, MOVE.V */ - gen_msa_elm_3e(env, ctx); + gen_msa_elm_3e(ctx); return; } else { generate_exception_end(ctx, EXCP_RI); return; } =20 - gen_msa_elm_df(env, ctx, df, n); + gen_msa_elm_df(ctx, df, n); } =20 -static void gen_msa_3rf(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_3rf(DisasContext *ctx) { #define MASK_MSA_3RF(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) uint8_t df =3D (ctx->opcode >> 21) & 0x1; @@ -30316,7 +30315,7 @@ static void gen_msa_3rf(CPUMIPSState *env, DisasCon= text *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_2r(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_2r(DisasContext *ctx) { #define MASK_MSA_2R(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ (op & (0x7 << 18))) @@ -30400,7 +30399,7 @@ static void gen_msa_2r(CPUMIPSState *env, DisasCont= ext *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_2rf(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_2rf(DisasContext *ctx) { #define MASK_MSA_2RF(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ (op & (0xf << 17))) @@ -30471,7 +30470,7 @@ static void gen_msa_2rf(CPUMIPSState *env, DisasCon= text *ctx) tcg_temp_free_i32(tdf); } =20 -static void gen_msa_vec_v(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_vec_v(DisasContext *ctx) { #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) uint8_t wt =3D (ctx->opcode >> 16) & 0x1f; @@ -30514,7 +30513,7 @@ static void gen_msa_vec_v(CPUMIPSState *env, DisasC= ontext *ctx) tcg_temp_free_i32(twt); } =20 -static void gen_msa_vec(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa_vec(DisasContext *ctx) { switch (MASK_MSA_VEC(ctx->opcode)) { case OPC_AND_V: @@ -30524,13 +30523,13 @@ static void gen_msa_vec(CPUMIPSState *env, DisasC= ontext *ctx) case OPC_BMNZ_V: case OPC_BMZ_V: case OPC_BSEL_V: - gen_msa_vec_v(env, ctx); + gen_msa_vec_v(ctx); break; case OPC_MSA_2R: - gen_msa_2r(env, ctx); + gen_msa_2r(ctx); break; case OPC_MSA_2RF: - gen_msa_2rf(env, ctx); + gen_msa_2rf(ctx); break; default: MIPS_INVAL("MSA instruction"); @@ -30539,7 +30538,7 @@ static void gen_msa_vec(CPUMIPSState *env, DisasCon= text *ctx) } } =20 -static void gen_msa(CPUMIPSState *env, DisasContext *ctx) +static void gen_msa(DisasContext *ctx) { uint32_t opcode =3D ctx->opcode; =20 @@ -30549,15 +30548,15 @@ static void gen_msa(CPUMIPSState *env, DisasConte= xt *ctx) case OPC_MSA_I8_00: case OPC_MSA_I8_01: case OPC_MSA_I8_02: - gen_msa_i8(env, ctx); + gen_msa_i8(ctx); break; case OPC_MSA_I5_06: case OPC_MSA_I5_07: - gen_msa_i5(env, ctx); + gen_msa_i5(ctx); break; case OPC_MSA_BIT_09: case OPC_MSA_BIT_0A: - gen_msa_bit(env, ctx); + gen_msa_bit(ctx); break; case OPC_MSA_3R_0D: case OPC_MSA_3R_0E: @@ -30568,18 +30567,18 @@ static void gen_msa(CPUMIPSState *env, DisasConte= xt *ctx) case OPC_MSA_3R_13: case OPC_MSA_3R_14: case OPC_MSA_3R_15: - gen_msa_3r(env, ctx); + gen_msa_3r(ctx); break; case OPC_MSA_ELM: - gen_msa_elm(env, ctx); + gen_msa_elm(ctx); break; case OPC_MSA_3RF_1A: case OPC_MSA_3RF_1B: case OPC_MSA_3RF_1C: - gen_msa_3rf(env, ctx); + gen_msa_3rf(ctx); break; case OPC_MSA_VEC: - gen_msa_vec(env, ctx); + gen_msa_vec(ctx); break; case OPC_LD_B: case OPC_LD_H: @@ -31190,7 +31189,7 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) case OPC_BNZ_W: case OPC_BNZ_D: if (ase_msa_available(env)) { - gen_msa_branch(env, ctx, op1); + gen_msa_branch(ctx, op1); break; } default: @@ -31382,7 +31381,7 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) } else { /* MDMX: Not implemented. */ if (ase_msa_available(env)) { - gen_msa(env, ctx); + gen_msa(ctx); } } break; --=20 2.26.2 From nobody Mon Nov 17 23:51:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.208.66 as permitted sender) client-ip=209.85.208.66; envelope-from=philippe.mathieu.daude@gmail.com; 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[88.21.205.111]) by smtp.gmail.com with ESMTPSA id d6sm422392ejy.114.2020.12.02.10.45.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:45:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0qmkrGEptEVCiJDUjarR/sRg1xwrhJu0233f4iQghuE=; b=VEEiKEGje4NdtnwGQCYst8TxXWK5/CVSc/ZzNsq1ZhVu7vMHzteTxzkAsI4OOFbiWX HjD9XbSrA2c7MR4No4cE4zLDR16YtHGwvQvhYUZteP0g+lkUyqDHLzmenKBixYwDUppG JJz+YClSRXfnHzEjP11OgGuQYdL20QtIYe6z4+Ov6Sg/V9Ix7xkN6py4bndZ+pPgLoxK 2uvRAulzkg2yoNaxg1n1etRR26/kdzrJ14lnjsHQdf5g/T828CVaxQ2OPvf6TRJJ3hjV w71d0jIdBxSmVEXQIGuS7Sl3qTNuyQCuX/Wwxz6mEu7idkTzUTgxaMGxgOoSdvxeZr6S cVuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=0qmkrGEptEVCiJDUjarR/sRg1xwrhJu0233f4iQghuE=; b=Aj3HgfKnDXcgvpgJaVPKddjXvJVbhvE/Fxbjv1HzXfVIFoZKfjHtVJ+j/5rjiaD3fw eUj93RKRdnZqHyLQZRdTuekWMuGDJbOUrUEjW+ZrpTCue8RUlljYQ78AxF4CSRFVuARW n7bfN94Jn3jULmpkyi/OtLlBZB53RhUjs1ltlvldwSmJQKkex6UDZXOnCYV6CQ6Gp8JP yWVK/JAF5SddfmTl6jbqcX12DLdzYmjjhYQsVfaSAH57bIpTV5nN0yLfawlCDwyNoN6g IUJzQAyTp6HD3KveilxFzwERxv0XX5q8ecYh09Tr1KyXRfe1heriA1R1LHjy06cNKXRC 783A== X-Gm-Message-State: AOAM530wMCGe/5ZI1UiZRSlYLLG+3IxOiQvyBHxxWppYoWuRhNZu5URg KO56tZd+1UeNicglDN1ZqL4= X-Google-Smtp-Source: ABdhPJxb2Ob7W36UI/neEUTCqa00p170OxQsXQBj26kqOCh9An69Gf1sXgBnrt2+t71q44K8JynDPA== X-Received: by 2002:a05:6402:134a:: with SMTP id y10mr1304889edw.144.1606934706666; Wed, 02 Dec 2020 10:45:06 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Huacai Chen , Richard Henderson , kvm@vger.kernel.org, Aleksandar Rikalo , Paolo Bonzini , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 9/9] target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ() Date: Wed, 2 Dec 2020 19:44:15 +0100 Message-Id: <20201202184415.1434484-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201202184415.1434484-1-f4bug@amsat.org> References: <20201202184415.1434484-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) In preparation of using the decodetree script, explode gen_msa_branch() as following: - OPC_BZ_V -> BxZ_V(EQ) - OPC_BNZ_V -> BxZ_V(NE) - OPC_BZ_[BHWD] -> BxZ(false) - OPC_BNZ_[BHWD] -> BxZ(true) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson --- target/mips/translate.c | 71 ++++++++++++++++++++++++++++------------- 1 file changed, 49 insertions(+), 22 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 5311e6ced62..8a35d4d0d03 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28744,49 +28744,76 @@ static void gen_check_zero_element(TCGv tresult, = uint8_t df, uint8_t wt) tcg_temp_free_i64(t1); } =20 +static bool gen_msa_BxZ_V(DisasContext *ctx, int wt, int s16, TCGCond cond) +{ + TCGv_i64 t0; + + check_msa_access(ctx); + + if (ctx->hflags & MIPS_HFLAG_BMASK) { + generate_exception_end(ctx, EXCP_RI); + return true; + } + t0 =3D tcg_temp_new_i64(); + tcg_gen_or_i64(t0, msa_wr_d[wt << 1], msa_wr_d[(wt << 1) + 1]); + tcg_gen_setcondi_i64(cond, t0, t0, 0); + tcg_gen_trunc_i64_tl(bcond, t0); + tcg_temp_free_i64(t0); + + ctx->btarget =3D ctx->base.pc_next + (s16 << 2) + 4; + + ctx->hflags |=3D MIPS_HFLAG_BC; + ctx->hflags |=3D MIPS_HFLAG_BDS32; + + return true; +} + +static bool gen_msa_BxZ(DisasContext *ctx, int df, int wt, int s16, bool i= f_not) +{ + check_msa_access(ctx); + + if (ctx->hflags & MIPS_HFLAG_BMASK) { + generate_exception_end(ctx, EXCP_RI); + return true; + } + + gen_check_zero_element(bcond, df, wt); + if (if_not) { + tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, bcond, 0); + } + + ctx->btarget =3D ctx->base.pc_next + (s16 << 2) + 4; + ctx->hflags |=3D MIPS_HFLAG_BC; + ctx->hflags |=3D MIPS_HFLAG_BDS32; + + return true; +} + static void gen_msa_branch(DisasContext *ctx, uint32_t op1) { uint8_t df =3D (ctx->opcode >> 21) & 0x3; uint8_t wt =3D (ctx->opcode >> 16) & 0x1f; int64_t s16 =3D (int16_t)ctx->opcode; =20 - check_msa_access(ctx); - - if (ctx->hflags & MIPS_HFLAG_BMASK) { - generate_exception_end(ctx, EXCP_RI); - return; - } switch (op1) { case OPC_BZ_V: case OPC_BNZ_V: - { - TCGv_i64 t0 =3D tcg_temp_new_i64(); - tcg_gen_or_i64(t0, msa_wr_d[wt << 1], msa_wr_d[(wt << 1) + 1]); - tcg_gen_setcondi_i64((op1 =3D=3D OPC_BZ_V) ? - TCG_COND_EQ : TCG_COND_NE, t0, t0, 0); - tcg_gen_trunc_i64_tl(bcond, t0); - tcg_temp_free_i64(t0); - } + gen_msa_BxZ_V(ctx, wt, s16, (op1 =3D=3D OPC_BZ_V) ? + TCG_COND_EQ : TCG_COND_NE); break; case OPC_BZ_B: case OPC_BZ_H: case OPC_BZ_W: case OPC_BZ_D: - gen_check_zero_element(bcond, df, wt); + gen_msa_BxZ(ctx, df, wt, s16, false); break; case OPC_BNZ_B: case OPC_BNZ_H: case OPC_BNZ_W: case OPC_BNZ_D: - gen_check_zero_element(bcond, df, wt); - tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, bcond, 0); + gen_msa_BxZ(ctx, df, wt, s16, true); break; } - - ctx->btarget =3D ctx->base.pc_next + (s16 << 2) + 4; - - ctx->hflags |=3D MIPS_HFLAG_BC; - ctx->hflags |=3D MIPS_HFLAG_BDS32; } =20 static void gen_msa_i8(DisasContext *ctx) --=20 2.26.2