From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427514; cv=none; d=zohomail.com; s=zohoarc; b=PZvqTAQiX75p+hJK/666QggY2+SywQCfFPBfmFcJ9mh6O9aYvu7WAELce4ZyskmFyuxG/HteBKbtXvj63BFTsbrAtWybeYddY9dAOjhDxTLfbNSCLm7nV1S3r8rLusp7X+H4bNRJnIZcvfWwI1koZR8X2NBnOcXidHwux5yqZvE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427514; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Sf+DuqwDCUCV+d8d2OBlRlg2vsmiKOSNpN5e7g3jBgk=; b=It7GFFgjqzD2TSCcPQR+0C9gOwr5o0U6dJWOruBagfpz85FuC7OST3pXZbtGhsP5VlMBYy2CY9HykFXQuVXdBYA07VIB9HLV4SkuFEaOuHxG7rsWIuDQ5tXOfDCK+5de/g5BYyLWcm3BqwodwTQ5jpKuk3CAAIdVJ4l44X72WMs= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1606427514427334.42991840837556; Thu, 26 Nov 2020 13:51:54 -0800 (PST) Received: from localhost ([::1]:60382 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPBB-0003Nq-Av for importer@patchew.org; Thu, 26 Nov 2020 16:51:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36294) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9l-0001jw-Mf; Thu, 26 Nov 2020 16:50:25 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60516 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9i-0005jn-N8; Thu, 26 Nov 2020 16:50:25 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id 920D63900501; Thu, 26 Nov 2020 22:50:18 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 1/8] hvf: Add hypervisor entitlement to output binaries Date: Thu, 26 Nov 2020 22:50:10 +0100 Message-Id: <20201126215017.41156-2-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In macOS 11, QEMU only gets access to Hypervisor.framework if it has the respective entitlement. Add an entitlement template and automatically self sign and apply the entitlement in the build. Signed-off-by: Alexander Graf --- accel/hvf/entitlements.plist | 8 ++++++++ meson.build | 30 ++++++++++++++++++++++++++---- scripts/entitlement.sh | 11 +++++++++++ 3 files changed, 45 insertions(+), 4 deletions(-) create mode 100644 accel/hvf/entitlements.plist create mode 100755 scripts/entitlement.sh diff --git a/accel/hvf/entitlements.plist b/accel/hvf/entitlements.plist new file mode 100644 index 0000000000..154f3308ef --- /dev/null +++ b/accel/hvf/entitlements.plist @@ -0,0 +1,8 @@ + + + + + com.apple.security.hypervisor + + + diff --git a/meson.build b/meson.build index 5062407c70..2a7ff5560c 100644 --- a/meson.build +++ b/meson.build @@ -1844,9 +1844,14 @@ foreach target : target_dirs }] endif foreach exe: execs - emulators +=3D {exe['name']: - executable(exe['name'], exe['sources'], - install: true, + exe_name =3D exe['name'] + exe_sign =3D 'CONFIG_HVF' in config_target + if exe_sign + exe_name +=3D '-unsigned' + endif + + emulator =3D executable(exe_name, exe['sources'], + install: not exe_sign, c_args: c_args, dependencies: arch_deps + deps + exe['dependencies'], objects: lib.extract_all_objects(recursive: true), @@ -1854,7 +1859,24 @@ foreach target : target_dirs link_depends: [block_syms, qemu_syms] + exe.get('link_depen= ds', []), link_args: link_args, gui_app: exe['gui']) - } + + if exe_sign + exe_full =3D meson.current_build_dir() / exe['name'] + emulators +=3D {exe['name'] : custom_target(exe['name'], + install: true, + install_dir: get_option('bindir'), + depends: emulator, + output: exe['name'], + command: [ + meson.current_source_dir() / 'scripts/entitlement.sh', + meson.current_build_dir() / exe['name'] + '-unsigned', + meson.current_build_dir() / exe['name'], + meson.current_source_dir() / 'accel/hvf/entitlements.= plist' + ]) + } + else + emulators +=3D {exe['name']: emulator} + endif =20 if 'CONFIG_TRACE_SYSTEMTAP' in config_host foreach stp: [ diff --git a/scripts/entitlement.sh b/scripts/entitlement.sh new file mode 100755 index 0000000000..7ed9590bf9 --- /dev/null +++ b/scripts/entitlement.sh @@ -0,0 +1,11 @@ +#!/bin/sh -e +# +# Helper script for the build process to apply entitlements + +SRC=3D"$1" +DST=3D"$2" +ENTITLEMENT=3D"$3" + +rm -f "$2" +cp -a "$SRC" "$DST" +codesign --entitlements "$ENTITLEMENT" --force -s - "$DST" --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 26 Nov 2020 13:55:41 -0800 (PST) Received: from localhost ([::1]:42444 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPEq-0007c4-EK for importer@patchew.org; Thu, 26 Nov 2020 16:55:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36306) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9m-0001lW-EI; Thu, 26 Nov 2020 16:50:30 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60536 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9h-0005kG-Vw; Thu, 26 Nov 2020 16:50:26 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id 0F7773900529; Thu, 26 Nov 2020 22:50:19 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 2/8] hvf: Move common code out Date: Thu, 26 Nov 2020 22:50:11 +0100 Message-Id: <20201126215017.41156-3-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Until now, Hypervisor.framework has only been available on x86_64 systems. With Apple Silicon shipping now, it extends its reach to aarch64. To prepare for support for multiple architectures, let's move common code out into its own accel directory. Signed-off-by: Alexander Graf --- MAINTAINERS | 9 +- accel/hvf/hvf-all.c | 56 +++++ accel/hvf/hvf-cpus.c | 468 ++++++++++++++++++++++++++++++++++++ accel/hvf/meson.build | 7 + accel/meson.build | 1 + include/sysemu/hvf_int.h | 69 ++++++ target/i386/hvf/hvf-cpus.c | 131 ---------- target/i386/hvf/hvf-cpus.h | 25 -- target/i386/hvf/hvf-i386.h | 48 +--- target/i386/hvf/hvf.c | 360 +-------------------------- target/i386/hvf/meson.build | 1 - target/i386/hvf/x86hvf.c | 11 +- target/i386/hvf/x86hvf.h | 2 - 13 files changed, 619 insertions(+), 569 deletions(-) create mode 100644 accel/hvf/hvf-all.c create mode 100644 accel/hvf/hvf-cpus.c create mode 100644 accel/hvf/meson.build create mode 100644 include/sysemu/hvf_int.h delete mode 100644 target/i386/hvf/hvf-cpus.c delete mode 100644 target/i386/hvf/hvf-cpus.h diff --git a/MAINTAINERS b/MAINTAINERS index 68bc160f41..ca4b6d9279 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -444,9 +444,16 @@ M: Cameron Esfahani M: Roman Bolshakov W: https://wiki.qemu.org/Features/HVF S: Maintained -F: accel/stubs/hvf-stub.c F: target/i386/hvf/ + +HVF +M: Cameron Esfahani +M: Roman Bolshakov +W: https://wiki.qemu.org/Features/HVF +S: Maintained +F: accel/hvf/ F: include/sysemu/hvf.h +F: include/sysemu/hvf_int.h =20 WHPX CPUs M: Sunil Muthuswamy diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c new file mode 100644 index 0000000000..47d77a472a --- /dev/null +++ b/accel/hvf/hvf-all.c @@ -0,0 +1,56 @@ +/* + * QEMU Hypervisor.framework support + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Contributions after 2012-01-13 are licensed under the terms of the + * GNU GPL, version 2 or (at your option) any later version. + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "qemu/error-report.h" +#include "sysemu/hvf.h" +#include "sysemu/hvf_int.h" +#include "sysemu/runstate.h" + +#include "qemu/main-loop.h" +#include "sysemu/accel.h" + +#include + +bool hvf_allowed; +HVFState *hvf_state; + +void assert_hvf_ok(hv_return_t ret) +{ + if (ret =3D=3D HV_SUCCESS) { + return; + } + + switch (ret) { + case HV_ERROR: + error_report("Error: HV_ERROR"); + break; + case HV_BUSY: + error_report("Error: HV_BUSY"); + break; + case HV_BAD_ARGUMENT: + error_report("Error: HV_BAD_ARGUMENT"); + break; + case HV_NO_RESOURCES: + error_report("Error: HV_NO_RESOURCES"); + break; + case HV_NO_DEVICE: + error_report("Error: HV_NO_DEVICE"); + break; + case HV_UNSUPPORTED: + error_report("Error: HV_UNSUPPORTED"); + break; + default: + error_report("Unknown Error"); + } + + abort(); +} diff --git a/accel/hvf/hvf-cpus.c b/accel/hvf/hvf-cpus.c new file mode 100644 index 0000000000..f9bb5502b7 --- /dev/null +++ b/accel/hvf/hvf-cpus.c @@ -0,0 +1,468 @@ +/* + * Copyright 2008 IBM Corporation + * 2008 Red Hat, Inc. + * Copyright 2011 Intel Corporation + * Copyright 2016 Veertu, Inc. + * Copyright 2017 The Android Open Source Project + * + * QEMU Hypervisor.framework support + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + * + * This file contain code under public domain from the hvdos project: + * https://github.com/mist64/hvdos + * + * Parts Copyright (c) 2011 NetApp, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP= OSE + * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT= IAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR= ICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W= AY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "qemu/main-loop.h" +#include "exec/address-spaces.h" +#include "exec/exec-all.h" +#include "sysemu/cpus.h" +#include "sysemu/hvf.h" +#include "sysemu/hvf_int.h" +#include "sysemu/runstate.h" +#include "qemu/guest-random.h" + +#include + +/* Memory slots */ + +struct mac_slot { + int present; + uint64_t size; + uint64_t gpa_start; + uint64_t gva; +}; + +hvf_slot *hvf_find_overlap_slot(uint64_t start, uint64_t size) +{ + hvf_slot *slot; + int x; + for (x =3D 0; x < hvf_state->num_slots; ++x) { + slot =3D &hvf_state->slots[x]; + if (slot->size && start < (slot->start + slot->size) && + (start + size) > slot->start) { + return slot; + } + } + return NULL; +} + +struct mac_slot mac_slots[32]; + +static int do_hvf_set_memory(hvf_slot *slot, hv_memory_flags_t flags) +{ + struct mac_slot *macslot; + hv_return_t ret; + + macslot =3D &mac_slots[slot->slot_id]; + + if (macslot->present) { + if (macslot->size !=3D slot->size) { + macslot->present =3D 0; + ret =3D hv_vm_unmap(macslot->gpa_start, macslot->size); + assert_hvf_ok(ret); + } + } + + if (!slot->size) { + return 0; + } + + macslot->present =3D 1; + macslot->gpa_start =3D slot->start; + macslot->size =3D slot->size; + ret =3D hv_vm_map(slot->mem, slot->start, slot->size, flags); + assert_hvf_ok(ret); + return 0; +} + +static void hvf_set_phys_mem(MemoryRegionSection *section, bool add) +{ + hvf_slot *mem; + MemoryRegion *area =3D section->mr; + bool writeable =3D !area->readonly && !area->rom_device; + hv_memory_flags_t flags; + + if (!memory_region_is_ram(area)) { + if (writeable) { + return; + } else if (!memory_region_is_romd(area)) { + /* + * If the memory device is not in romd_mode, then we actually = want + * to remove the hvf memory slot so all accesses will trap. + */ + add =3D false; + } + } + + mem =3D hvf_find_overlap_slot( + section->offset_within_address_space, + int128_get64(section->size)); + + if (mem && add) { + if (mem->size =3D=3D int128_get64(section->size) && + mem->start =3D=3D section->offset_within_address_space && + mem->mem =3D=3D (memory_region_get_ram_ptr(area) + + section->offset_within_region)) { + return; /* Same region was attempted to register, go away. */ + } + } + + /* Region needs to be reset. set the size to 0 and remap it. */ + if (mem) { + mem->size =3D 0; + if (do_hvf_set_memory(mem, 0)) { + error_report("Failed to reset overlapping slot"); + abort(); + } + } + + if (!add) { + return; + } + + if (area->readonly || + (!memory_region_is_ram(area) && memory_region_is_romd(area))) { + flags =3D HV_MEMORY_READ | HV_MEMORY_EXEC; + } else { + flags =3D HV_MEMORY_READ | HV_MEMORY_WRITE | HV_MEMORY_EXEC; + } + + /* Now make a new slot. */ + int x; + + for (x =3D 0; x < hvf_state->num_slots; ++x) { + mem =3D &hvf_state->slots[x]; + if (!mem->size) { + break; + } + } + + if (x =3D=3D hvf_state->num_slots) { + error_report("No free slots"); + abort(); + } + + mem->size =3D int128_get64(section->size); + mem->mem =3D memory_region_get_ram_ptr(area) + section->offset_within_= region; + mem->start =3D section->offset_within_address_space; + mem->region =3D area; + + if (do_hvf_set_memory(mem, flags)) { + error_report("Error registering new memory slot"); + abort(); + } +} + +static void hvf_set_dirty_tracking(MemoryRegionSection *section, bool on) +{ + hvf_slot *slot; + + slot =3D hvf_find_overlap_slot( + section->offset_within_address_space, + int128_get64(section->size)); + + /* protect region against writes; begin tracking it */ + if (on) { + slot->flags |=3D HVF_SLOT_LOG; + hv_vm_protect((uintptr_t)slot->start, (size_t)slot->size, + HV_MEMORY_READ); + /* stop tracking region*/ + } else { + slot->flags &=3D ~HVF_SLOT_LOG; + hv_vm_protect((uintptr_t)slot->start, (size_t)slot->size, + HV_MEMORY_READ | HV_MEMORY_WRITE); + } +} + +static void hvf_log_start(MemoryListener *listener, + MemoryRegionSection *section, int old, int new) +{ + if (old !=3D 0) { + return; + } + + hvf_set_dirty_tracking(section, 1); +} + +static void hvf_log_stop(MemoryListener *listener, + MemoryRegionSection *section, int old, int new) +{ + if (new !=3D 0) { + return; + } + + hvf_set_dirty_tracking(section, 0); +} + +static void hvf_log_sync(MemoryListener *listener, + MemoryRegionSection *section) +{ + /* + * sync of dirty pages is handled elsewhere; just make sure we keep + * tracking the region. + */ + hvf_set_dirty_tracking(section, 1); +} + +static void hvf_region_add(MemoryListener *listener, + MemoryRegionSection *section) +{ + hvf_set_phys_mem(section, true); +} + +static void hvf_region_del(MemoryListener *listener, + MemoryRegionSection *section) +{ + hvf_set_phys_mem(section, false); +} + +static MemoryListener hvf_memory_listener =3D { + .priority =3D 10, + .region_add =3D hvf_region_add, + .region_del =3D hvf_region_del, + .log_start =3D hvf_log_start, + .log_stop =3D hvf_log_stop, + .log_sync =3D hvf_log_sync, +}; + +static void do_hvf_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data ar= g) +{ + if (!cpu->vcpu_dirty) { + hvf_get_registers(cpu); + cpu->vcpu_dirty =3D true; + } +} + +static void hvf_cpu_synchronize_state(CPUState *cpu) +{ + if (!cpu->vcpu_dirty) { + run_on_cpu(cpu, do_hvf_cpu_synchronize_state, RUN_ON_CPU_NULL); + } +} + +static void do_hvf_cpu_synchronize_post_reset(CPUState *cpu, + run_on_cpu_data arg) +{ + hvf_put_registers(cpu); + cpu->vcpu_dirty =3D false; +} + +static void hvf_cpu_synchronize_post_reset(CPUState *cpu) +{ + run_on_cpu(cpu, do_hvf_cpu_synchronize_post_reset, RUN_ON_CPU_NULL); +} + +static void do_hvf_cpu_synchronize_post_init(CPUState *cpu, + run_on_cpu_data arg) +{ + hvf_put_registers(cpu); + cpu->vcpu_dirty =3D false; +} + +static void hvf_cpu_synchronize_post_init(CPUState *cpu) +{ + run_on_cpu(cpu, do_hvf_cpu_synchronize_post_init, RUN_ON_CPU_NULL); +} + +static void do_hvf_cpu_synchronize_pre_loadvm(CPUState *cpu, + run_on_cpu_data arg) +{ + cpu->vcpu_dirty =3D true; +} + +static void hvf_cpu_synchronize_pre_loadvm(CPUState *cpu) +{ + run_on_cpu(cpu, do_hvf_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL); +} + +static void hvf_vcpu_destroy(CPUState *cpu) +{ + hv_return_t ret =3D hv_vcpu_destroy(cpu->hvf_fd); + assert_hvf_ok(ret); + + hvf_arch_vcpu_destroy(cpu); +} + +static void dummy_signal(int sig) +{ +} + +static int hvf_init_vcpu(CPUState *cpu) +{ + int r; + + /* init cpu signals */ + sigset_t set; + struct sigaction sigact; + + memset(&sigact, 0, sizeof(sigact)); + sigact.sa_handler =3D dummy_signal; + sigaction(SIG_IPI, &sigact, NULL); + + pthread_sigmask(SIG_BLOCK, NULL, &set); + sigdelset(&set, SIG_IPI); + +#ifdef __aarch64__ + r =3D hv_vcpu_create(&cpu->hvf_fd, (hv_vcpu_exit_t **)&cpu->hvf_exit, = NULL); +#else + r =3D hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf_fd, HV_VCPU_DEFAULT); +#endif + cpu->vcpu_dirty =3D 1; + assert_hvf_ok(r); + + return hvf_arch_init_vcpu(cpu); +} + +/* + * The HVF-specific vCPU thread function. This one should only run when th= e host + * CPU supports the VMX "unrestricted guest" feature. + */ +static void *hvf_cpu_thread_fn(void *arg) +{ + CPUState *cpu =3D arg; + + int r; + + assert(hvf_enabled()); + + rcu_register_thread(); + + qemu_mutex_lock_iothread(); + qemu_thread_get_self(cpu->thread); + + cpu->thread_id =3D qemu_get_thread_id(); + cpu->can_do_io =3D 1; + current_cpu =3D cpu; + + hvf_init_vcpu(cpu); + + /* signal CPU creation */ + cpu_thread_signal_created(cpu); + qemu_guest_random_seed_thread_part2(cpu->random_seed); + + do { + if (cpu_can_run(cpu)) { + r =3D hvf_vcpu_exec(cpu); + if (r =3D=3D EXCP_DEBUG) { + cpu_handle_guest_debug(cpu); + } + } + qemu_wait_io_event(cpu); + } while (!cpu->unplug || cpu_can_run(cpu)); + + hvf_vcpu_destroy(cpu); + cpu_thread_signal_destroyed(cpu); + qemu_mutex_unlock_iothread(); + rcu_unregister_thread(); + return NULL; +} + +static void hvf_start_vcpu_thread(CPUState *cpu) +{ + char thread_name[VCPU_THREAD_NAME_SIZE]; + + /* + * HVF currently does not support TCG, and only runs in + * unrestricted-guest mode. + */ + assert(hvf_enabled()); + + cpu->thread =3D g_malloc0(sizeof(QemuThread)); + cpu->halt_cond =3D g_malloc0(sizeof(QemuCond)); + qemu_cond_init(cpu->halt_cond); + + snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/HVF", + cpu->cpu_index); + qemu_thread_create(cpu->thread, thread_name, hvf_cpu_thread_fn, + cpu, QEMU_THREAD_JOINABLE); +} + +static const CpusAccel hvf_cpus =3D { + .create_vcpu_thread =3D hvf_start_vcpu_thread, + + .synchronize_post_reset =3D hvf_cpu_synchronize_post_reset, + .synchronize_post_init =3D hvf_cpu_synchronize_post_init, + .synchronize_state =3D hvf_cpu_synchronize_state, + .synchronize_pre_loadvm =3D hvf_cpu_synchronize_pre_loadvm, +}; + +static int hvf_accel_init(MachineState *ms) +{ + int x; + hv_return_t ret; + HVFState *s; + + ret =3D hv_vm_create(HV_VM_DEFAULT); + assert_hvf_ok(ret); + + s =3D g_new0(HVFState, 1); + + s->num_slots =3D 32; + for (x =3D 0; x < s->num_slots; ++x) { + s->slots[x].size =3D 0; + s->slots[x].slot_id =3D x; + } + + hvf_state =3D s; + memory_listener_register(&hvf_memory_listener, &address_space_memory); + cpus_register_accel(&hvf_cpus); + return 0; +} + +static void hvf_accel_class_init(ObjectClass *oc, void *data) +{ + AccelClass *ac =3D ACCEL_CLASS(oc); + ac->name =3D "HVF"; + ac->init_machine =3D hvf_accel_init; + ac->allowed =3D &hvf_allowed; +} + +static const TypeInfo hvf_accel_type =3D { + .name =3D TYPE_HVF_ACCEL, + .parent =3D TYPE_ACCEL, + .class_init =3D hvf_accel_class_init, +}; + +static void hvf_type_init(void) +{ + type_register_static(&hvf_accel_type); +} + +type_init(hvf_type_init); diff --git a/accel/hvf/meson.build b/accel/hvf/meson.build new file mode 100644 index 0000000000..dfd6b68dc7 --- /dev/null +++ b/accel/hvf/meson.build @@ -0,0 +1,7 @@ +hvf_ss =3D ss.source_set() +hvf_ss.add(files( + 'hvf-all.c', + 'hvf-cpus.c', +)) + +specific_ss.add_all(when: 'CONFIG_HVF', if_true: hvf_ss) diff --git a/accel/meson.build b/accel/meson.build index b26cca227a..6de12ce5d5 100644 --- a/accel/meson.build +++ b/accel/meson.build @@ -1,5 +1,6 @@ softmmu_ss.add(files('accel.c')) =20 +subdir('hvf') subdir('qtest') subdir('kvm') subdir('tcg') diff --git a/include/sysemu/hvf_int.h b/include/sysemu/hvf_int.h new file mode 100644 index 0000000000..de9bad23a8 --- /dev/null +++ b/include/sysemu/hvf_int.h @@ -0,0 +1,69 @@ +/* + * QEMU Hypervisor.framework (HVF) support + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + */ + +/* header to be included in HVF-specific code */ + +#ifndef HVF_INT_H +#define HVF_INT_H + +#include + +#define HVF_MAX_VCPU 0x10 + +extern struct hvf_state hvf_global; + +struct hvf_vm { + int id; + struct hvf_vcpu_state *vcpus[HVF_MAX_VCPU]; +}; + +struct hvf_state { + uint32_t version; + struct hvf_vm *vm; + uint64_t mem_quota; +}; + +/* hvf_slot flags */ +#define HVF_SLOT_LOG (1 << 0) + +typedef struct hvf_slot { + uint64_t start; + uint64_t size; + uint8_t *mem; + int slot_id; + uint32_t flags; + MemoryRegion *region; +} hvf_slot; + +typedef struct hvf_vcpu_caps { + uint64_t vmx_cap_pinbased; + uint64_t vmx_cap_procbased; + uint64_t vmx_cap_procbased2; + uint64_t vmx_cap_entry; + uint64_t vmx_cap_exit; + uint64_t vmx_cap_preemption_timer; +} hvf_vcpu_caps; + +struct HVFState { + AccelState parent; + hvf_slot slots[32]; + int num_slots; + + hvf_vcpu_caps *hvf_caps; +}; +extern HVFState *hvf_state; + +void assert_hvf_ok(hv_return_t ret); +int hvf_get_registers(CPUState *cpu); +int hvf_put_registers(CPUState *cpu); +int hvf_arch_init_vcpu(CPUState *cpu); +void hvf_arch_vcpu_destroy(CPUState *cpu); +int hvf_vcpu_exec(CPUState *cpu); +hvf_slot *hvf_find_overlap_slot(uint64_t, uint64_t); + +#endif diff --git a/target/i386/hvf/hvf-cpus.c b/target/i386/hvf/hvf-cpus.c deleted file mode 100644 index 817b3d7452..0000000000 --- a/target/i386/hvf/hvf-cpus.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright 2008 IBM Corporation - * 2008 Red Hat, Inc. - * Copyright 2011 Intel Corporation - * Copyright 2016 Veertu, Inc. - * Copyright 2017 The Android Open Source Project - * - * QEMU Hypervisor.framework support - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of version 2 of the GNU General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - * - * This file contain code under public domain from the hvdos project: - * https://github.com/mist64/hvdos - * - * Parts Copyright (c) 2011 NetApp, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP= OSE - * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT= IAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR= ICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W= AY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "qemu/osdep.h" -#include "qemu/error-report.h" -#include "qemu/main-loop.h" -#include "sysemu/hvf.h" -#include "sysemu/runstate.h" -#include "target/i386/cpu.h" -#include "qemu/guest-random.h" - -#include "hvf-cpus.h" - -/* - * The HVF-specific vCPU thread function. This one should only run when th= e host - * CPU supports the VMX "unrestricted guest" feature. - */ -static void *hvf_cpu_thread_fn(void *arg) -{ - CPUState *cpu =3D arg; - - int r; - - assert(hvf_enabled()); - - rcu_register_thread(); - - qemu_mutex_lock_iothread(); - qemu_thread_get_self(cpu->thread); - - cpu->thread_id =3D qemu_get_thread_id(); - cpu->can_do_io =3D 1; - current_cpu =3D cpu; - - hvf_init_vcpu(cpu); - - /* signal CPU creation */ - cpu_thread_signal_created(cpu); - qemu_guest_random_seed_thread_part2(cpu->random_seed); - - do { - if (cpu_can_run(cpu)) { - r =3D hvf_vcpu_exec(cpu); - if (r =3D=3D EXCP_DEBUG) { - cpu_handle_guest_debug(cpu); - } - } - qemu_wait_io_event(cpu); - } while (!cpu->unplug || cpu_can_run(cpu)); - - hvf_vcpu_destroy(cpu); - cpu_thread_signal_destroyed(cpu); - qemu_mutex_unlock_iothread(); - rcu_unregister_thread(); - return NULL; -} - -static void hvf_start_vcpu_thread(CPUState *cpu) -{ - char thread_name[VCPU_THREAD_NAME_SIZE]; - - /* - * HVF currently does not support TCG, and only runs in - * unrestricted-guest mode. - */ - assert(hvf_enabled()); - - cpu->thread =3D g_malloc0(sizeof(QemuThread)); - cpu->halt_cond =3D g_malloc0(sizeof(QemuCond)); - qemu_cond_init(cpu->halt_cond); - - snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/HVF", - cpu->cpu_index); - qemu_thread_create(cpu->thread, thread_name, hvf_cpu_thread_fn, - cpu, QEMU_THREAD_JOINABLE); -} - -const CpusAccel hvf_cpus =3D { - .create_vcpu_thread =3D hvf_start_vcpu_thread, - - .synchronize_post_reset =3D hvf_cpu_synchronize_post_reset, - .synchronize_post_init =3D hvf_cpu_synchronize_post_init, - .synchronize_state =3D hvf_cpu_synchronize_state, - .synchronize_pre_loadvm =3D hvf_cpu_synchronize_pre_loadvm, -}; diff --git a/target/i386/hvf/hvf-cpus.h b/target/i386/hvf/hvf-cpus.h deleted file mode 100644 index ced31b82c0..0000000000 --- a/target/i386/hvf/hvf-cpus.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Accelerator CPUS Interface - * - * Copyright 2020 SUSE LLC - * - * This work is licensed under the terms of the GNU GPL, version 2 or late= r. - * See the COPYING file in the top-level directory. - */ - -#ifndef HVF_CPUS_H -#define HVF_CPUS_H - -#include "sysemu/cpus.h" - -extern const CpusAccel hvf_cpus; - -int hvf_init_vcpu(CPUState *); -int hvf_vcpu_exec(CPUState *); -void hvf_cpu_synchronize_state(CPUState *); -void hvf_cpu_synchronize_post_reset(CPUState *); -void hvf_cpu_synchronize_post_init(CPUState *); -void hvf_cpu_synchronize_pre_loadvm(CPUState *); -void hvf_vcpu_destroy(CPUState *); - -#endif /* HVF_CPUS_H */ diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h index e0edffd077..6d56f8f6bb 100644 --- a/target/i386/hvf/hvf-i386.h +++ b/target/i386/hvf/hvf-i386.h @@ -18,57 +18,11 @@ =20 #include "sysemu/accel.h" #include "sysemu/hvf.h" +#include "sysemu/hvf_int.h" #include "cpu.h" #include "x86.h" =20 -#define HVF_MAX_VCPU 0x10 - -extern struct hvf_state hvf_global; - -struct hvf_vm { - int id; - struct hvf_vcpu_state *vcpus[HVF_MAX_VCPU]; -}; - -struct hvf_state { - uint32_t version; - struct hvf_vm *vm; - uint64_t mem_quota; -}; - -/* hvf_slot flags */ -#define HVF_SLOT_LOG (1 << 0) - -typedef struct hvf_slot { - uint64_t start; - uint64_t size; - uint8_t *mem; - int slot_id; - uint32_t flags; - MemoryRegion *region; -} hvf_slot; - -typedef struct hvf_vcpu_caps { - uint64_t vmx_cap_pinbased; - uint64_t vmx_cap_procbased; - uint64_t vmx_cap_procbased2; - uint64_t vmx_cap_entry; - uint64_t vmx_cap_exit; - uint64_t vmx_cap_preemption_timer; -} hvf_vcpu_caps; - -struct HVFState { - AccelState parent; - hvf_slot slots[32]; - int num_slots; - - hvf_vcpu_caps *hvf_caps; -}; -extern HVFState *hvf_state; - -void hvf_set_phys_mem(MemoryRegionSection *, bool); void hvf_handle_io(CPUArchState *, uint16_t, void *, int, int, int); -hvf_slot *hvf_find_overlap_slot(uint64_t, uint64_t); =20 #ifdef NEED_CPU_H /* Functions exported to host specific mode */ diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index ed9356565c..8b96ecd619 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -51,6 +51,7 @@ #include "qemu/error-report.h" =20 #include "sysemu/hvf.h" +#include "sysemu/hvf_int.h" #include "sysemu/runstate.h" #include "hvf-i386.h" #include "vmcs.h" @@ -72,171 +73,6 @@ #include "sysemu/accel.h" #include "target/i386/cpu.h" =20 -#include "hvf-cpus.h" - -HVFState *hvf_state; - -static void assert_hvf_ok(hv_return_t ret) -{ - if (ret =3D=3D HV_SUCCESS) { - return; - } - - switch (ret) { - case HV_ERROR: - error_report("Error: HV_ERROR"); - break; - case HV_BUSY: - error_report("Error: HV_BUSY"); - break; - case HV_BAD_ARGUMENT: - error_report("Error: HV_BAD_ARGUMENT"); - break; - case HV_NO_RESOURCES: - error_report("Error: HV_NO_RESOURCES"); - break; - case HV_NO_DEVICE: - error_report("Error: HV_NO_DEVICE"); - break; - case HV_UNSUPPORTED: - error_report("Error: HV_UNSUPPORTED"); - break; - default: - error_report("Unknown Error"); - } - - abort(); -} - -/* Memory slots */ -hvf_slot *hvf_find_overlap_slot(uint64_t start, uint64_t size) -{ - hvf_slot *slot; - int x; - for (x =3D 0; x < hvf_state->num_slots; ++x) { - slot =3D &hvf_state->slots[x]; - if (slot->size && start < (slot->start + slot->size) && - (start + size) > slot->start) { - return slot; - } - } - return NULL; -} - -struct mac_slot { - int present; - uint64_t size; - uint64_t gpa_start; - uint64_t gva; -}; - -struct mac_slot mac_slots[32]; - -static int do_hvf_set_memory(hvf_slot *slot, hv_memory_flags_t flags) -{ - struct mac_slot *macslot; - hv_return_t ret; - - macslot =3D &mac_slots[slot->slot_id]; - - if (macslot->present) { - if (macslot->size !=3D slot->size) { - macslot->present =3D 0; - ret =3D hv_vm_unmap(macslot->gpa_start, macslot->size); - assert_hvf_ok(ret); - } - } - - if (!slot->size) { - return 0; - } - - macslot->present =3D 1; - macslot->gpa_start =3D slot->start; - macslot->size =3D slot->size; - ret =3D hv_vm_map((hv_uvaddr_t)slot->mem, slot->start, slot->size, fla= gs); - assert_hvf_ok(ret); - return 0; -} - -void hvf_set_phys_mem(MemoryRegionSection *section, bool add) -{ - hvf_slot *mem; - MemoryRegion *area =3D section->mr; - bool writeable =3D !area->readonly && !area->rom_device; - hv_memory_flags_t flags; - - if (!memory_region_is_ram(area)) { - if (writeable) { - return; - } else if (!memory_region_is_romd(area)) { - /* - * If the memory device is not in romd_mode, then we actually = want - * to remove the hvf memory slot so all accesses will trap. - */ - add =3D false; - } - } - - mem =3D hvf_find_overlap_slot( - section->offset_within_address_space, - int128_get64(section->size)); - - if (mem && add) { - if (mem->size =3D=3D int128_get64(section->size) && - mem->start =3D=3D section->offset_within_address_space && - mem->mem =3D=3D (memory_region_get_ram_ptr(area) + - section->offset_within_region)) { - return; /* Same region was attempted to register, go away. */ - } - } - - /* Region needs to be reset. set the size to 0 and remap it. */ - if (mem) { - mem->size =3D 0; - if (do_hvf_set_memory(mem, 0)) { - error_report("Failed to reset overlapping slot"); - abort(); - } - } - - if (!add) { - return; - } - - if (area->readonly || - (!memory_region_is_ram(area) && memory_region_is_romd(area))) { - flags =3D HV_MEMORY_READ | HV_MEMORY_EXEC; - } else { - flags =3D HV_MEMORY_READ | HV_MEMORY_WRITE | HV_MEMORY_EXEC; - } - - /* Now make a new slot. */ - int x; - - for (x =3D 0; x < hvf_state->num_slots; ++x) { - mem =3D &hvf_state->slots[x]; - if (!mem->size) { - break; - } - } - - if (x =3D=3D hvf_state->num_slots) { - error_report("No free slots"); - abort(); - } - - mem->size =3D int128_get64(section->size); - mem->mem =3D memory_region_get_ram_ptr(area) + section->offset_within_= region; - mem->start =3D section->offset_within_address_space; - mem->region =3D area; - - if (do_hvf_set_memory(mem, flags)) { - error_report("Error registering new memory slot"); - abort(); - } -} - void vmx_update_tpr(CPUState *cpu) { /* TODO: need integrate APIC handling */ @@ -276,56 +112,6 @@ void hvf_handle_io(CPUArchState *env, uint16_t port, v= oid *buffer, } } =20 -static void do_hvf_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data ar= g) -{ - if (!cpu->vcpu_dirty) { - hvf_get_registers(cpu); - cpu->vcpu_dirty =3D true; - } -} - -void hvf_cpu_synchronize_state(CPUState *cpu) -{ - if (!cpu->vcpu_dirty) { - run_on_cpu(cpu, do_hvf_cpu_synchronize_state, RUN_ON_CPU_NULL); - } -} - -static void do_hvf_cpu_synchronize_post_reset(CPUState *cpu, - run_on_cpu_data arg) -{ - hvf_put_registers(cpu); - cpu->vcpu_dirty =3D false; -} - -void hvf_cpu_synchronize_post_reset(CPUState *cpu) -{ - run_on_cpu(cpu, do_hvf_cpu_synchronize_post_reset, RUN_ON_CPU_NULL); -} - -static void do_hvf_cpu_synchronize_post_init(CPUState *cpu, - run_on_cpu_data arg) -{ - hvf_put_registers(cpu); - cpu->vcpu_dirty =3D false; -} - -void hvf_cpu_synchronize_post_init(CPUState *cpu) -{ - run_on_cpu(cpu, do_hvf_cpu_synchronize_post_init, RUN_ON_CPU_NULL); -} - -static void do_hvf_cpu_synchronize_pre_loadvm(CPUState *cpu, - run_on_cpu_data arg) -{ - cpu->vcpu_dirty =3D true; -} - -void hvf_cpu_synchronize_pre_loadvm(CPUState *cpu) -{ - run_on_cpu(cpu, do_hvf_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL); -} - static bool ept_emulation_fault(hvf_slot *slot, uint64_t gpa, uint64_t ept= _qual) { int read, write; @@ -370,109 +156,19 @@ static bool ept_emulation_fault(hvf_slot *slot, uint= 64_t gpa, uint64_t ept_qual) return false; } =20 -static void hvf_set_dirty_tracking(MemoryRegionSection *section, bool on) -{ - hvf_slot *slot; - - slot =3D hvf_find_overlap_slot( - section->offset_within_address_space, - int128_get64(section->size)); - - /* protect region against writes; begin tracking it */ - if (on) { - slot->flags |=3D HVF_SLOT_LOG; - hv_vm_protect((hv_gpaddr_t)slot->start, (size_t)slot->size, - HV_MEMORY_READ); - /* stop tracking region*/ - } else { - slot->flags &=3D ~HVF_SLOT_LOG; - hv_vm_protect((hv_gpaddr_t)slot->start, (size_t)slot->size, - HV_MEMORY_READ | HV_MEMORY_WRITE); - } -} - -static void hvf_log_start(MemoryListener *listener, - MemoryRegionSection *section, int old, int new) -{ - if (old !=3D 0) { - return; - } - - hvf_set_dirty_tracking(section, 1); -} - -static void hvf_log_stop(MemoryListener *listener, - MemoryRegionSection *section, int old, int new) -{ - if (new !=3D 0) { - return; - } - - hvf_set_dirty_tracking(section, 0); -} - -static void hvf_log_sync(MemoryListener *listener, - MemoryRegionSection *section) -{ - /* - * sync of dirty pages is handled elsewhere; just make sure we keep - * tracking the region. - */ - hvf_set_dirty_tracking(section, 1); -} - -static void hvf_region_add(MemoryListener *listener, - MemoryRegionSection *section) -{ - hvf_set_phys_mem(section, true); -} - -static void hvf_region_del(MemoryListener *listener, - MemoryRegionSection *section) -{ - hvf_set_phys_mem(section, false); -} - -static MemoryListener hvf_memory_listener =3D { - .priority =3D 10, - .region_add =3D hvf_region_add, - .region_del =3D hvf_region_del, - .log_start =3D hvf_log_start, - .log_stop =3D hvf_log_stop, - .log_sync =3D hvf_log_sync, -}; - -void hvf_vcpu_destroy(CPUState *cpu) +void hvf_arch_vcpu_destroy(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; =20 - hv_return_t ret =3D hv_vcpu_destroy((hv_vcpuid_t)cpu->hvf_fd); g_free(env->hvf_mmio_buf); - assert_hvf_ok(ret); -} - -static void dummy_signal(int sig) -{ } =20 -int hvf_init_vcpu(CPUState *cpu) +int hvf_arch_init_vcpu(CPUState *cpu) { =20 X86CPU *x86cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86cpu->env; - int r; - - /* init cpu signals */ - sigset_t set; - struct sigaction sigact; - - memset(&sigact, 0, sizeof(sigact)); - sigact.sa_handler =3D dummy_signal; - sigaction(SIG_IPI, &sigact, NULL); - - pthread_sigmask(SIG_BLOCK, NULL, &set); - sigdelset(&set, SIG_IPI); =20 init_emu(); init_decoder(); @@ -480,10 +176,6 @@ int hvf_init_vcpu(CPUState *cpu) hvf_state->hvf_caps =3D g_new0(struct hvf_vcpu_caps, 1); env->hvf_mmio_buf =3D g_new(char, 4096); =20 - r =3D hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf_fd, HV_VCPU_DEFAULT); - cpu->vcpu_dirty =3D 1; - assert_hvf_ok(r); - if (hv_vmx_read_capability(HV_VMX_CAP_PINBASED, &hvf_state->hvf_caps->vmx_cap_pinbased)) { abort(); @@ -865,49 +557,3 @@ int hvf_vcpu_exec(CPUState *cpu) =20 return ret; } - -bool hvf_allowed; - -static int hvf_accel_init(MachineState *ms) -{ - int x; - hv_return_t ret; - HVFState *s; - - ret =3D hv_vm_create(HV_VM_DEFAULT); - assert_hvf_ok(ret); - - s =3D g_new0(HVFState, 1); -=20 - s->num_slots =3D 32; - for (x =3D 0; x < s->num_slots; ++x) { - s->slots[x].size =3D 0; - s->slots[x].slot_id =3D x; - } - =20 - hvf_state =3D s; - memory_listener_register(&hvf_memory_listener, &address_space_memory); - cpus_register_accel(&hvf_cpus); - return 0; -} - -static void hvf_accel_class_init(ObjectClass *oc, void *data) -{ - AccelClass *ac =3D ACCEL_CLASS(oc); - ac->name =3D "HVF"; - ac->init_machine =3D hvf_accel_init; - ac->allowed =3D &hvf_allowed; -} - -static const TypeInfo hvf_accel_type =3D { - .name =3D TYPE_HVF_ACCEL, - .parent =3D TYPE_ACCEL, - .class_init =3D hvf_accel_class_init, -}; - -static void hvf_type_init(void) -{ - type_register_static(&hvf_accel_type); -} - -type_init(hvf_type_init); diff --git a/target/i386/hvf/meson.build b/target/i386/hvf/meson.build index 409c9a3f14..c8a43717ee 100644 --- a/target/i386/hvf/meson.build +++ b/target/i386/hvf/meson.build @@ -1,6 +1,5 @@ i386_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files( 'hvf.c', - 'hvf-cpus.c', 'x86.c', 'x86_cpuid.c', 'x86_decode.c', diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index bbec412b6c..89b8e9d87a 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -20,6 +20,9 @@ #include "qemu/osdep.h" =20 #include "qemu-common.h" +#include "sysemu/hvf.h" +#include "sysemu/hvf_int.h" +#include "sysemu/hw_accel.h" #include "x86hvf.h" #include "vmx.h" #include "vmcs.h" @@ -32,8 +35,6 @@ #include #include =20 -#include "hvf-cpus.h" - void hvf_set_segment(struct CPUState *cpu, struct vmx_segment *vmx_seg, SegmentCache *qseg, bool is_tr) { @@ -437,7 +438,7 @@ int hvf_process_events(CPUState *cpu_state) env->eflags =3D rreg(cpu_state->hvf_fd, HV_X86_RFLAGS); =20 if (cpu_state->interrupt_request & CPU_INTERRUPT_INIT) { - hvf_cpu_synchronize_state(cpu_state); + cpu_synchronize_state(cpu_state); do_cpu_init(cpu); } =20 @@ -451,12 +452,12 @@ int hvf_process_events(CPUState *cpu_state) cpu_state->halted =3D 0; } if (cpu_state->interrupt_request & CPU_INTERRUPT_SIPI) { - hvf_cpu_synchronize_state(cpu_state); + cpu_synchronize_state(cpu_state); do_cpu_sipi(cpu); } if (cpu_state->interrupt_request & CPU_INTERRUPT_TPR) { cpu_state->interrupt_request &=3D ~CPU_INTERRUPT_TPR; - hvf_cpu_synchronize_state(cpu_state); + cpu_synchronize_state(cpu_state); apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); } diff --git a/target/i386/hvf/x86hvf.h b/target/i386/hvf/x86hvf.h index 635ab0f34e..99ed8d608d 100644 --- a/target/i386/hvf/x86hvf.h +++ b/target/i386/hvf/x86hvf.h @@ -21,8 +21,6 @@ #include "x86_descr.h" =20 int hvf_process_events(CPUState *); -int hvf_put_registers(CPUState *); -int hvf_get_registers(CPUState *); bool hvf_inject_interrupts(CPUState *); void hvf_set_segment(struct CPUState *cpu, struct vmx_segment *vmx_seg, SegmentCache *qseg, bool is_tr); --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427807; cv=none; d=zohomail.com; s=zohoarc; b=gNFU1czMkk7wXAn94O2ZFVYZ4JnKkJmvJHEJYqEF54SbpLIryImE/XCTKAQ2B3XSU+wWXwTjFLTE+jBH0nHL77yRlZKQ4ARFB55GAXu0ecxghRM+HIhruOp+xMYU9zMGNjbewxDf5zSvoJFNmyUKkoJXyxJX7WqxWwuYzqWjyXY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427807; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dmxHnJbhGBQZpiidUCYRdIyLNVPFN0gCA8qJqG0CTs8=; b=WojYaRUpLIw2eLvOOLsv6zrDzigS8CqbfUIWL8USz1bQ4U8pI3r2dozRiJ99BWBImMMLfKkHf8VJSn+SeZK4SQOE3h9cTB7lWBIhButokGa+guABRVySOcis3faq6C/XRQgWsBQ/5deta4QV6PT2E2B5thA/74vnBncrU6k0MXk= ARC-Authentication-Results: i=1; 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Thu, 26 Nov 2020 22:50:19 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 3/8] arm: Set PSCI to 0.2 for HVF Date: Thu, 26 Nov 2020 22:50:12 +0100 Message-Id: <20201126215017.41156-4-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In Hypervisor.framework, we just pass PSCI calls straight on to the QEMU em= ulation of it. That means, if TCG is compatible with PSCI 0.2, so are we. Let's tra= nspose that fact in code too. Signed-off-by: Alexander Graf --- target/arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 07492e9f9a..db6f7c34ed 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1062,6 +1062,10 @@ static void arm_cpu_initfn(Object *obj) if (tcg_enabled()) { cpu->psci_version =3D 2; /* TCG implements PSCI 0.2 */ } + + if (hvf_enabled()) { + cpu->psci_version =3D 2; /* HVF uses TCG's PSCI */ + } } =20 static Property arm_cpu_gt_cntfrq_property =3D --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427633; cv=none; d=zohomail.com; s=zohoarc; b=hLqWcT4IHo/0N6jCDgVIbT3V+k9OSu3WstqxhhgOHirCfTYz9h8n1lYXqPQVUxJIBeHQygeuITYGR2WXLqvk6PkNiv+TauMGmdhlLESswqFIboS4MtvLjtXPNxM7ODu13XG0hW+LsFoNGfgnWR4fM9A9JKRc+y0KYros2wdVBDs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427633; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dEenUpuUsiVUMBuxPHb+OEqMU9QIV2Wqi32wem+JW1Y=; b=VbsQ9HoLTDPckiHhldOKwXerGUtD0thKrYRE67mGKRihGpot6M0yLlR3znyRJBrPhh0fQ9kA7ZGvUPENLOHpujBPmhyHTx+suxB5M4RB4B8CkENE2gWc9DwoFCfRlH+wj+hGl9RJS0UVzPveyBM9zQJwP158Xiz1Dd1up7zoY2g= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1606427633552529.1461844805077; Thu, 26 Nov 2020 13:53:53 -0800 (PST) Received: from localhost ([::1]:37144 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPD6-0005RT-4J for importer@patchew.org; Thu, 26 Nov 2020 16:53:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36280) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9l-0001jm-9l; Thu, 26 Nov 2020 16:50:25 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60556 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9i-0005kd-Mg; Thu, 26 Nov 2020 16:50:25 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id 0BFC13900590; Thu, 26 Nov 2020 22:50:20 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 4/8] arm: Synchronize CPU on PSCI on Date: Thu, 26 Nov 2020 22:50:13 +0100 Message-Id: <20201126215017.41156-5-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We are going to reuse the TCG PSCI code for HVF. This however means that we need to ensure that CPU register state is synchronized properly between the two worlds. So let's make sure that at least on the PSCI on call, the secondary core ge= ts to sync its registers after reset, so that changes also propagate. Signed-off-by: Alexander Graf --- target/arm/arm-powerctl.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c index b75f813b40..256f7cfdcd 100644 --- a/target/arm/arm-powerctl.c +++ b/target/arm/arm-powerctl.c @@ -15,6 +15,7 @@ #include "arm-powerctl.h" #include "qemu/log.h" #include "qemu/main-loop.h" +#include "sysemu/hw_accel.h" =20 #ifndef DEBUG_ARM_POWERCTL #define DEBUG_ARM_POWERCTL 0 @@ -66,6 +67,8 @@ static void arm_set_cpu_on_async_work(CPUState *target_cp= u_state, cpu_reset(target_cpu_state); target_cpu_state->halted =3D 0; =20 + cpu_synchronize_state(target_cpu_state); + if (info->target_aa64) { if ((info->target_el < 3) && arm_feature(&target_cpu->env, ARM_FEATURE_EL3)) { --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427716; cv=none; d=zohomail.com; s=zohoarc; b=X+7wMBKtYCEGyGAq/V4VQos0z39p1OOwvgmL9gmEQqaa5zZJ7lvWa6ugXP6YyG6+2xOg1TrYk4cTL5el+AaPx80wbj/jrhgVz7QiiuXdg+CsxIdixhZCFRBmtd8pPVxJNfaWDoD0farf+9W0TQqsjKJ44FmfUeCxbKzN/IXIaf0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427716; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=829fKfpyoGpfja4zIPMvivD0WcxzUU2fgLkLnqwmsc4=; b=UriL+d+fwl58+RIbMXb61skvq9qOP6qZkuRieCNT7mSisTPTZNNEQ/rV7YKR0NMsteRZPeXPn0jPO5wkoTpzAlrV1u0v9nIJ+GaHRVsGzDUjYora8KzKaqu/C0mAJyVvIf+L9n4UG5IHzn4IrrFImgmEc5+MVcKM07/Szegr/ts= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1606427716675632.1319144176969; Thu, 26 Nov 2020 13:55:16 -0800 (PST) Received: from localhost ([::1]:41458 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPER-0007DR-H5 for importer@patchew.org; Thu, 26 Nov 2020 16:55:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36322) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9q-0001oc-Lr; Thu, 26 Nov 2020 16:50:30 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60626 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9k-0005mq-LB; Thu, 26 Nov 2020 16:50:30 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id 78FFE39005A1; Thu, 26 Nov 2020 22:50:20 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 5/8] hvf: Add Apple Silicon support Date: Thu, 26 Nov 2020 22:50:14 +0100 Message-Id: <20201126215017.41156-6-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" With Apple Silicon available to the masses, it's a good time to add support for driving its virtualization extensions from QEMU. This patch adds all necessary architecture specific code to get basic VMs working. It's still pretty raw, but definitely functional. Known limitations: - Vtimer acknowledgement is hacky - Should implement more sysregs and fault on invalid ones then - WFI handling is missing, need to marry it with vtimer Signed-off-by: Alexander Graf --- MAINTAINERS | 5 + accel/hvf/hvf-cpus.c | 4 + include/hw/core/cpu.h | 3 +- target/arm/hvf/hvf.c | 345 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 356 insertions(+), 1 deletion(-) create mode 100644 target/arm/hvf/hvf.c diff --git a/MAINTAINERS b/MAINTAINERS index ca4b6d9279..9cd1d9d448 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -439,6 +439,11 @@ F: accel/accel.c F: accel/Makefile.objs F: accel/stubs/Makefile.objs =20 +Apple Silicon HVF CPUs +M: Alexander Graf +S: Maintained +F: target/arm/hvf/ + X86 HVF CPUs M: Cameron Esfahani M: Roman Bolshakov diff --git a/accel/hvf/hvf-cpus.c b/accel/hvf/hvf-cpus.c index f9bb5502b7..b9f674478d 100644 --- a/accel/hvf/hvf-cpus.c +++ b/accel/hvf/hvf-cpus.c @@ -60,6 +60,10 @@ =20 #include =20 +#ifdef __aarch64__ +#define HV_VM_DEFAULT NULL +#endif + /* Memory slots */ =20 struct mac_slot { diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 3d92c967ff..a711eb04e4 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -463,7 +463,8 @@ struct CPUState { =20 struct hax_vcpu_state *hax_vcpu; =20 - int hvf_fd; + uint64_t hvf_fd; + void *hvf_exit; =20 /* track IOMMUs whose translations we've cached in the TCG TLB */ GArray *iommu_notifiers; diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c new file mode 100644 index 0000000000..6b9a02e21c --- /dev/null +++ b/target/arm/hvf/hvf.c @@ -0,0 +1,345 @@ +/* + * QEMU Hypervisor.framework support for Apple Silicon + + * Copyright 2020 Alexander Graf + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "qemu/error-report.h" + +#include "sysemu/runstate.h" +#include "sysemu/hvf.h" +#include "sysemu/hvf_int.h" +#include "sysemu/hw_accel.h" + +#include + +#include "exec/address-spaces.h" +#include "hw/irq.h" +#include "qemu/main-loop.h" +#include "sysemu/accel.h" +#include "target/arm/cpu.h" +#include "target/arm/internals.h" + +#define HVF_DEBUG 0 +#define DPRINTF(...) \ + if (HVF_DEBUG) { \ + fprintf(stderr, "HVF %s:%d ", __func__, __LINE__); \ + fprintf(stderr, __VA_ARGS__); \ + fprintf(stderr, "\n"); \ + } + +#define SYSREG(op0, op1, op2, crn, crm) \ + ((op0 << 20) | (op2 << 17) | (op1 << 14) | (crn << 10) | (crm << 1)) +#define SYSREG_MASK SYSREG(0x3, 0x7, 0x7, 0xf, 0xf) +#define SYSREG_CNTPCT_EL0 SYSREG(3, 3, 1, 14, 0) +#define SYSREG_PMCCNTR_EL0 SYSREG(3, 3, 0, 9, 13) + +struct hvf_reg_match { + int reg; + uint64_t offset; +}; + +static const struct hvf_reg_match hvf_reg_match[] =3D { + { HV_REG_X0, offsetof(CPUARMState, xregs[0]) }, + { HV_REG_X1, offsetof(CPUARMState, xregs[1]) }, + { HV_REG_X2, offsetof(CPUARMState, xregs[2]) }, + { HV_REG_X3, offsetof(CPUARMState, xregs[3]) }, + { HV_REG_X4, offsetof(CPUARMState, xregs[4]) }, + { HV_REG_X5, offsetof(CPUARMState, xregs[5]) }, + { HV_REG_X6, offsetof(CPUARMState, xregs[6]) }, + { HV_REG_X7, offsetof(CPUARMState, xregs[7]) }, + { HV_REG_X8, offsetof(CPUARMState, xregs[8]) }, + { HV_REG_X9, offsetof(CPUARMState, xregs[9]) }, + { HV_REG_X10, offsetof(CPUARMState, xregs[10]) }, + { HV_REG_X11, offsetof(CPUARMState, xregs[11]) }, + { HV_REG_X12, offsetof(CPUARMState, xregs[12]) }, + { HV_REG_X13, offsetof(CPUARMState, xregs[13]) }, + { HV_REG_X14, offsetof(CPUARMState, xregs[14]) }, + { HV_REG_X15, offsetof(CPUARMState, xregs[15]) }, + { HV_REG_X16, offsetof(CPUARMState, xregs[16]) }, + { HV_REG_X17, offsetof(CPUARMState, xregs[17]) }, + { HV_REG_X18, offsetof(CPUARMState, xregs[18]) }, + { HV_REG_X19, offsetof(CPUARMState, xregs[19]) }, + { HV_REG_X20, offsetof(CPUARMState, xregs[20]) }, + { HV_REG_X21, offsetof(CPUARMState, xregs[21]) }, + { HV_REG_X22, offsetof(CPUARMState, xregs[22]) }, + { HV_REG_X23, offsetof(CPUARMState, xregs[23]) }, + { HV_REG_X24, offsetof(CPUARMState, xregs[24]) }, + { HV_REG_X25, offsetof(CPUARMState, xregs[25]) }, + { HV_REG_X26, offsetof(CPUARMState, xregs[26]) }, + { HV_REG_X27, offsetof(CPUARMState, xregs[27]) }, + { HV_REG_X28, offsetof(CPUARMState, xregs[28]) }, + { HV_REG_X29, offsetof(CPUARMState, xregs[29]) }, + { HV_REG_X30, offsetof(CPUARMState, xregs[30]) }, + { HV_REG_PC, offsetof(CPUARMState, pc) }, +}; + +int hvf_get_registers(CPUState *cpu) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + hv_return_t ret; + uint64_t val; + int i; + + for (i =3D 0; i < ARRAY_SIZE(hvf_reg_match); i++) { + ret =3D hv_vcpu_get_reg(cpu->hvf_fd, hvf_reg_match[i].reg, &val); + *(uint64_t *)((void *)env + hvf_reg_match[i].offset) =3D val; + assert_hvf_ok(ret); + } + + val =3D 0; + ret =3D hv_vcpu_get_reg(cpu->hvf_fd, HV_REG_FPCR, &val); + assert_hvf_ok(ret); + vfp_set_fpcr(env, val); + + val =3D 0; + ret =3D hv_vcpu_get_reg(cpu->hvf_fd, HV_REG_FPSR, &val); + assert_hvf_ok(ret); + vfp_set_fpsr(env, val); + + ret =3D hv_vcpu_get_reg(cpu->hvf_fd, HV_REG_CPSR, &val); + assert_hvf_ok(ret); + pstate_write(env, val); + + return 0; +} + +int hvf_put_registers(CPUState *cpu) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + hv_return_t ret; + uint64_t val; + int i; + + for (i =3D 0; i < ARRAY_SIZE(hvf_reg_match); i++) { + val =3D *(uint64_t *)((void *)env + hvf_reg_match[i].offset); + ret =3D hv_vcpu_set_reg(cpu->hvf_fd, hvf_reg_match[i].reg, val); + + assert_hvf_ok(ret); + } + + ret =3D hv_vcpu_set_reg(cpu->hvf_fd, HV_REG_FPCR, vfp_get_fpcr(env)); + assert_hvf_ok(ret); + + ret =3D hv_vcpu_set_reg(cpu->hvf_fd, HV_REG_FPSR, vfp_get_fpsr(env)); + assert_hvf_ok(ret); + + ret =3D hv_vcpu_set_reg(cpu->hvf_fd, HV_REG_CPSR, pstate_read(env)); + assert_hvf_ok(ret); + + ret =3D hv_vcpu_set_sys_reg(cpu->hvf_fd, HV_SYS_REG_MPIDR_EL1, + arm_cpu->mp_affinity); + assert_hvf_ok(ret); + + return 0; +} + +void hvf_arch_vcpu_destroy(CPUState *cpu) +{ +} + +int hvf_arch_init_vcpu(CPUState *cpu) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + + env->aarch64 =3D 1; + + return 0; +} + +static int hvf_process_events(CPUState *cpu) +{ + DPRINTF(""); + return 0; +} + +static int hvf_inject_interrupts(CPUState *cpu) +{ + if (cpu->interrupt_request & CPU_INTERRUPT_FIQ) { + DPRINTF("injecting FIQ"); + hv_vcpu_set_pending_interrupt(cpu->hvf_fd, HV_INTERRUPT_TYPE_FIQ, = true); + } + + if (cpu->interrupt_request & CPU_INTERRUPT_HARD) { + DPRINTF("injecting IRQ"); + hv_vcpu_set_pending_interrupt(cpu->hvf_fd, HV_INTERRUPT_TYPE_IRQ, = true); + } + + return 0; +} + +int hvf_vcpu_exec(CPUState *cpu) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + hv_vcpu_exit_t *hvf_exit =3D cpu->hvf_exit; + int ret =3D 0; + + if (hvf_process_events(cpu)) { + return EXCP_HLT; + } + + do { + process_queued_cpu_work(cpu); + + if (cpu->vcpu_dirty) { + hvf_put_registers(cpu); + cpu->vcpu_dirty =3D false; + } + + if (hvf_inject_interrupts(cpu)) { + return EXCP_INTERRUPT; + } + + qemu_mutex_unlock_iothread(); + if (cpu->cpu_index && cpu->halted) { + qemu_mutex_lock_iothread(); + return EXCP_HLT; + } + + assert_hvf_ok(hv_vcpu_run(cpu->hvf_fd)); + + /* handle VMEXIT */ + uint64_t exit_reason =3D hvf_exit->reason; + uint64_t syndrome =3D hvf_exit->exception.syndrome; + uint32_t ec =3D syn_get_ec(syndrome); + + cpu_synchronize_state(cpu); + + qemu_mutex_lock_iothread(); + + current_cpu =3D cpu; + + switch (exit_reason) { + case HV_EXIT_REASON_EXCEPTION: + /* This is the main one, handle below. */ + break; + case HV_EXIT_REASON_VTIMER_ACTIVATED: + qemu_set_irq(arm_cpu->gt_timer_outputs[GTIMER_VIRT], 1); + continue; + case HV_EXIT_REASON_CANCELED: + /* we got kicked, no exit to process */ + continue; + default: + assert(0); + } + + ret =3D 0; + switch (ec) { + case EC_DATAABORT: { + bool isv =3D syndrome & ARM_EL_ISV; + bool iswrite =3D (syndrome >> 6) & 1; + bool s1ptw =3D (syndrome >> 7) & 1; + uint32_t sas =3D (syndrome >> 22) & 3; + uint32_t len =3D 1 << sas; + uint32_t srt =3D (syndrome >> 16) & 0x1f; + uint64_t val =3D 0; + + DPRINTF("data abort: [pc=3D0x%llx va=3D0x%016llx pa=3D0x%016ll= x isv=3D%x " + "iswrite=3D%x s1ptw=3D%x len=3D%d srt=3D%d]\n", + env->pc, hvf_exit->exception.virtual_address, + hvf_exit->exception.physical_address, isv, iswrite, + s1ptw, len, srt); + + assert(isv); + + if (iswrite) { + val =3D env->xregs[srt]; + address_space_write(&address_space_memory, + hvf_exit->exception.physical_address, + MEMTXATTRS_UNSPECIFIED, &val, len); + + /* + * We do not have a callback to see if the timer is out of + * state. That means every MMIO write could potentially be + * an EOI ends the vtimer. Until we get an actual callback, + * let's just see if the timer is still pending on every + * possible toggle point. + */ + qemu_set_irq(arm_cpu->gt_timer_outputs[GTIMER_VIRT], 0); + hv_vcpu_set_vtimer_mask(cpu->hvf_fd, false); + } else { + address_space_read(&address_space_memory, + hvf_exit->exception.physical_address, + MEMTXATTRS_UNSPECIFIED, &val, len); + env->xregs[srt] =3D val; + } + + env->pc +=3D 4; + break; + } + case EC_SYSTEMREGISTERTRAP: { + bool isread =3D (syndrome >> 21) & 1; + uint32_t rt =3D (syndrome >> 5) & 0x1f; + uint32_t reg =3D syndrome & SYSREG_MASK; + uint64_t val =3D 0; + + if (isread) { + switch (reg) { + case SYSREG_CNTPCT_EL0: + val =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / + gt_cntfrq_period_ns(arm_cpu); + break; + case SYSREG_PMCCNTR_EL0: + val =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + break; + default: + DPRINTF("unhandled sysreg read %08x (op0=3D%d op1=3D%d= op2=3D%d " + "crn=3D%d crm=3D%d)", reg, (reg >> 20) & 0x3, + (reg >> 14) & 0x7, (reg >> 17) & 0x7, + (reg >> 10) & 0xf, (reg >> 1) & 0xf); + break; + } + + env->xregs[rt] =3D val; + } else { + val =3D env->xregs[rt]; + switch (reg) { + case SYSREG_CNTPCT_EL0: + break; + default: + DPRINTF("unhandled sysreg write %08x", reg); + break; + } + } + + env->pc +=3D 4; + break; + } + case EC_WFX_TRAP: + /* No halting yet */ + break; + case EC_AA64_HVC: + if (arm_is_psci_call(arm_cpu, EXCP_HVC)) { + arm_handle_psci_call(arm_cpu); + } else { + DPRINTF("unknown HVC! %016llx", env->xregs[0]); + env->xregs[0] =3D -1; + } + break; + case EC_AA64_SMC: + if (arm_is_psci_call(arm_cpu, EXCP_SMC)) { + arm_handle_psci_call(arm_cpu); + } else { + DPRINTF("unknown SMC! %016llx", env->xregs[0]); + env->xregs[0] =3D -1; + env->pc +=3D 4; + } + break; + default: + DPRINTF("exit: %llx [ec=3D0x%x pc=3D0x%llx]", syndrome, ec, en= v->pc); + error_report("%llx: unhandled exit %llx", env->pc, exit_reason= ); + } + } while (ret =3D=3D 0); + + return ret; +} --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427633; cv=none; d=zohomail.com; s=zohoarc; b=ONFcdF1efDNV4p7iZ27SrqSJqreX6SlOmcMqRoFGW+VPLD0Hm/XHdaqbL1qJb7TO6GplBdXrXe4zCflpLOwRMBhQ8Wdt91UlJ4LaUzylqSXe/xuQeiq+p1AxqZMFw4A5BwlIhqoazkOsppo3KFdiw2s4RKxiJdbt2civQp3kDbA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427633; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=4kYghup3wnS3IF42SVLwWHHRv5CvJ5rkwyiL/gwkIPk=; b=TEajneRkqTzuVL6CGzcYEGXTNysZvyUsb/2CX8qsYXEyvziPJgjf1qNYBembUuYi5ab8MdVLp0mLsHnAa0bDUZqnxiIoywuw46ggZ0ZiVVpxBVJ2UaIWDgCF1GdTT3yF34xxzeSDITzIDDBzGpmIUKMJbb1Nf2z0P9qT49awStk= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1606427633636192.1580708853927; Thu, 26 Nov 2020 13:53:53 -0800 (PST) Received: from localhost ([::1]:37196 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPD6-0005Sk-Go for importer@patchew.org; Thu, 26 Nov 2020 16:53:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36310) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9m-0001lk-HF; Thu, 26 Nov 2020 16:50:30 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60628 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9k-0005mr-Le; Thu, 26 Nov 2020 16:50:26 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id E832E39005A8; Thu, 26 Nov 2020 22:50:20 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 6/8] hvf: Use OS provided vcpu kick function Date: Thu, 26 Nov 2020 22:50:15 +0100 Message-Id: <20201126215017.41156-7-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When kicking another vCPU, we get an OS function that explicitly does that = for us on Apple Silicon. That works better than the current signaling logic, let's= make use of it there. Signed-off-by: Alexander Graf --- accel/hvf/hvf-cpus.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/accel/hvf/hvf-cpus.c b/accel/hvf/hvf-cpus.c index b9f674478d..74a272d2e8 100644 --- a/accel/hvf/hvf-cpus.c +++ b/accel/hvf/hvf-cpus.c @@ -418,8 +418,20 @@ static void hvf_start_vcpu_thread(CPUState *cpu) cpu, QEMU_THREAD_JOINABLE); } =20 +#ifdef __aarch64__ +static void hvf_kick_vcpu_thread(CPUState *cpu) +{ + if (!qemu_cpu_is_self(cpu)) { + hv_vcpus_exit(&cpu->hvf_fd, 1); + } +} +#endif + static const CpusAccel hvf_cpus =3D { .create_vcpu_thread =3D hvf_start_vcpu_thread, +#ifdef __aarch64__ + .kick_vcpu_thread =3D hvf_kick_vcpu_thread, +#endif =20 .synchronize_post_reset =3D hvf_cpu_synchronize_post_reset, .synchronize_post_init =3D hvf_cpu_synchronize_post_init, --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427909; cv=none; d=zohomail.com; s=zohoarc; b=T7VA9HT0TbyODSQf21NLUw9pQYL2imqR4oaYTFC+335fqhBimTE2kL10Xp1+i8By8Er2HoVGXhnN3Iqpmlc1+5eTWB5YOWKYm5y1Gcoy2EviEf0aN+3QUTBxwIbS9CaXOAsfTByduCGx7wmLNjXmvLg7YFW1DWMRCZiM86233n8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427909; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RYW4eH/ZsrKQzuthW1O+bv7Xe1lYlj3a8avPcP1Wggk=; b=YRdQpsQHPtMtSIvCErU9d5tdcb9h4E5vEbq7GKkGmrDFPso3mXEmnGVFdPSe7sETMc3ahjWbK9MDgHnQuSzWV60rZ0S3lAgv0e26Vffxp+z9bS2HtIVt7VH6cbf6OuXNW3jrkJ8bY32VhAqHCl984yX4gApCgSwQUlRPgx9co3w= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1606427909680465.048234242033; Thu, 26 Nov 2020 13:58:29 -0800 (PST) Received: from localhost ([::1]:53092 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPHY-0003iV-M8 for importer@patchew.org; Thu, 26 Nov 2020 16:58:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36336) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9s-0001sn-74; Thu, 26 Nov 2020 16:50:32 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60638 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9m-0005nf-8y; Thu, 26 Nov 2020 16:50:31 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id 60BF439005B9; Thu, 26 Nov 2020 22:50:21 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 7/8] arm: Add Hypervisor.framework build target Date: Thu, 26 Nov 2020 22:50:16 +0100 Message-Id: <20201126215017.41156-8-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Now that we have all logic in place that we need to handle Hypervisor.frame= work on Apple Silicon systems, let's add CONFIG_HVF for aarch64 as well so that = we can build it. Signed-off-by: Alexander Graf --- meson.build | 9 ++++++++- target/arm/hvf/meson.build | 3 +++ target/arm/meson.build | 2 ++ 3 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 target/arm/hvf/meson.build diff --git a/meson.build b/meson.build index 2a7ff5560c..21565f5787 100644 --- a/meson.build +++ b/meson.build @@ -74,16 +74,23 @@ else endif =20 accelerator_targets =3D { 'CONFIG_KVM': kvm_targets } + +if cpu in ['x86', 'x86_64'] + hvf_targets =3D ['i386-softmmu', 'x86_64-softmmu'] +elif cpu in ['aarch64'] + hvf_targets =3D ['aarch64-softmmu'] +endif + if cpu in ['x86', 'x86_64', 'arm', 'aarch64'] # i368 emulator provides xenpv machine type for multiple architectures accelerator_targets +=3D { 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu'], + 'CONFIG_HVF': hvf_targets, } endif if cpu in ['x86', 'x86_64'] accelerator_targets +=3D { 'CONFIG_HAX': ['i386-softmmu', 'x86_64-softmmu'], - 'CONFIG_HVF': ['x86_64-softmmu'], 'CONFIG_WHPX': ['i386-softmmu', 'x86_64-softmmu'], } endif diff --git a/target/arm/hvf/meson.build b/target/arm/hvf/meson.build new file mode 100644 index 0000000000..855e6cce5a --- /dev/null +++ b/target/arm/hvf/meson.build @@ -0,0 +1,3 @@ +arm_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files( + 'hvf.c', +)) diff --git a/target/arm/meson.build b/target/arm/meson.build index f5de2a77b8..95bebae216 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -56,5 +56,7 @@ arm_softmmu_ss.add(files( 'psci.c', )) =20 +subdir('hvf') + target_arch +=3D {'arm': arm_ss} target_softmmu_arch +=3D {'arm': arm_softmmu_ss} --=20 2.24.3 (Apple Git-128) From nobody Sat May 4 13:20:36 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1606427838; cv=none; d=zohomail.com; s=zohoarc; b=cXGenllLHOKL2LH9V/rnHwh7pnef+FbYbb2CczGYoTpm58RHvqDk71OxobscBMKF2cbIua1Qfnf4zr6ahdH71rOQkZJ0iP9goSh5ZBftUWBMOf+AaqXbe2es9o4eLuHGPzjGG9llHPjlbM4+PGU220IDXeMjKd2FOrWxchJMpLg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606427838; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=apYShrcG+MlxobSP2g/bKYRJK2gok/VAaFJ68uBLj0g=; b=UVD4cOkETIeY1UK8GO7HEw945dwO0ReAHpKMKfGmNZjzzbWHpFfIZZDdGi23s4XbOsKSdYzep1e2Gt0BlpKpvj5aNcxDFhCUlyyQDZp9suKTF4xutNaKV586FSOMAUnP/gLYqVp6FnBg1/fIksKObjvlAlkL76DKYVtw1XRV4vU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16064278381121022.2897218608255; Thu, 26 Nov 2020 13:57:18 -0800 (PST) Received: from localhost ([::1]:49698 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiPGP-0002I9-1Q for importer@patchew.org; Thu, 26 Nov 2020 16:57:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36334) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kiP9r-0001s0-TB; Thu, 26 Nov 2020 16:50:31 -0500 Received: from mail.csgraf.de ([188.138.100.120]:60636 helo=zulu616.server4you.de) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kiP9m-0005ng-B6; Thu, 26 Nov 2020 16:50:31 -0500 Received: from localhost.localdomain (dynamic-077-009-187-158.77.9.pool.telefonica.de [77.9.187.158]) by csgraf.de (Postfix) with ESMTPSA id CE7FE39005E9; Thu, 26 Nov 2020 22:50:21 +0100 (CET) From: Alexander Graf To: qemu-devel@nongnu.org Subject: [PATCH 8/8] hw/arm/virt: Disable highmem when on hypervisor.framework Date: Thu, 26 Nov 2020 22:50:17 +0100 Message-Id: <20201126215017.41156-9-agraf@csgraf.de> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20201126215017.41156-1-agraf@csgraf.de> References: <20201126215017.41156-1-agraf@csgraf.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=188.138.100.120; envelope-from=agraf@csgraf.de; helo=zulu616.server4you.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The Apple M1 only supports up to 36 bits of physical address space. That means we can not fit the 64bit MMIO BAR region into our address space. To fix this, let's not expose a 64bit MMIO BAR region when running on Apple Silicon. I have not been able to find a way to enumerate that easily, so let's just assume we always have that little PA space on hypervisor.framework systems. Signed-off-by: Alexander Graf --- hw/arm/virt.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 27dbeb549e..d74053ecd4 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -45,6 +45,7 @@ #include "hw/display/ramfb.h" #include "net/net.h" #include "sysemu/device_tree.h" +#include "sysemu/hvf.h" #include "sysemu/numa.h" #include "sysemu/runstate.h" #include "sysemu/sysemu.h" @@ -1746,6 +1747,14 @@ static void machvirt_init(MachineState *machine) unsigned int smp_cpus =3D machine->smp.cpus; unsigned int max_cpus =3D machine->smp.max_cpus; =20 + /* + * On Hypervisor.framework capable systems, we only have 36 bits of PA + * space, which is not enough to fit a 64bit BAR space + */ + if (hvf_enabled()) { + vms->highmem =3D false; + } + /* * In accelerated mode, the memory map is computed earlier in kvm_type= () * to create a VM with the right number of IPA bits. --=20 2.24.3 (Apple Git-128)