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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=63.227.221.253; envelope-from=keithp@keithp.com; helo=elaine.keithp.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Reply-to: Keith Packard From: Keith Packard via X-ZohoMail-DKIM: fail (found 2 invalid signatures) Content-Type: text/plain; charset="utf-8" env->boot_info is only set in some ARM startup paths, so we cannot rely on it to support the SYS_HEAPINFO semihosting function. When not available, fallback to finding a RAM memory region containing the current stack and use the base of that. Signed-off-by: Keith Packard --- hw/semihosting/common-semi.c | 42 +++++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/hw/semihosting/common-semi.c b/hw/semihosting/common-semi.c index 27bdfd0e83..ddfa448cc2 100644 --- a/hw/semihosting/common-semi.c +++ b/hw/semihosting/common-semi.c @@ -133,6 +133,35 @@ typedef struct GuestFD { =20 static GArray *guestfd_array; =20 +#ifndef CONFIG_USER_ONLY +#include "exec/address-spaces.h" +/* + * Find the base of a RAM region containing the specified address + */ +static inline hwaddr +common_semi_find_region_base(hwaddr addr) +{ + MemoryRegion *subregion; + + /* + * Find the chunk of R/W memory containing the address. This is + * used for the SYS_HEAPINFO semihosting call, which should + * probably be using information from the loaded application. + */ + QTAILQ_FOREACH(subregion, &get_system_memory()->subregions, + subregions_link) { + if (subregion->ram && !subregion->readonly) { + Int128 top128 =3D int128_add(int128_make64(subregion->addr), + subregion->size); + if (subregion->addr <=3D addr && int128_lt(addr, top128)) { + return subregion->addr; + } + } + } + return 0; +} +#endif + #ifdef TARGET_ARM static inline target_ulong common_semi_arg(CPUState *cs, int argno) @@ -171,7 +200,18 @@ common_semi_rambase(CPUState *cs) { CPUArchState *env =3D cs->env_ptr; const struct arm_boot_info *info =3D env->boot_info; - return info->loader_start; + target_ulong sp; + + if (info) { + return info->loader_start; + } + + if (is_a64(env)) { + sp =3D env->xregs[31]; + } else { + sp =3D env->regs[13]; + } + return common_semi_find_region_base(sp); } #endif =20 --=20 2.29.2