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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id y10sm1618407pjm.34.2020.11.18.00.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Nov 2020 00:32:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ktef2G1hloaFJ74luJAhsa7tWq/dsDp9+ZryFFHcnak=; b=GW1htmq1p9egfR0N1sPBOJbw8+mcSKpA5sqOur+EptcSN5hspDVYmb1P28Hf+Kv0Ck 9ag2o0kx4aS7e8xDgAdmQ2/9s/hzR+JXObX2wYl5ZQ2+iqoliktM48u60+B5y76zkyYR uZvJ0foyss8SuIVKuauQM4M0+x9NyYuImiqG2baN86NS2hOSxRh1tz0yrck15BY18PUb ecq9v6ACjAd7lzZmtDCsIzsl/GCdV7qfJBt0GNSpVUKJ3h1hdG3r1dBpITWq/WRPGI6I 7MeNWGwU4zmNzZTvGgTKI+o6tjd4F4YPSs9R9XW9io87O7f4XqG2ZljsIexANb/6soVL O+dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ktef2G1hloaFJ74luJAhsa7tWq/dsDp9+ZryFFHcnak=; b=GmsyDVhbrbq1ZH/+YRdcrHJdnRAaBRbN12nZe91a68Sj53JDKfBxuOKFAw8IXwmf/H iFLfe4IukiCp5f+qnFHxbCqBMD8TuEqo+uBKppJa8mDDkhBni+1r+9Rc8OvLWKm6EQMa pt9HopUm9pnhUQZdxKnyQ04b2aVjWvDiO5pfubOhVdQ4BIaivarxTMBC4N021H+4uDV3 o/yGwyiKlYKxJistCdDWvWKtI80WzVAizILji84pt1aifKWEYzWwR9XXZvh2I0O9Xutf 6keqDlzumPkPTacuwycU+tEC/3n59omxJHGWzx8sM09yUO0wtkCkvW+wGKbiYetTw6G1 RGgQ== X-Gm-Message-State: AOAM5306Ll54CqW6z2s6kg8DEi+jpG5LN5ITA4qG0SKxVcu6F5O6Fjmh cUzymPd/v/THsUbGdfSaABbluSeVdDGuGaoI20o= X-Google-Smtp-Source: ABdhPJwg76ysYD+muShHBUd3zyT1U2iYP1vIQHf0TptU631GvjX8LELLY++AlRQGJsSnxR1JDzBCfw== X-Received: by 2002:aa7:9888:0:b029:18b:a9e2:dc7a with SMTP id r8-20020aa798880000b029018ba9e2dc7amr3612288pfl.67.1605688332281; Wed, 18 Nov 2020 00:32:12 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC 01/15] target/riscv: reformat @sh format encoding for B-extension Date: Wed, 18 Nov 2020 16:29:39 +0800 Message-Id: <20201118083044.13992-2-frank.chang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118083044.13992-1-frank.chang@sifive.com> References: <20201118083044.13992-1-frank.chang@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=frank.chang@sifive.com; helo=mail-pf1-x436.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Kito Cheng , Palmer Dabbelt , Sagar Karandikar , Bastian Koppelmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32.decode | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 84080dd18ca..190ce469faf 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -22,7 +22,7 @@ %rs1 15:5 %rd 7:5 =20 -%sh10 20:10 +%sh6 20:6 %csr 20:12 %rm 12:3 %nf 29:3 !function=3Dex_plus_1 @@ -58,7 +58,7 @@ @u .................... ..... ....... &u imm=3D%imm_u = %rd @j .................... ..... ....... &j imm=3D%imm_j = %rd =20 -@sh ...... ...... ..... ... ..... ....... &shift shamt=3D%sh10 = %rs1 %rd +@sh ...... ...... ..... ... ..... ....... &shift shamt=3D%sh6 = %rs1 %rd @csr ............ ..... ... ..... ....... %csr %r= s1 %rd =20 @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=3D0 = %rs1 %rd @@ -122,9 +122,9 @@ sltiu ............ ..... 011 ..... 0010011 @i xori ............ ..... 100 ..... 0010011 @i ori ............ ..... 110 ..... 0010011 @i andi ............ ..... 111 ..... 0010011 @i -slli 00.... ...... ..... 001 ..... 0010011 @sh -srli 00.... ...... ..... 101 ..... 0010011 @sh -srai 01.... ...... ..... 101 ..... 0010011 @sh +slli 000000 ...... ..... 001 ..... 0010011 @sh +srli 000000 ...... ..... 101 ..... 0010011 @sh +srai 010000 ...... ..... 101 ..... 0010011 @sh add 0000000 ..... ..... 000 ..... 0110011 @r sub 0100000 ..... ..... 000 ..... 0110011 @r sll 0000000 ..... ..... 001 ..... 0110011 @r --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688606; cv=none; d=zohomail.com; s=zohoarc; b=OfsrPrWepYsXeJhQzQdV/zk3Fr9ARHGeGFq13/Y3jQ1hgIMsM0dhW7ROpEMMtwLfrjwuR6H+L0352kXnE+K8GsPYNuAYnhv4EL9Ou7NYCqwsKBCieipZc9x/bASUCmz3QzDq3B4qiTkWL6Ricp8DEfm3HFqw5FIYaR0GN0wDVbw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688606; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=LETS+EEDVlyVtBMQelQTmdG5qIoA/WSP5Cw4naQKQBE=; b=IaC+8wVd7muwvaQZN27ygO0YMJiZV4OA1NxAoXFEhd2VgHFabWTZmMTL9GunTsWG5jC5duA401umn2/5OK0D54ezd815z5gjwL4/KGNQR803rSJrY5iLtuPB7tdGsG1wYSCBvnIsdPrJ0B0P5A5Yxazip+PWoT/2ui4mpH1qZQ4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1605688606191106.23281188451324; Wed, 18 Nov 2020 00:36:46 -0800 (PST) Received: from localhost ([::1]:49022 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kfIxJ-0007Y0-3n for importer@patchew.org; Wed, 18 Nov 2020 03:36:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50372) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kfIt3-0000jE-P7 for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:23 -0500 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]:37137) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kfIt1-0004lu-3p for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:21 -0500 Received: by mail-pf1-x431.google.com with SMTP id c66so960507pfa.4 for ; Wed, 18 Nov 2020 00:32:18 -0800 (PST) Received: from frankchang-ThinkPad-T490.internal.sifive.com (114-34-229-221.HINET-IP.hinet.net. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng Signed-off-by: Frank Chang --- target/riscv/insn32-64.decode | 4 +++ target/riscv/insn32.decode | 7 +++- target/riscv/insn_trans/trans_rvb.c.inc | 47 ++++++++++++++++++++++++ target/riscv/translate.c | 48 +++++++++++++++++++++++++ 4 files changed, 105 insertions(+), 1 deletion(-) create mode 100644 target/riscv/insn_trans/trans_rvb.c.inc diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 8157dee8b7c..250279e62ea 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -86,3 +86,7 @@ fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s + +# *** RV64B Standard Extension (in addition to RV32B) *** +clzw 011000000000 ..... 001 ..... 0011011 @r2 +ctzw 011000000001 ..... 001 ..... 0011011 @r2 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 190ce469faf..884ed2a42fa 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -40,6 +40,7 @@ &i imm rs1 rd &j imm rd &r rd rs1 rs2 +&r2 rd rs1 &s imm rs1 rs2 &u imm rd &shift shamt rs1 rd @@ -67,7 +68,7 @@ @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd @r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd -@r2 ....... ..... ..... ... ..... ....... %rs1 %rd +@r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd @r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd @r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd @r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd @@ -592,3 +593,7 @@ vcompress_vm 010111 - ..... ..... 010 ..... 1010111 = @r =20 vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm vsetvl 1000000 ..... ..... 111 ..... 1010111 @r + +# *** RV32B Standard Extension *** +clz 011000000000 ..... 001 ..... 0010011 @r2 +ctz 011000000001 ..... 001 ..... 0010011 @r2 diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc new file mode 100644 index 00000000000..1f02cb91a0a --- /dev/null +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -0,0 +1,47 @@ +/* + * RISC-V translation routines for the RVB Standard Extension. + * + * Copyright (c) 2020 Kito Cheng, kito.cheng@sifive.com + * Copyright (c) 2020 Frank Chang, frank.chang@sifive.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +static bool trans_clz(DisasContext *ctx, arg_clz *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_cxz(ctx, a, &tcg_gen_clzi_tl); +} + +static bool trans_ctz(DisasContext *ctx, arg_ctz *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_cxz(ctx, a, &tcg_gen_ctzi_tl); +} + +/* RV64-only instructions */ +#ifdef TARGET_RISCV64 + +static bool trans_clzw(DisasContext *ctx, arg_clzw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_cxzw(ctx, a, &tcg_gen_clzi_i32); +} + +static bool trans_ctzw(DisasContext *ctx, arg_ctzw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_cxzw(ctx, a, &tcg_gen_ctzi_i32); +} + +#endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 79dca2291bc..20b47f7a660 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -710,6 +710,34 @@ static bool gen_arith_div_uw(DisasContext *ctx, arg_r = *a, =20 #endif =20 +#ifdef TARGET_RISCV64 + +static bool gen_cxzw(DisasContext *ctx, arg_r2 *a, + void(*func)(TCGv_i32, TCGv_i32, uint32_t)) +{ + TCGv source; + TCGv_i32 tmp; + + tmp =3D tcg_temp_new_i32(); + source =3D tcg_temp_new(); + + gen_get_gpr(source, a->rs1); + /* truncate to 32-bits */ + tcg_gen_trunc_tl_i32(tmp, source); + + (*func)(tmp, tmp, 32); + + /* sign-extend 64-bits */ + tcg_gen_ext_i32_tl(source, tmp); + gen_set_gpr(a->rd, source); + + tcg_temp_free(source); + tcg_temp_free_i32(tmp); + return true; +} + +#endif + static bool gen_arith(DisasContext *ctx, arg_r *a, void(*func)(TCGv, TCGv, TCGv)) { @@ -746,6 +774,25 @@ static bool gen_shift(DisasContext *ctx, arg_r *a, return true; } =20 +static bool gen_cxz(DisasContext *ctx, arg_r2 *a, + void(*func)(TCGv, TCGv, target_ulong)) +{ + TCGv source; + source =3D tcg_temp_new(); + + gen_get_gpr(source, a->rs1); + +#ifdef TARGET_RISCV64 + (*func)(source, source, 64); +#else + (*func)(source, source, 32); +#endif + + gen_set_gpr(a->rd, source); + tcg_temp_free(source); + return true; +} + /* Include insn module translation function */ #include "insn_trans/trans_rvi.c.inc" #include "insn_trans/trans_rvm.c.inc" @@ -754,6 +801,7 @@ static bool gen_shift(DisasContext *ctx, arg_r *a, #include "insn_trans/trans_rvd.c.inc" #include "insn_trans/trans_rvh.c.inc" #include "insn_trans/trans_rvv.c.inc" +#include "insn_trans/trans_rvb.c.inc" #include "insn_trans/trans_privileged.c.inc" =20 /* Include the auto-generated decoder for 16 bit insn */ --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688568; cv=none; d=zohomail.com; s=zohoarc; b=W2B9eHdSUefGPskPziRE8pCgCm+aJbw1OlnGe6TFve9QdEuK5z17cJssAzYBG5ckskKeLlBIHdaZDpZ22E4c544bYzw5N8FQ9GFFdS88zjo77a6Qt4ZeABa8yMf33ieCXdDeVbBOS8qApUuNW8F30Iss2pETBzqcmER2m86n1Z4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688568; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=SyUPWoPookn1xs0zcbONOqD2RtSxLPKpiKQrXTOCNis=; b=fFZnaPxb+AzkeNZxWEMo6c+hRCbp0P1DJR6BkC9OpmbipvkwBB1X3Fw4iDgYuerESKPA6qewgNSKUJjvWvBziGQInCb5b0PGACF2t1Mpn1lwvxMCtDXosNB09ErPdNILtqjMwU8VouxqQUy1k8E/v8SjzwQqZIua9NH4VWB88+w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1605688568956847.6452449183275; Wed, 18 Nov 2020 00:36:08 -0800 (PST) Received: from localhost ([::1]:45968 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kfIwh-0006Ir-Qk for importer@patchew.org; Wed, 18 Nov 2020 03:36:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50410) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kfIt8-0000oO-Vi for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:27 -0500 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]:40521) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kfIt6-0004mV-7Q for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:26 -0500 Received: by mail-pj1-x1033.google.com with SMTP id t12so705017pjq.5 for ; Wed, 18 Nov 2020 00:32:23 -0800 (PST) Received: from frankchang-ThinkPad-T490.internal.sifive.com (114-34-229-221.HINET-IP.hinet.net. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng Reviewed-by: Richard Henderson --- target/riscv/insn32-64.decode | 1 + target/riscv/insn32.decode | 1 + target/riscv/insn_trans/trans_rvb.c.inc | 12 ++++++++++++ target/riscv/translate.c | 21 +++++++++++++++++++++ 4 files changed, 35 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 250279e62ea..d5bea5af273 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -90,3 +90,4 @@ hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s # *** RV64B Standard Extension (in addition to RV32B) *** clzw 011000000000 ..... 001 ..... 0011011 @r2 ctzw 011000000001 ..... 001 ..... 0011011 @r2 +pcntw 011000000010 ..... 001 ..... 0011011 @r2 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 884ed2a42fa..9e70a85d6f0 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -597,3 +597,4 @@ vsetvl 1000000 ..... ..... 111 ..... 1010111 = @r # *** RV32B Standard Extension *** clz 011000000000 ..... 001 ..... 0010011 @r2 ctz 011000000001 ..... 001 ..... 0010011 @r2 +pcnt 011000000010 ..... 001 ..... 0010011 @r2 diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index 1f02cb91a0a..6f1054e3908 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -29,6 +29,12 @@ static bool trans_ctz(DisasContext *ctx, arg_ctz *a) return gen_cxz(ctx, a, &tcg_gen_ctzi_tl); } =20 +static bool trans_pcnt(DisasContext *ctx, arg_pcnt *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_unary(ctx, a, &tcg_gen_ctpop_tl); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 @@ -44,4 +50,10 @@ static bool trans_ctzw(DisasContext *ctx, arg_ctzw *a) return gen_cxzw(ctx, a, &tcg_gen_ctzi_i32); } =20 +static bool trans_pcntw(DisasContext *ctx, arg_pcntw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_unary(ctx, a, &gen_pcntw); +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 20b47f7a660..97e5899750e 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -736,6 +736,12 @@ static bool gen_cxzw(DisasContext *ctx, arg_r2 *a, return true; } =20 +static void gen_pcntw(TCGv ret, TCGv arg1) +{ + tcg_gen_ext32u_tl(arg1, arg1); + tcg_gen_ctpop_tl(ret, arg1); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, @@ -793,6 +799,21 @@ static bool gen_cxz(DisasContext *ctx, arg_r2 *a, return true; } =20 +static bool gen_unary(DisasContext *ctx, arg_r2 *a, + void(*func)(TCGv, TCGv)) +{ + TCGv source; + source =3D tcg_temp_new(); + + gen_get_gpr(source, a->rs1); + + (*func)(source, source); + + gen_set_gpr(a->rd, source); + tcg_temp_free(source); + return true; +} + /* Include insn module translation function */ #include "insn_trans/trans_rvi.c.inc" #include "insn_trans/trans_rvm.c.inc" --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688587; cv=none; d=zohomail.com; s=zohoarc; b=oLUPh9eZI9kiDKRdSvVD+wqN4diavowrO4lxRFtDvNnHCygfg/3XUUHX5P3KKHdby3R6bqh4RRUbA+d3TbptIbbAGuV9F5XTyHlhJvJXbZ6v9BrDjMcEFtJ1RONYDLfLFDCKRCAXYweQJH+LR4lSAPBB98TNQzB001r41G7l6rA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688587; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; 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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id y10sm1618407pjm.34.2020.11.18.00.32.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Nov 2020 00:32:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KmqWH1PGMfksoIEDQlG0wfODklz3c3A9y1+TZN4fHAI=; b=KYNQUjWyOflsAwvF9ixV8gL7ebvkNpTBG4YopCAGas3H/hkQUDkc+9wutt3vTXc6zU jW1GP3yPoURKs3P1jJpk6WV7xAVqkJL8Fakit/elU8zN/Z2Lk2VgZNIXELhbAvxqNLBr KmyqTUFiR01KrCBe3boLmuLgfm4ASz4TijLlsbEzcmiVvSy/HxTok8m3Yua/K7dmMWFl PtbIYlCh13225Z01tpAF6rwtDvFKnq+vYJhgHF4Ly84dPhe8UtVs3z8wmj8hRNTbyJ8b VSdP7ozcombnKUKcETaZW8NyhqGQLFsdJVQ0cNWijsR/1VX+FdX1mEADeqO2KKa9YAQa uYDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KmqWH1PGMfksoIEDQlG0wfODklz3c3A9y1+TZN4fHAI=; b=sAZ9S4NH+78hAGh6oJiU8vxlaNDkkrCn1KpwNOYgGZKmndRIxqH38JRqH3kAoMSIEY 91Y4Rx8s0ANPPZuqQRRX7cjkmjN0gC5HQUpxFQSIisyQnUTfrJeBLpifxRz9KjN94F4X YnafjPwlNFJiBijYbqqlfNIug6gTGXrY79tCuFkWFMizr7KnOyHbDzUKtAdZnFtPZKkb 0DGU8Ma9NazA3ZEcpl/wbgSDs5aQCQYePBTjM51viYjlhFE4vPw7M/NaCYWicypfUn7f PfmsYA/wFlr3bkSC4gEj1DiLSi8Uq1ocpVd0zsksIlIU9FsRMUHSmrVjgwRde6VMUaHK GzNg== X-Gm-Message-State: AOAM53282/CpaoVSvyOPu0PQiNmrVZEXrTRsczVR/6tbDaXzTWwrur66 iCtaln4s/jETOUi5LtSfJ83vvqRTEo4otMG0Ix8= X-Google-Smtp-Source: ABdhPJx68QV8U8tLT8FphUtBW55m1uVzcqYCAiPEyG30CFtM/uvQTI0eLklN1cVYVZZeLy0OrTQv/Q== X-Received: by 2002:a63:1f50:: with SMTP id q16mr6961356pgm.214.1605688346677; Wed, 18 Nov 2020 00:32:26 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC 04/15] target/riscv: rvb: logic-with-negate Date: Wed, 18 Nov 2020 16:29:42 +0800 Message-Id: <20201118083044.13992-5-frank.chang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118083044.13992-1-frank.chang@sifive.com> References: <20201118083044.13992-1-frank.chang@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=frank.chang@sifive.com; helo=mail-pg1-x52f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32.decode | 4 +++ target/riscv/insn_trans/trans_rvb.c.inc | 18 ++++++++++++++ target/riscv/translate.c | 33 +++++++++++++++++++++++++ 3 files changed, 55 insertions(+) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 9e70a85d6f0..29a3d4c6ebc 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -598,3 +598,7 @@ vsetvl 1000000 ..... ..... 111 ..... 1010111 = @r clz 011000000000 ..... 001 ..... 0010011 @r2 ctz 011000000001 ..... 001 ..... 0010011 @r2 pcnt 011000000010 ..... 001 ..... 0010011 @r2 + +andn 0100000 .......... 111 ..... 0110011 @r +orn 0100000 .......... 110 ..... 0110011 @r +xnor 0100000 .......... 100 ..... 0110011 @r diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index 6f1054e3908..be25431e990 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -35,6 +35,24 @@ static bool trans_pcnt(DisasContext *ctx, arg_pcnt *a) return gen_unary(ctx, a, &tcg_gen_ctpop_tl); } =20 +static bool trans_andn(DisasContext *ctx, arg_andn *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_andn); +} + +static bool trans_orn(DisasContext *ctx, arg_orn *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_orn); +} + +static bool trans_xnor(DisasContext *ctx, arg_xnor *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_xnor); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 97e5899750e..254a9dca8c2 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -710,6 +710,39 @@ static bool gen_arith_div_uw(DisasContext *ctx, arg_r = *a, =20 #endif =20 +static void gen_andn(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv t; + t =3D tcg_temp_new(); + + tcg_gen_not_tl(t, arg2); + tcg_gen_and_tl(ret, arg1, t); + + tcg_temp_free(t); +} + +static void gen_orn(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv t; + t =3D tcg_temp_new(); + + tcg_gen_not_tl(t, arg2); + tcg_gen_or_tl(ret, arg1, t); + + tcg_temp_free(t); +} + +static void gen_xnor(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv t; + t =3D tcg_temp_new(); + + tcg_gen_not_tl(t, arg2); + tcg_gen_xor_tl(ret, arg1, t); + + tcg_temp_free(t); +} + #ifdef TARGET_RISCV64 =20 static bool gen_cxzw(DisasContext *ctx, arg_r2 *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688496; cv=none; d=zohomail.com; s=zohoarc; b=DV7Vg/r0qsE19alRkzPUayn1kJnOxQT31aSJSAiHKt1uFaRTftk3RKPvu5/3fjqFL2+Ts+DTNZ9kK+NCfAQuyzAs0agckqjxAStU3kxksw2OKldgMub47bkVQiHqcv57KBJqJweAfpNB4kvFetYq0+lWOI8jcupLCF5PhWHp8CU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688496; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32-64.decode | 3 + target/riscv/insn32.decode | 3 + target/riscv/insn_trans/trans_rvb.c.inc | 30 ++++++++ target/riscv/translate.c | 92 +++++++++++++++++++++++++ 4 files changed, 128 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index d5bea5af273..2f00f96e36b 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -91,3 +91,6 @@ hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s clzw 011000000000 ..... 001 ..... 0011011 @r2 ctzw 011000000001 ..... 001 ..... 0011011 @r2 pcntw 011000000010 ..... 001 ..... 0011011 @r2 + +packw 0000100 .......... 100 ..... 0111011 @r +packuw 0100100 .......... 100 ..... 0111011 @r diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 29a3d4c6ebc..79aa40f03dd 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -602,3 +602,6 @@ pcnt 011000000010 ..... 001 ..... 0010011 @r2 andn 0100000 .......... 111 ..... 0110011 @r orn 0100000 .......... 110 ..... 0110011 @r xnor 0100000 .......... 100 ..... 0110011 @r +pack 0000100 .......... 100 ..... 0110011 @r +packu 0100100 .......... 100 ..... 0110011 @r +packh 0000100 .......... 111 ..... 0110011 @r diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index be25431e990..9257373ae0b 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -53,6 +53,24 @@ static bool trans_xnor(DisasContext *ctx, arg_xnor *a) return gen_arith(ctx, a, &gen_xnor); } =20 +static bool trans_pack(DisasContext *ctx, arg_pack *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_pack); +} + +static bool trans_packu(DisasContext *ctx, arg_packu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_packu); +} + +static bool trans_packh(DisasContext *ctx, arg_packh *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_packh); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 @@ -74,4 +92,16 @@ static bool trans_pcntw(DisasContext *ctx, arg_pcntw *a) return gen_unary(ctx, a, &gen_pcntw); } =20 +static bool trans_packw(DisasContext *ctx, arg_packw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_packw); +} + +static bool trans_packuw(DisasContext *ctx, arg_packuw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_packuw); +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 254a9dca8c2..fb30ee83aa8 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -743,6 +743,65 @@ static void gen_xnor(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(t); } =20 +static void gen_pack(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv lower, higher; + lower =3D tcg_temp_new(); + higher =3D tcg_temp_new(); + +#ifdef TARGET_RISCV64 + tcg_gen_ext32u_tl(lower, arg1); + tcg_gen_shli_tl(higher, arg2, 32); +#else + tcg_gen_ext16u_tl(lower, arg1); + tcg_gen_shli_tl(higher, arg2, 16); +#endif + + tcg_gen_or_tl(ret, higher, lower); + + tcg_temp_free(lower); + tcg_temp_free(higher); +} + +static void gen_packu(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv lower, higher; + lower =3D tcg_temp_new(); + higher =3D tcg_temp_new(); + +#ifdef TARGET_RISCV64 + tcg_gen_shri_tl(lower, arg1, 32); + tcg_gen_shri_tl(higher, arg2, 32); + tcg_gen_shli_tl(higher, higher, 32); +#else + tcg_gen_shri_tl(lower, arg1, 16); + tcg_gen_shri_tl(higher, arg2, 16); + tcg_gen_shli_tl(higher, higher, 16); +#endif + + tcg_gen_or_tl(ret, higher, lower); + + tcg_temp_free(lower); + tcg_temp_free(higher); +} + +static void gen_packh(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv lower, higher; + lower =3D tcg_temp_new(); + higher =3D tcg_temp_new(); + + tcg_gen_ext8u_tl(lower, arg1); + tcg_gen_ext8u_tl(higher, arg2); + tcg_gen_shli_tl(higher, higher, 8); + + tcg_gen_or_tl(ret, higher, lower); + + tcg_temp_free(lower); + tcg_temp_free(higher); +} + + #ifdef TARGET_RISCV64 =20 static bool gen_cxzw(DisasContext *ctx, arg_r2 *a, @@ -775,6 +834,39 @@ static void gen_pcntw(TCGv ret, TCGv arg1) tcg_gen_ctpop_tl(ret, arg1); } =20 +static void gen_packw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv lower, higher; + lower =3D tcg_temp_new(); + higher =3D tcg_temp_new(); + + tcg_gen_ext16u_tl(lower, arg1); + tcg_gen_shli_tl(higher, arg2, 16); + tcg_gen_or_tl(ret, higher, lower); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(lower); + tcg_temp_free(higher); +} + +static void gen_packuw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv lower, higher; + lower =3D tcg_temp_new(); + higher =3D tcg_temp_new(); + + tcg_gen_shri_tl(lower, arg1, 16); + tcg_gen_shri_tl(higher, arg2, 16); + tcg_gen_shli_tl(higher, higher, 16); + tcg_gen_or_tl(ret, higher, lower); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(lower); + tcg_temp_free(higher); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688679; cv=none; d=zohomail.com; s=zohoarc; b=EVjLCWpHm7zOe8yXMeOPF2dh8nCF6HpgZfk8nFQMCfuIKaDEK4URitvJKcYb/vIeRUnvyf2G1ErnevvwVvkAfTecMuKTH6Ums8voHTo+8A1ENPUIuhpQVJm/hitn/FqgK+TzlBJG/r5PfA1l/c/R1kM6IqxVx9nQvpl9meZaLpY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688679; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=meE5DTx33Gz6EtRKa1WM1rUgLFRdm9EljrOhQNJYeTk=; b=clHX6BCIo7ZxMcnM5MX3DlBvDZGz7im/RYthteC4JfK/kFcSerVg8bwrcvzlaashex3p0z/uRY4gYS4TnIAi75bBMJh/Xz6RTkeHg7uOcmpKKOZcpLpfM9WErkn84cQJDK5RyyzaMHV7xNQyxpsnue2Bbh22EuxTHxcL8HbihVQ= ARC-Authentication-Results: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng Reviewed-by: Richard Henderson --- target/riscv/insn32.decode | 4 ++++ target/riscv/insn_trans/trans_rvb.c.inc | 24 ++++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 79aa40f03dd..372476f1d2c 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -605,3 +605,7 @@ xnor 0100000 .......... 100 ..... 0110011 @r pack 0000100 .......... 100 ..... 0110011 @r packu 0100100 .......... 100 ..... 0110011 @r packh 0000100 .......... 111 ..... 0110011 @r +min 0000101 .......... 100 ..... 0110011 @r +minu 0000101 .......... 101 ..... 0110011 @r +max 0000101 .......... 110 ..... 0110011 @r +maxu 0000101 .......... 111 ..... 0110011 @r diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index 9257373ae0b..b9a0e39a3e5 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -71,6 +71,30 @@ static bool trans_packh(DisasContext *ctx, arg_packh *a) return gen_arith(ctx, a, &gen_packh); } =20 +static bool trans_min(DisasContext *ctx, arg_min *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &tcg_gen_smin_tl); +} + +static bool trans_max(DisasContext *ctx, arg_max *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &tcg_gen_smax_tl); +} + +static bool trans_minu(DisasContext *ctx, arg_minu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &tcg_gen_umin_tl); +} + +static bool trans_maxu(DisasContext *ctx, arg_maxu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &tcg_gen_umax_tl); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688800; cv=none; d=zohomail.com; s=zohoarc; b=Xs6ua36gPJHBJ1ntocr7LwBLUVcfNaG/a41+TrUAKA0CB49yoyhcovCtcbwkmDu2xr5xUwnETTf23jbXzbyWXhqS/cEoXPK6GlvAGs6gV9S5luvsb7TOQxuevN54H2N5A1nt9I7dxkU+lerj1SnA++3IkPsSYIjEKUOGUSkgs7Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688800; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=b19CZAEI8TLcaimkbnhMiT5NLY0b6d5KIKU1WBHcNlk=; b=eKb+L8VL0aQxauOv/sWSCbePg3dYFiqhMendesw1j/kIv8mpIMKSpe7XS8DqASl6VaqIHdS66X9VwM4JVTs8QPYyPCe0GziSfxPNmonnIFz+H4I7HF/LwCf0TwlpiJGpVVMBAJw1KiBkMIuQD5Yl/aXa44PMnVSkPkwa7NCtPbM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1605688800290479.8358111806315; Wed, 18 Nov 2020 00:40:00 -0800 (PST) Received: from localhost ([::1]:34502 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kfJ0R-0004ja-5n for importer@patchew.org; Wed, 18 Nov 2020 03:39:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50598) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kfItR-0001bA-71 for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:45 -0500 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]:35010) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kfItO-0004of-6l for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:44 -0500 Received: by mail-pf1-x432.google.com with SMTP id g7so969226pfc.2 for ; Wed, 18 Nov 2020 00:32:41 -0800 (PST) Received: from frankchang-ThinkPad-T490.internal.sifive.com (114-34-229-221.HINET-IP.hinet.net. [114.34.229.221]) by smtp.gmail.com with ESMTPSA id y10sm1618407pjm.34.2020.11.18.00.32.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Nov 2020 00:32:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b19CZAEI8TLcaimkbnhMiT5NLY0b6d5KIKU1WBHcNlk=; b=V+8Iyr0Z7WjMjX6RH+2jq7e0JlOvaBJxZ72xG1eUQoJV794ukfTqiqE5XulkIsR3Tf v3R7TRSDPWFx8gUKoVV0WBHLtXKT6tmh/tw1GEGBMbPTkYY8/6L+XwUywSsSyskKqSWI 3ngJtpgk0JAQNJG06FQWKKiphEX1y0YjHGUwn10uihE4bJRawtl2EK4dDIBuZFbCX99h NrXsMXXlKGofFpVgYRFvSk5lO/3776yRycqG4Le8hQUfiuHXagLetJpXD9pZ76sR2N07 ZZawXwYGUBwe7KvmwIBvWIv6eLNKqdRSoFj7zERPUt1xnkPWFhf9ay93vP/3/KrWn+cE p0Mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b19CZAEI8TLcaimkbnhMiT5NLY0b6d5KIKU1WBHcNlk=; b=opqC4ocOKhxSZuFgMhPTZycaz1Kk//cz7lCbFDabnW+oQQr1TBeilyJjY48MiJyCgb 2QGs3ohjv+OD7Y7dg8tggaSRuBhnM+C79SIyd0xO0XduRD6S835V93koqx9xi1n4xa+V sNtRO2qNpHbs5+g3Z/ASTHKKkv1+lJkpceaFZoNCRtfalhBvvupSatxGLxGTCdZjLmAR PeMT8WBgf7+EaurxSjcvioNaUmVIwJIL9mGzu2wvS3J5YoooTX0qyjRyhaxrWRRErdZv AhM7g7T9LnRJWUk7sKtZwzh3F6nBqFQ8Bc+3XSCzaTY/R8Et5o7D3fWov8hVmuVeGSGq hPHg== X-Gm-Message-State: AOAM533KvK7v+st1iO2/jD0HcqhHdxQQu++J2YEI4r/pS9gcOuu6+VPo cqi7BHakScph5paRA3+Uij09FIGsxyln9l0syU4= X-Google-Smtp-Source: ABdhPJymXct9URcNJVjLUXOyDLEb9+0rvdVQeE9kz7CZ5ARRVfqfSIWxbYIRgAj87nwdG1UvKUU+HQ== X-Received: by 2002:a63:de57:: with SMTP id y23mr7297831pgi.62.1605688360833; Wed, 18 Nov 2020 00:32:40 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC 07/15] target/riscv: rvb: sign-extend instructions Date: Wed, 18 Nov 2020 16:29:45 +0800 Message-Id: <20201118083044.13992-8-frank.chang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118083044.13992-1-frank.chang@sifive.com> References: <20201118083044.13992-1-frank.chang@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=frank.chang@sifive.com; helo=mail-pf1-x432.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng Reviewed-by: Richard Henderson --- target/riscv/insn32.decode | 2 ++ target/riscv/insn_trans/trans_rvb.c.inc | 13 +++++++++++++ 2 files changed, 15 insertions(+) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 372476f1d2c..626641333c6 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -598,6 +598,8 @@ vsetvl 1000000 ..... ..... 111 ..... 1010111 = @r clz 011000000000 ..... 001 ..... 0010011 @r2 ctz 011000000001 ..... 001 ..... 0010011 @r2 pcnt 011000000010 ..... 001 ..... 0010011 @r2 +sext_b 011000000100 ..... 001 ..... 0010011 @r2 +sext_h 011000000101 ..... 001 ..... 0010011 @r2 =20 andn 0100000 .......... 111 ..... 0110011 @r orn 0100000 .......... 110 ..... 0110011 @r diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index b9a0e39a3e5..bf15611f85a 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -95,6 +95,19 @@ static bool trans_maxu(DisasContext *ctx, arg_maxu *a) return gen_arith(ctx, a, &tcg_gen_umax_tl); } =20 +static bool trans_sext_b(DisasContext *ctx, arg_sext_b *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_unary(ctx, a, &tcg_gen_ext8s_tl); +} + +static bool trans_sext_h(DisasContext *ctx, arg_sext_h *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_unary(ctx, a, &tcg_gen_ext16s_tl); +} + +{ /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688721; cv=none; d=zohomail.com; s=zohoarc; b=LhP3DqkzMcW8OQIJRLXaUxGJfJMJCwdS5aO23FfSHXR2T5XqyE2qwGFJUik34gjmFf6ILWmLIohWpA/UCFhziwYeoqmFAnH+pFXbKuEVSEPfzshX+EnPuLB8Nw4jqW0muuhXevOTdHWWTo5Z2l2nORwQB3dBAZph5ctRdB10nmo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688721; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=QAaoUJ75vmbJYxfN/64qLUxzeWb8lRPwE3N/AKXkZfw=; b=mOzxeaTzkwzPc1L33hMLpDFAk8qV9eK8h9K22y+7SQpxQnByf4iu9UdrwfbREavv/zsYrCUXU65UkrqSeG2snQy3t85qpD3DC7P3Id5Iwx2l+DGrokWkfLnT14Mnrq0nuD+e5RA74MiJv2Dh6Sc+jTlhGD+dYlfVi/eeVNt80zE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1605688721911440.7310394658931; Wed, 18 Nov 2020 00:38:41 -0800 (PST) Received: from localhost ([::1]:58400 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kfIzA-0002x6-OL for importer@patchew.org; Wed, 18 Nov 2020 03:38:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kfItV-0001lm-1n for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:49 -0500 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]:37937) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kfItT-0004pI-1J for qemu-devel@nongnu.org; Wed, 18 Nov 2020 03:32:48 -0500 Received: by mail-pf1-x436.google.com with SMTP id 10so960499pfp.5 for ; Wed, 18 Nov 2020 00:32:46 -0800 (PST) Received: from frankchang-ThinkPad-T490.internal.sifive.com (114-34-229-221.HINET-IP.hinet.net. [114.34.229.221]) by smtp.gmail.com with ESMTPSA id y10sm1618407pjm.34.2020.11.18.00.32.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Nov 2020 00:32:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QAaoUJ75vmbJYxfN/64qLUxzeWb8lRPwE3N/AKXkZfw=; b=FWlNxAiMLPOD4CLeN0wNeQlSphyaWEIeqRw+Z4/XgeeU3FCI3uAD3ZVNYl7cKpw0xc KHKE5tch9/XhGU2yrIfmC3hOUax9fKMWDx8+u0Fud/ZADb1hkHaaGF3CFA1Qwb/qgabM gGdFSxK7UAcIth2SKRuN7j58Y8vDiRFUdebuIcvYRI1VVwTZKPxCiEpk0oC7WXB6qfea IFpTL9KYpRfBClfvTfnPoVNvwKxRZtryZ7tjsvTlrwmXd+bxrXmtf3wSzAwVmf1ZoHrk 1swmqhrSI70LD0jFpfk6szpi3vCDwTt2Ss/M8cvMaKh9RnHt0o/Z/82dkY/aT4y6PkKS vfQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QAaoUJ75vmbJYxfN/64qLUxzeWb8lRPwE3N/AKXkZfw=; b=gu5bHPqVlXZVplqzQODRCwNFngcv0RVZJ6Z+Rwb5O04CxlB/IBszwxQxDj1CnTg4gx 2KBbP4gCDcludyG4IQOu800rvfd0TmaJgFvZLbbfA9MD2YGEg6W2BDI5/ngIa7B4obks 7dhQNwOxV7BVXnZtoDinV5Aumz7+tuvKFXmUAZl/Y9jwery95gPnm6iyN5vJJEjkAYRi S0KfTV+OQQSNPs4PbjSbRQOxOW6e+tF1/RW+hNZGMLUTmnlPHF691cp1bapo+ZAPvscd FYuYmJEWYMEnpsfy11eKDAOuVR0H6im/zrTZmwlUsIS40IpuFRq4q8maCXhlKhTcoScM EVYg== X-Gm-Message-State: AOAM533w9wnkuTG+bqIhtpav233T0Ng2lAPqdaOK5fSZCJKt9nxO2QSP rAlkhGgSNZeIP41FqJhjND/HpfGpJWcsvcLGUHY= X-Google-Smtp-Source: ABdhPJyhECiOidoOf7jY0uBwPC6yPdFv6Qim9yP4V03Vd7jBrlo6Y2jlF4Iajmxq9VoegwDDSIPMOQ== X-Received: by 2002:a63:cc50:: with SMTP id q16mr7555128pgi.246.1605688365557; Wed, 18 Nov 2020 00:32:45 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC 08/15] target/riscv: rvb: single-bit instructions Date: Wed, 18 Nov 2020 16:29:46 +0800 Message-Id: <20201118083044.13992-9-frank.chang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118083044.13992-1-frank.chang@sifive.com> References: <20201118083044.13992-1-frank.chang@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=frank.chang@sifive.com; helo=mail-pf1-x436.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32-64.decode | 8 ++ target/riscv/insn32.decode | 9 ++ target/riscv/insn_trans/trans_rvb.c.inc | 90 ++++++++++++++ target/riscv/translate.c | 155 ++++++++++++++++++++++++ 4 files changed, 262 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 2f00f96e36b..92f3aaac3b6 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -94,3 +94,11 @@ pcntw 011000000010 ..... 001 ..... 0011011 @r2 =20 packw 0000100 .......... 100 ..... 0111011 @r packuw 0100100 .......... 100 ..... 0111011 @r +sbsetw 0010100 .......... 001 ..... 0111011 @r +sbclrw 0100100 .......... 001 ..... 0111011 @r +sbinvw 0110100 .......... 001 ..... 0111011 @r +sbextw 0100100 .......... 101 ..... 0111011 @r + +sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 +sbclriw 0100100 .......... 001 ..... 0011011 @sh5 +sbinviw 0110100 .......... 001 ..... 0011011 @sh5 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 626641333c6..69e542da19c 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -611,3 +611,12 @@ min 0000101 .......... 100 ..... 0110011 @r minu 0000101 .......... 101 ..... 0110011 @r max 0000101 .......... 110 ..... 0110011 @r maxu 0000101 .......... 111 ..... 0110011 @r +sbset 0010100 .......... 001 ..... 0110011 @r +sbclr 0100100 .......... 001 ..... 0110011 @r +sbinv 0110100 .......... 001 ..... 0110011 @r +sbext 0100100 .......... 101 ..... 0110011 @r + +sbseti 001010 ........... 001 ..... 0010011 @sh +sbclri 010010 ........... 001 ..... 0010011 @sh +sbinvi 011010 ........... 001 ..... 0010011 @sh +sbexti 010010 ........... 101 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index bf15611f85a..dabf8e09c3d 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -107,6 +107,54 @@ static bool trans_sext_h(DisasContext *ctx, arg_sext_h= *a) return gen_unary(ctx, a, &tcg_gen_ext16s_tl); } =20 +static bool trans_sbset(DisasContext *ctx, arg_sbset *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbset); +} + +static bool trans_sbseti(DisasContext *ctx, arg_sbseti *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbset); +} + +static bool trans_sbclr(DisasContext *ctx, arg_sbclr *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbclr); +} + +static bool trans_sbclri(DisasContext *ctx, arg_sbclri *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbclr); +} + +static bool trans_sbinv(DisasContext *ctx, arg_sbinv *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbinv); +} + +static bool trans_sbinvi(DisasContext *ctx, arg_sbinvi *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbinv); +} + +static bool trans_sbext(DisasContext *ctx, arg_sbext *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbext); +} + +static bool trans_sbexti(DisasContext *ctx, arg_sbexti *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbext); +} + { /* RV64-only instructions */ #ifdef TARGET_RISCV64 @@ -141,4 +189,46 @@ static bool trans_packuw(DisasContext *ctx, arg_packuw= *a) return gen_arith(ctx, a, &gen_packuw); } =20 +static bool trans_sbsetw(DisasContext *ctx, arg_sbsetw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbsetw); +} + +static bool trans_sbsetiw(DisasContext *ctx, arg_sbsetiw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbsetw); +} + +static bool trans_sbclrw(DisasContext *ctx, arg_sbclrw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbclrw); +} + +static bool trans_sbclriw(DisasContext *ctx, arg_sbclriw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbclrw); +} + +static bool trans_sbinvw(DisasContext *ctx, arg_sbinvw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbinvw); +} + +static bool trans_sbinviw(DisasContext *ctx, arg_sbinviw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_sbinvw); +} + +static bool trans_sbextw(DisasContext *ctx, arg_sbextw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sbextw); +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index fb30ee83aa8..e7d9e4a1abf 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -647,6 +647,24 @@ static bool gen_arith_imm_tl(DisasContext *ctx, arg_i = *a, return true; } =20 +static bool gen_arith_shamt_tl(DisasContext *ctx, arg_shift *a, + void (*func)(TCGv, TCGv, TCGv)) +{ + TCGv source1, source2; + source1 =3D tcg_temp_new(); + source2 =3D tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + tcg_gen_movi_tl(source2, a->shamt); + + (*func)(source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + #ifdef TARGET_RISCV64 static void gen_addw(TCGv ret, TCGv arg1, TCGv arg2) { @@ -801,6 +819,74 @@ static void gen_packh(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(higher); } =20 +static void gen_sbop_shamt(TCGv ret, TCGv shamt) +{ + tcg_gen_andi_tl(ret, shamt, TARGET_LONG_BITS - 1); +} + +static void gen_sbop_common(TCGv ret, TCGv shamt) +{ + TCGv t; + t =3D tcg_temp_new(); + + gen_sbop_shamt(ret, shamt); + + tcg_gen_movi_tl(t, 1); + tcg_gen_shl_tl(ret, t, ret); + + tcg_temp_free(t); +} + +static void gen_sbset(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv mask; + mask =3D tcg_temp_new(); + + gen_sbop_common(mask, arg2); + + tcg_gen_or_tl(ret, arg1, mask); + + tcg_temp_free(mask); +} + +static void gen_sbclr(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv mask; + mask =3D tcg_temp_new(); + + gen_sbop_common(mask, arg2); + + tcg_gen_not_tl(mask, mask); + tcg_gen_and_tl(ret, arg1, mask); + + tcg_temp_free(mask); +} + +static void gen_sbinv(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv mask; + mask =3D tcg_temp_new(); + + gen_sbop_common(mask, arg2); + + tcg_gen_xor_tl(ret, arg1, mask); + + tcg_temp_free(mask); +} + +static void gen_sbext(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + shamt =3D tcg_temp_new(); + + gen_sbop_shamt(shamt, arg2); + tcg_gen_shr_tl(ret, arg1, shamt); + + tcg_gen_andi_tl(ret, ret, 1); + + tcg_temp_free(shamt); +} + =20 #ifdef TARGET_RISCV64 =20 @@ -867,6 +953,75 @@ static void gen_packuw(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(higher); } =20 +static void gen_sbopw_shamt(TCGv ret, TCGv shamt) +{ + tcg_gen_andi_tl(ret, shamt, 31); +} + +static void gen_sbopw_common(TCGv ret, TCGv shamt) +{ + TCGv t; + t =3D tcg_temp_new(); + + gen_sbopw_shamt(ret, shamt); + tcg_gen_movi_tl(t, 1); + tcg_gen_shl_tl(ret, t, ret); + + tcg_temp_free(t); +} + +static void gen_sbsetw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv mask; + mask =3D tcg_temp_new(); + + gen_sbopw_common(mask, arg2); + tcg_gen_or_tl(ret, arg1, mask); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(mask); +} + +static void gen_sbclrw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv mask; + mask =3D tcg_temp_new(); + + gen_sbopw_common(mask, arg2); + tcg_gen_not_tl(mask, mask); + tcg_gen_and_tl(ret, arg1, mask); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(mask); +} + +static void gen_sbinvw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv mask; + mask =3D tcg_temp_new(); + + gen_sbopw_common(mask, arg2); + tcg_gen_xor_tl(ret, arg1, mask); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(mask); +} + +static void gen_sbextw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + shamt =3D tcg_temp_new(); + + gen_sbopw_shamt(shamt, arg2); + tcg_gen_shr_tl(ret, arg1, shamt); + tcg_gen_andi_tl(ret, ret, 1); + + tcg_temp_free(shamt); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688651; cv=none; d=zohomail.com; s=zohoarc; b=R0RddUG9p6RnU12BbILtOy/+psah9+o5Yko9/07o3M1UrVQCOUwFGNljm5ySy7w3oy5+i5P1b5dKGPjq2SXBdynp4KQdkqMg+LQ1OD+1XpTr+0GmImHOJXGHMSRIU7zWHezqV1xFuVQatZIrNK2qihtgWVJv3S0xGWb1NdvZrR4= ARC-Message-Signature: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32-64.decode | 4 ++ target/riscv/insn32.decode | 4 ++ target/riscv/insn_trans/trans_rvb.c.inc | 58 ++++++++++++++++++++ target/riscv/translate.c | 70 +++++++++++++++++++++++++ 4 files changed, 136 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 92f3aaac3b6..cc6b7d63774 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -98,7 +98,11 @@ sbsetw 0010100 .......... 001 ..... 0111011 @r sbclrw 0100100 .......... 001 ..... 0111011 @r sbinvw 0110100 .......... 001 ..... 0111011 @r sbextw 0100100 .......... 101 ..... 0111011 @r +slow 0010000 .......... 001 ..... 0111011 @r +srow 0010000 .......... 101 ..... 0111011 @r =20 sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 sbclriw 0100100 .......... 001 ..... 0011011 @sh5 sbinviw 0110100 .......... 001 ..... 0011011 @sh5 +sloiw 0010000 .......... 001 ..... 0011011 @sh5 +sroiw 0010000 .......... 101 ..... 0011011 @sh5 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 69e542da19c..6e3eef84144 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -615,8 +615,12 @@ sbset 0010100 .......... 001 ..... 0110011 @r sbclr 0100100 .......... 001 ..... 0110011 @r sbinv 0110100 .......... 001 ..... 0110011 @r sbext 0100100 .......... 101 ..... 0110011 @r +slo 0010000 .......... 001 ..... 0110011 @r +sro 0010000 .......... 101 ..... 0110011 @r =20 sbseti 001010 ........... 001 ..... 0010011 @sh sbclri 010010 ........... 001 ..... 0010011 @sh sbinvi 011010 ........... 001 ..... 0010011 @sh sbexti 010010 ........... 101 ..... 0010011 @sh +sloi 001000 ........... 001 ..... 0010011 @sh +sroi 001000 ........... 101 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index dabf8e09c3d..4c93c5aab8b 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -155,6 +155,40 @@ static bool trans_sbexti(DisasContext *ctx, arg_sbexti= *a) return gen_arith_shamt_tl(ctx, a, &gen_sbext); } =20 +static bool trans_slo(DisasContext *ctx, arg_slo *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_slo); +} + +static bool trans_sloi(DisasContext *ctx, arg_sloi *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D TARGET_LONG_BITS) { + return false; + } + + return gen_arith_shamt_tl(ctx, a, &gen_slo); +} + +static bool trans_sro(DisasContext *ctx, arg_sro *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_sro); +} + +static bool trans_sroi(DisasContext *ctx, arg_sroi *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D TARGET_LONG_BITS) { + return false; + } + + return gen_arith_shamt_tl(ctx, a, &gen_sro); +} + { /* RV64-only instructions */ #ifdef TARGET_RISCV64 @@ -231,4 +265,28 @@ static bool trans_sbextw(DisasContext *ctx, arg_sbextw= *a) return gen_arith(ctx, a, &gen_sbextw); } =20 +static bool trans_slow(DisasContext *ctx, arg_slow *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_slow); +} + +static bool trans_sloiw(DisasContext *ctx, arg_sloiw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_slow); +} + +static bool trans_srow(DisasContext *ctx, arg_srow *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_srow); +} + +static bool trans_sroiw(DisasContext *ctx, arg_sroiw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_shamt_tl(ctx, a, &gen_srow); +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index e7d9e4a1abf..8972e247bd7 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -887,6 +887,38 @@ static void gen_sbext(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(shamt); } =20 +static void gen_slo(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt, t; + shamt =3D tcg_temp_new(); + t =3D tcg_temp_new(); + + gen_sbop_shamt(shamt, arg2); + + tcg_gen_not_tl(t, arg1); + tcg_gen_shl_tl(t, t, arg2); + tcg_gen_not_tl(ret, t); + + tcg_temp_free(shamt); + tcg_temp_free(t); +} + +static void gen_sro(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt, t; + shamt =3D tcg_temp_new(); + t =3D tcg_temp_new(); + + gen_sbop_shamt(shamt, arg2); + + tcg_gen_not_tl(t, arg1); + tcg_gen_shr_tl(t, t, arg2); + tcg_gen_not_tl(ret, t); + + tcg_temp_free(shamt); + tcg_temp_free(t); +} + =20 #ifdef TARGET_RISCV64 =20 @@ -1022,6 +1054,44 @@ static void gen_sbextw(TCGv ret, TCGv arg1, TCGv arg= 2) tcg_temp_free(shamt); } =20 +static void gen_slow(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt, t; + shamt =3D tcg_temp_new(); + t =3D tcg_temp_new(); + + tcg_gen_ext32u_tl(arg1, arg1); + + gen_sbopw_shamt(shamt, arg2); + tcg_gen_not_tl(t, arg1); + tcg_gen_shl_tl(t, t, shamt); + tcg_gen_not_tl(ret, t); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(shamt); + tcg_temp_free(t); +} + +static void gen_srow(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt, t; + shamt =3D tcg_temp_new(); + t =3D tcg_temp_new(); + + tcg_gen_ext32u_tl(arg1, arg1); + + gen_sbopw_shamt(shamt, arg2); + tcg_gen_not_tl(t, arg1); + tcg_gen_shr_tl(t, t, shamt); + tcg_gen_not_tl(ret, t); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(shamt); + tcg_temp_free(t); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688801; cv=none; d=zohomail.com; s=zohoarc; b=SXQ/1gFjqidPJtnYg5BdpFCXD67mygFa9PdCZMLEt3nmvSQndcZdMpFsfiEaProqJXPaX8fkuZbKaXK1lnoj4G33oYLFJ+W/Sp/ZU0sedvcI/ep6r5VH6oVNwDk9RjA4/zbVfsLJkIO60VH0+2s4TFmxAeRsyHqkga+I+gY4k8E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688801; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=veRygLEh+ZMTL9IPwGFw2549Ey6aVX1s6xT0idS+Iow=; b=O5AYacgbI2TvR4GgO2cmjpbtXw06pQQkmSSlwwISyXMfG+KCYrkgkCeNe/+/fwb29tQlRvU/C/c2Tz9/tQtIWv7ikSSgk+GWAwl4JvNnBIcUWqKj5ur9/0cxQU6Lc8aqBCtH6UdBnDmNMj/0+bHLNaqtgQa4b18XEZ0vzOSFIXU= ARC-Authentication-Results: i=1; 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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id y10sm1618407pjm.34.2020.11.18.00.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Nov 2020 00:32:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=veRygLEh+ZMTL9IPwGFw2549Ey6aVX1s6xT0idS+Iow=; b=eb7i3oGzGTxGpDw7pJzfc5iDZB3L6kmoPPgf1VtSlXhk5aRJEU0965ASUWtCt7rUJV 9Ep2m+MzhpV8LHQtoPLCr84ioOojOO8WWyLLUAR3831JNw/N4fXvOY5rRb821KZxnxu0 ezxoh+dzWzhjubBahOnIa9eN6bINTxSSFZOshoDl0/UhvczssqMCAyZj7ZWEwfv3K39d rwCPQMTEfW+PQgAQ1HsDcIsv65kwbzBu13ToZn1L4smOTI7RCqh2ue/pATPnpSVCSlZg gMQrk78WmWrB9QnIxVFci3sCCAUOKbwt3Mdoy8axvppDtmiKeovHFad9Oe/cC02ocblv 66+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=veRygLEh+ZMTL9IPwGFw2549Ey6aVX1s6xT0idS+Iow=; b=kLESdCVg4viOz5ZbfKPQ42KiiQFaZx3TxrMDWVhgovS4HCNsDAwmQMjfopFpOKhRcD NH0jCjPEtwLTcukjjij/WKhezcu46Zo2eXNoDkbIYv+l1YVZ6O6TRfD1Rb4OMlAbULNp x2AE/uCBvYMSiqGR4c/Be6dOg0AoB28bJ1InoliimO7v2Uva7eq6KTY8jXYIZGKBrOEL GKy83Ctxz6+IHzXJj5vaDcrU9+nROtOFCBYoJl48B83ks6ZAZJOuM2liu4s8ewBt8aHs 2MuK4PFy8tFpQNQKeFIpK6v2UhmaZyq0xc2HORvbrdI+8IERqdQIdYKSoSTJYDW96hgZ 36PQ== X-Gm-Message-State: AOAM532q5IjYUlTA2H1NfaM0QDhCcNj1l5W0nJH4prx0R4/VUVGB7qpm 8Twjs/OnN2QpIm2oe09jl3H5dveHZzb3utyU518= X-Google-Smtp-Source: ABdhPJyX6dCtcP5Xv+k5zXptwc+g8RYrXFPU9ETSC/NhoCF2ImR93eksGK9jHLtbPxVybI06evZsQQ== X-Received: by 2002:a17:90a:de86:: with SMTP id n6mr2914597pjv.214.1605688373938; Wed, 18 Nov 2020 00:32:53 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC 10/15] target/riscv: rvb: rotate (left/right) Date: Wed, 18 Nov 2020 16:29:48 +0800 Message-Id: <20201118083044.13992-11-frank.chang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201118083044.13992-1-frank.chang@sifive.com> References: <20201118083044.13992-1-frank.chang@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x102e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng Signed-off-by: Frank Chang --- target/riscv/insn32-64.decode | 3 ++ target/riscv/insn32.decode | 3 ++ target/riscv/insn_trans/trans_rvb.c.inc | 54 +++++++++++++++++++++++++ target/riscv/translate.c | 48 ++++++++++++++++++++++ 4 files changed, 108 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index cc6b7d63774..a1a4b12f7ca 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -100,9 +100,12 @@ sbinvw 0110100 .......... 001 ..... 0111011 @r sbextw 0100100 .......... 101 ..... 0111011 @r slow 0010000 .......... 001 ..... 0111011 @r srow 0010000 .......... 101 ..... 0111011 @r +rorw 0110000 .......... 101 ..... 0111011 @r +rolw 0110000 .......... 001 ..... 0111011 @r =20 sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 sbclriw 0100100 .......... 001 ..... 0011011 @sh5 sbinviw 0110100 .......... 001 ..... 0011011 @sh5 sloiw 0010000 .......... 001 ..... 0011011 @sh5 sroiw 0010000 .......... 101 ..... 0011011 @sh5 +roriw 0110000 .......... 101 ..... 0011011 @sh5 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 6e3eef84144..01b8ebc4bee 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -617,6 +617,8 @@ sbinv 0110100 .......... 001 ..... 0110011 @r sbext 0100100 .......... 101 ..... 0110011 @r slo 0010000 .......... 001 ..... 0110011 @r sro 0010000 .......... 101 ..... 0110011 @r +ror 0110000 .......... 101 ..... 0110011 @r +rol 0110000 .......... 001 ..... 0110011 @r =20 sbseti 001010 ........... 001 ..... 0010011 @sh sbclri 010010 ........... 001 ..... 0010011 @sh @@ -624,3 +626,4 @@ sbinvi 011010 ........... 001 ..... 0010011 @sh sbexti 010010 ........... 101 ..... 0010011 @sh sloi 001000 ........... 001 ..... 0010011 @sh sroi 001000 ........... 101 ..... 0010011 @sh +rori 011000 ........... 101 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index 4c93c5aab8b..ba8734203ac 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -189,7 +189,29 @@ static bool trans_sroi(DisasContext *ctx, arg_sroi *a) return gen_arith_shamt_tl(ctx, a, &gen_sro); } =20 +static bool trans_ror(DisasContext *ctx, arg_ror *a) { + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &tcg_gen_rotr_tl); +} + +static bool trans_rori(DisasContext *ctx, arg_rori *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D TARGET_LONG_BITS) { + return false; + } + + return gen_arith_shamt_tl(ctx, a, &tcg_gen_rotr_tl); +} + +static bool trans_rol(DisasContext *ctx, arg_rol *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &tcg_gen_rotl_tl); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 @@ -289,4 +311,36 @@ static bool trans_sroiw(DisasContext *ctx, arg_sroiw *= a) return gen_arith_shamt_tl(ctx, a, &gen_srow); } =20 +static bool trans_rorw(DisasContext *ctx, arg_rorw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_rorw); +} + +static bool trans_roriw(DisasContext *ctx, arg_roriw *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D 32) { + return false; + } + + if (a->shamt =3D=3D 0) { + TCGv t =3D tcg_temp_new(); + gen_get_gpr(t, a->rs1); + tcg_gen_ext32s_tl(t, t); + gen_set_gpr(a->rd, t); + tcg_temp_free(t); + return true; + } + + return gen_arith_shamt_tl(ctx, a, &gen_rorw); +} + +static bool trans_rolw(DisasContext *ctx, arg_rolw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_rolw); +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 8972e247bd7..68870bd9202 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1092,6 +1092,54 @@ static void gen_srow(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(t); } =20 +static void gen_rorw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + TCGv_i32 t1, t2; + shamt =3D tcg_temp_new(); + t1 =3D tcg_temp_new_i32(); + t2 =3D tcg_temp_new_i32(); + + gen_sbopw_shamt(shamt, arg2); + + /* truncate to 32-bits */ + tcg_gen_trunc_tl_i32(t1, arg1); + tcg_gen_trunc_tl_i32(t2, shamt); + + tcg_gen_rotr_i32(t1, t1, t2); + + /* sign-extend 64-bits */ + tcg_gen_ext_i32_tl(ret, t1); + + tcg_temp_free(shamt); + tcg_temp_free_i32(t1); + tcg_temp_free_i32(t2); +} + +static void gen_rolw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + TCGv_i32 t1, t2; + shamt =3D tcg_temp_new(); + t1 =3D tcg_temp_new_i32(); + t2 =3D tcg_temp_new_i32(); + + gen_sbopw_shamt(shamt, arg2); + + /* truncate to 32-bits */ + tcg_gen_trunc_tl_i32(t1, arg1); + tcg_gen_trunc_tl_i32(t2, shamt); + + tcg_gen_rotl_i32(t1, t1, t2); + + /* sign-extend 64-bits */ + tcg_gen_ext_i32_tl(ret, t1); + + tcg_temp_free(shamt); + tcg_temp_free_i32(t1); + tcg_temp_free_i32(t2); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688913; cv=none; d=zohomail.com; s=zohoarc; b=m2anG1FSsH3aS1IMFr8+3504H4I6S1BE4EGKYkqymrjESWnbFboLxTfFEoyDYYECCtUvLEXtXYpZuCf1tkAlfnmqwWkJB/98CettR3z55Fw/NSF7DYrScvR5/KWUjLU5pO8B7vYLuqbkIgqVaD0StoIG+XfQIulCxcMfG46DObU= ARC-Message-Signature: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Frank Chang Signed-off-by: Frank Chang --- target/riscv/bitmanip_helper.c | 79 +++++++++++++++++++++++++ target/riscv/helper.h | 7 +++ target/riscv/insn32-64.decode | 2 + target/riscv/insn32.decode | 2 + target/riscv/insn_trans/trans_rvb.c.inc | 34 +++++++++++ target/riscv/meson.build | 1 + target/riscv/translate.c | 53 +++++++++++++++++ 7 files changed, 178 insertions(+) create mode 100644 target/riscv/bitmanip_helper.c diff --git a/target/riscv/bitmanip_helper.c b/target/riscv/bitmanip_helper.c new file mode 100644 index 00000000000..1d133db1552 --- /dev/null +++ b/target/riscv/bitmanip_helper.c @@ -0,0 +1,79 @@ +/* + * RISC-V Bitmanip Extension Helpers for QEMU. + * + * Copyright (c) 2020 Kito Cheng, kito.cheng@sifive.com + * Copyright (c) 2020 Frank Chang, frank.chang@sifive.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +#include "qemu/osdep.h" +#include "qemu/host-utils.h" +#include "exec/exec-all.h" +#include "exec/helper-proto.h" + +static inline target_ulong do_swap(target_ulong x, target_ulong mask, int = shift) +{ + return ((x & mask) << shift) | ((x & ~mask) >> shift); +} + +static target_ulong do_grev(target_ulong rs1, + target_ulong rs2, + const target_ulong masks[]) +{ + target_ulong x =3D rs1; + int shift =3D 1; + int i =3D 0; + + while (shift < TARGET_LONG_BITS) { + if (rs2 & shift) { + x =3D do_swap(x, masks[i], shift); + } + shift <<=3D 1; + ++i; + } + + return x; +} + +target_ulong HELPER(grev)(target_ulong rs1, target_ulong rs2) +{ + static const target_ulong masks[] =3D { +#ifdef TARGET_RISCV32 + 0x55555555, 0x33333333, 0x0f0f0f0f, + 0x00ff00ff, 0x0000ffff, +#else + 0x5555555555555555, 0x3333333333333333, + 0x0f0f0f0f0f0f0f0f, 0x00ff00ff00ff00ff, + 0x0000ffff0000ffff, 0x00000000ffffffff, +#endif + }; + + return do_grev(rs1, rs2, masks); +} + +/* RV64-only instruction */ +#ifdef TARGET_RISCV64 + +target_ulong HELPER(grevw)(target_ulong rs1, target_ulong rs2) +{ + static const target_ulong masks[] =3D { + 0x55555555, 0x33333333, 0x0f0f0f0f, + 0x00ff00ff, 0x0000ffff, + }; + + return do_grev(rs1, rs2, masks); +} + +#endif + diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 4b690147fb2..15243a00761 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -66,6 +66,13 @@ DEF_HELPER_FLAGS_2(fcvt_d_lu, TCG_CALL_NO_RWG, i64, env,= tl) #endif DEF_HELPER_FLAGS_1(fclass_d, TCG_CALL_NO_RWG_SE, tl, i64) =20 +/* Bitmanip */ +DEF_HELPER_FLAGS_2(grev, TCG_CALL_NO_RWG_SE, tl, tl, tl) + +#if defined(TARGET_RISCV64) +DEF_HELPER_FLAGS_2(grevw, TCG_CALL_NO_RWG_SE, tl, tl, tl) +#endif + /* Special functions */ DEF_HELPER_3(csrrw, tl, env, tl, tl) DEF_HELPER_4(csrrs, tl, env, tl, tl, tl) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index a1a4b12f7ca..f2d3b6a5b5d 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -102,6 +102,7 @@ slow 0010000 .......... 001 ..... 0111011 @r srow 0010000 .......... 101 ..... 0111011 @r rorw 0110000 .......... 101 ..... 0111011 @r rolw 0110000 .......... 001 ..... 0111011 @r +grevw 0110100 .......... 101 ..... 0111011 @r =20 sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 sbclriw 0100100 .......... 001 ..... 0011011 @sh5 @@ -109,3 +110,4 @@ sbinviw 0110100 .......... 001 ..... 0011011 @sh5 sloiw 0010000 .......... 001 ..... 0011011 @sh5 sroiw 0010000 .......... 101 ..... 0011011 @sh5 roriw 0110000 .......... 101 ..... 0011011 @sh5 +greviw 0110100 .......... 101 ..... 0011011 @sh5 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 01b8ebc4bee..60821a16661 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -619,6 +619,7 @@ slo 0010000 .......... 001 ..... 0110011 @r sro 0010000 .......... 101 ..... 0110011 @r ror 0110000 .......... 101 ..... 0110011 @r rol 0110000 .......... 001 ..... 0110011 @r +grev 0110100 .......... 101 ..... 0110011 @r =20 sbseti 001010 ........... 001 ..... 0010011 @sh sbclri 010010 ........... 001 ..... 0010011 @sh @@ -627,3 +628,4 @@ sbexti 010010 ........... 101 ..... 0010011 @sh sloi 001000 ........... 001 ..... 0010011 @sh sroi 001000 ........... 101 ..... 0010011 @sh rori 011000 ........... 101 ..... 0010011 @sh +grevi 011010 ........... 101 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index ba8734203ac..9f1482d313a 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -212,6 +212,23 @@ static bool trans_rol(DisasContext *ctx, arg_rol *a) return gen_arith(ctx, a, &tcg_gen_rotl_tl); } =20 +static bool trans_grev(DisasContext *ctx, arg_grev *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_grev); +} + +static bool trans_grevi(DisasContext *ctx, arg_grevi *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D TARGET_LONG_BITS) { + return false; + } + + return gen_grevi(ctx, a); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 @@ -343,4 +360,21 @@ static bool trans_rolw(DisasContext *ctx, arg_rolw *a) return gen_arith(ctx, a, &gen_rolw); } =20 +static bool trans_grevw(DisasContext *ctx, arg_grevw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_grevw); +} + +static bool trans_greviw(DisasContext *ctx, arg_greviw *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D 32) { + return false; + } + + return gen_arith_shamt_tl(ctx, a, &gen_grevw); +} + #endif diff --git a/target/riscv/meson.build b/target/riscv/meson.build index abd647fea1c..df77cd24ada 100644 --- a/target/riscv/meson.build +++ b/target/riscv/meson.build @@ -21,6 +21,7 @@ riscv_ss.add(files( 'gdbstub.c', 'op_helper.c', 'vector_helper.c', + 'bitmanip_helper.c', 'translate.c', )) =20 diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 68870bd9202..80549154d6e 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -919,6 +919,44 @@ static void gen_sro(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(t); } =20 +static void gen_grev(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + shamt =3D tcg_temp_new(); + + gen_sbop_shamt(shamt, arg2); + gen_helper_grev(ret, arg1, shamt); + + tcg_temp_free(shamt); +} + +static bool gen_grevi(DisasContext *ctx, arg_grevi *a) +{ + TCGv source1, source2; + source1 =3D tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + + if (a->shamt =3D=3D (TARGET_LONG_BITS - 8)) { + /* rev8, byte swaps */ +#ifdef TARGET_RISCV32 + tcg_gen_bswap32_tl(source1, source1); +#else + tcg_gen_bswap64_tl(source1, source1); +#endif + } else { + source2 =3D tcg_temp_new(); + tcg_gen_movi_tl(source2, a->shamt); + gen_helper_grev(source1, source1, source2); + tcg_temp_free(source2); + } + + gen_set_gpr(a->rd, source1); + + tcg_temp_free(source1); + return true; +} + =20 #ifdef TARGET_RISCV64 =20 @@ -1140,6 +1178,21 @@ static void gen_rolw(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free_i32(t2); } =20 +static void gen_grevw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + shamt =3D tcg_temp_new(); + + tcg_gen_ext32u_tl(arg1, arg1); + + gen_sbopw_shamt(shamt, arg2); + gen_helper_grev(ret, arg1, shamt); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(shamt); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688961; cv=none; d=zohomail.com; s=zohoarc; b=iTqNMfOOAbNakiaQBVWgdtkqDnAAssL/qHmJA+sUJ469oYjydZzfWu1lgftQ1B+1VdDjTamEC7DVKNN7XcvA1gy6/p7fbiSwIqWwkDESFj6P19+0DEQWO0J7iIWaxtwJ58iXvVG44AJTXZ7feFPf5vnKK2hE59ItAAfnELKH/h4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605688961; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Frank Chang Signed-off-by: Frank Chang --- target/riscv/bitmanip_helper.c | 49 +++++++++++++++++++++++++ target/riscv/helper.h | 2 + target/riscv/insn32-64.decode | 2 + target/riscv/insn32.decode | 2 + target/riscv/insn_trans/trans_rvb.c.inc | 34 +++++++++++++++++ target/riscv/translate.c | 26 +++++++++++++ 6 files changed, 115 insertions(+) diff --git a/target/riscv/bitmanip_helper.c b/target/riscv/bitmanip_helper.c index 1d133db1552..83c4ac8e960 100644 --- a/target/riscv/bitmanip_helper.c +++ b/target/riscv/bitmanip_helper.c @@ -77,3 +77,52 @@ target_ulong HELPER(grevw)(target_ulong rs1, target_ulon= g rs2) =20 #endif =20 +static target_ulong do_gorc(target_ulong rs1, + target_ulong rs2, + const target_ulong masks[]) +{ + target_ulong x =3D rs1; + int shift =3D 1; + int i =3D 0; + + while (shift < TARGET_LONG_BITS) { + if (rs2 & shift) { + x |=3D do_swap(x, masks[i], shift); + } + shift <<=3D 1; + ++i; + } + + return x; +} + +target_ulong HELPER(gorc)(target_ulong rs1, target_ulong rs2) +{ + static const target_ulong masks[] =3D { +#ifdef TARGET_RISCV32 + 0x55555555, 0x33333333, 0x0f0f0f0f, + 0x00ff00ff, 0x0000ffff, +#else + 0x5555555555555555, 0x3333333333333333, 0x0f0f0f0f0f0f0f0f, + 0x00ff00ff00ff00ff, 0x0000ffff0000ffff, 0x00000000ffffffff, +#endif + }; + + return do_gorc(rs1, rs2, masks); +} + +/* RV64-only instruction */ +#ifdef TARGET_RISCV64 + +target_ulong HELPER(gorcw)(target_ulong rs1, target_ulong rs2) +{ + static const target_ulong masks[] =3D { + 0x55555555, 0x33333333, 0x0f0f0f0f, + 0x00ff00ff, 0x0000ffff, + }; + + return do_gorc(rs1, rs2, masks); +} + +#endif + diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 15243a00761..8effa427b1a 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -68,9 +68,11 @@ DEF_HELPER_FLAGS_1(fclass_d, TCG_CALL_NO_RWG_SE, tl, i64) =20 /* Bitmanip */ DEF_HELPER_FLAGS_2(grev, TCG_CALL_NO_RWG_SE, tl, tl, tl) +DEF_HELPER_FLAGS_2(gorc, TCG_CALL_NO_RWG_SE, tl, tl, tl) =20 #if defined(TARGET_RISCV64) DEF_HELPER_FLAGS_2(grevw, TCG_CALL_NO_RWG_SE, tl, tl, tl) +DEF_HELPER_FLAGS_2(gorcw, TCG_CALL_NO_RWG_SE, tl, tl, tl) #endif =20 /* Special functions */ diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index f2d3b6a5b5d..8e6ec4750f3 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -103,6 +103,7 @@ srow 0010000 .......... 101 ..... 0111011 @r rorw 0110000 .......... 101 ..... 0111011 @r rolw 0110000 .......... 001 ..... 0111011 @r grevw 0110100 .......... 101 ..... 0111011 @r +gorcw 0010100 .......... 101 ..... 0111011 @r =20 sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 sbclriw 0100100 .......... 001 ..... 0011011 @sh5 @@ -111,3 +112,4 @@ sloiw 0010000 .......... 001 ..... 0011011 @sh5 sroiw 0010000 .......... 101 ..... 0011011 @sh5 roriw 0110000 .......... 101 ..... 0011011 @sh5 greviw 0110100 .......... 101 ..... 0011011 @sh5 +gorciw 0010100 .......... 101 ..... 0011011 @sh5 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 60821a16661..76ba0698511 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -620,6 +620,7 @@ sro 0010000 .......... 101 ..... 0110011 @r ror 0110000 .......... 101 ..... 0110011 @r rol 0110000 .......... 001 ..... 0110011 @r grev 0110100 .......... 101 ..... 0110011 @r +gorc 0010100 .......... 101 ..... 0110011 @r =20 sbseti 001010 ........... 001 ..... 0010011 @sh sbclri 010010 ........... 001 ..... 0010011 @sh @@ -629,3 +630,4 @@ sloi 001000 ........... 001 ..... 0010011 @sh sroi 001000 ........... 101 ..... 0010011 @sh rori 011000 ........... 101 ..... 0010011 @sh grevi 011010 ........... 101 ..... 0010011 @sh +gorci 001010 ........... 101 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index 9f1482d313a..eade85125c5 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -229,6 +229,23 @@ static bool trans_grevi(DisasContext *ctx, arg_grevi *= a) return gen_grevi(ctx, a); } =20 +static bool trans_gorc(DisasContext *ctx, arg_gorc *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_gorc); +} + +static bool trans_gorci(DisasContext *ctx, arg_gorci *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D TARGET_LONG_BITS) { + return false; + } + + return gen_arith_shamt_tl(ctx, a, &gen_gorc); +} + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 @@ -377,4 +394,21 @@ static bool trans_greviw(DisasContext *ctx, arg_greviw= *a) return gen_arith_shamt_tl(ctx, a, &gen_grevw); } =20 +static bool trans_gorcw(DisasContext *ctx, arg_gorcw *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_gorcw); +} + +static bool trans_gorciw(DisasContext *ctx, arg_gorciw *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >=3D 32) { + return false; + } + + return gen_arith_shamt_tl(ctx, a, &gen_gorcw); +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 80549154d6e..566e60d0d20 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -957,6 +957,17 @@ static bool gen_grevi(DisasContext *ctx, arg_grevi *a) return true; } =20 +static void gen_gorc(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + shamt =3D tcg_temp_new(); + + gen_sbop_shamt(shamt, arg2); + gen_helper_gorc(ret, arg1, shamt); + + tcg_temp_free(shamt); +} + =20 #ifdef TARGET_RISCV64 =20 @@ -1193,6 +1204,21 @@ static void gen_grevw(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(shamt); } =20 +static void gen_gorcw(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv shamt; + shamt =3D tcg_temp_new(); + + tcg_gen_ext32u_tl(arg1, arg1); + + gen_sbopw_shamt(shamt, arg2); + gen_helper_gorc(ret, arg1, shamt); + + tcg_gen_ext32s_tl(ret, ret); + + tcg_temp_free(shamt); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1605688994; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng Signed-off-by: Frank Chang Reviewed-by: Richard Henderson --- target/riscv/insn32-64.decode | 3 +++ target/riscv/insn32.decode | 3 +++ target/riscv/insn_trans/trans_rvb.c.inc | 23 +++++++++++++++++ target/riscv/translate.c | 33 +++++++++++++++++++++++++ 4 files changed, 62 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 8e6ec4750f3..42bafbc03a0 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -104,6 +104,9 @@ rorw 0110000 .......... 101 ..... 0111011 @r rolw 0110000 .......... 001 ..... 0111011 @r grevw 0110100 .......... 101 ..... 0111011 @r gorcw 0010100 .......... 101 ..... 0111011 @r +sh1addu_w 0010000 .......... 010 ..... 0111011 @r +sh2addu_w 0010000 .......... 100 ..... 0111011 @r +sh3addu_w 0010000 .......... 110 ..... 0111011 @r =20 sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 sbclriw 0100100 .......... 001 ..... 0011011 @sh5 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 76ba0698511..e23a378dec4 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -621,6 +621,9 @@ ror 0110000 .......... 101 ..... 0110011 @r rol 0110000 .......... 001 ..... 0110011 @r grev 0110100 .......... 101 ..... 0110011 @r gorc 0010100 .......... 101 ..... 0110011 @r +sh1add 0010000 .......... 010 ..... 0110011 @r +sh2add 0010000 .......... 100 ..... 0110011 @r +sh3add 0010000 .......... 110 ..... 0110011 @r =20 sbseti 001010 ........... 001 ..... 0010011 @sh sbclri 010010 ........... 001 ..... 0010011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index eade85125c5..31d791236d9 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -246,6 +246,17 @@ static bool trans_gorci(DisasContext *ctx, arg_gorci *= a) return gen_arith_shamt_tl(ctx, a, &gen_gorc); } =20 +#define GEN_TRANS_SHADD(SHAMT) = \ +static bool trans_sh##SHAMT##add(DisasContext *ctx, arg_sh##SHAMT##add *a)= \ +{ = \ + REQUIRE_EXT(ctx, RVB); = \ + return gen_arith(ctx, a, &gen_sh##SHAMT##add); = \ +} + +GEN_TRANS_SHADD(1) +GEN_TRANS_SHADD(2) +GEN_TRANS_SHADD(3) + /* RV64-only instructions */ #ifdef TARGET_RISCV64 =20 @@ -411,4 +422,16 @@ static bool trans_gorciw(DisasContext *ctx, arg_gorciw= *a) return gen_arith_shamt_tl(ctx, a, &gen_gorcw); } =20 +#define GEN_TRANS_SHADDU_W(SHAMT) \ +static bool trans_sh##SHAMT##addu_w(DisasContext *ctx, \ + arg_sh##SHAMT##addu_w *a) \ +{ \ + REQUIRE_EXT(ctx, RVB); \ + return gen_arith(ctx, a, &gen_sh##SHAMT##addu_w); \ +} + +GEN_TRANS_SHADDU_W(1) +GEN_TRANS_SHADDU_W(2) +GEN_TRANS_SHADDU_W(3) + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 566e60d0d20..584550a9db2 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -968,6 +968,21 @@ static void gen_gorc(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(shamt); } =20 +#define GEN_SHADD(SHAMT) \ +static void gen_sh##SHAMT##add(TCGv ret, TCGv arg1, TCGv arg2) \ +{ \ + TCGv t; \ + t =3D tcg_temp_new(); \ + \ + tcg_gen_shli_tl(t, arg1, SHAMT); \ + tcg_gen_add_tl(ret, t, arg2); \ + \ + tcg_temp_free(t); \ +} + +GEN_SHADD(1) +GEN_SHADD(2) +GEN_SHADD(3) =20 #ifdef TARGET_RISCV64 =20 @@ -1219,6 +1234,24 @@ static void gen_gorcw(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(shamt); } =20 +#define GEN_SHADDU_W(SHAMT) \ +static void gen_sh##SHAMT##addu_w(TCGv ret, TCGv arg1, TCGv arg2) \ +{ \ + TCGv t; \ + t =3D tcg_temp_new(); \ + \ + tcg_gen_ext32u_tl(t, arg1); \ + \ + tcg_gen_shli_tl(t, t, SHAMT); \ + tcg_gen_add_tl(ret, t, arg2); \ + \ + tcg_temp_free(t); \ +} + +GEN_SHADDU_W(1) +GEN_SHADDU_W(2) +GEN_SHADDU_W(3) + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Frank Chang , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Kito Cheng Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32-64.decode | 7 +++++ target/riscv/insn_trans/trans_rvb.c.inc | 38 +++++++++++++++++++++++++ target/riscv/translate.c | 18 ++++++++++++ 3 files changed, 63 insertions(+) diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode index 42bafbc03a0..5df10cd3066 100644 --- a/target/riscv/insn32-64.decode +++ b/target/riscv/insn32-64.decode @@ -107,6 +107,9 @@ gorcw 0010100 .......... 101 ..... 0111011 @r sh1addu_w 0010000 .......... 010 ..... 0111011 @r sh2addu_w 0010000 .......... 100 ..... 0111011 @r sh3addu_w 0010000 .......... 110 ..... 0111011 @r +addwu 0000101 .......... 000 ..... 0111011 @r +subwu 0100101 .......... 000 ..... 0111011 @r +addu_w 0000100 .......... 000 ..... 0111011 @r =20 sbsetiw 0010100 .......... 001 ..... 0011011 @sh5 sbclriw 0100100 .......... 001 ..... 0011011 @sh5 @@ -116,3 +119,7 @@ sroiw 0010000 .......... 101 ..... 0011011 @sh5 roriw 0110000 .......... 101 ..... 0011011 @sh5 greviw 0110100 .......... 101 ..... 0011011 @sh5 gorciw 0010100 .......... 101 ..... 0011011 @sh5 + +addiwu ................. 100 ..... 0011011 @i + +slliu_w 000010 ........... 001 ..... 0011011 @sh diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_tr= ans/trans_rvb.c.inc index 31d791236d9..c6fcdc5f0c1 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -434,4 +434,42 @@ GEN_TRANS_SHADDU_W(1) GEN_TRANS_SHADDU_W(2) GEN_TRANS_SHADDU_W(3) =20 +static bool trans_addwu(DisasContext *ctx, arg_addwu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_addwu); +} + +static bool trans_addiwu(DisasContext *ctx, arg_addiwu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith_imm_tl(ctx, a, &gen_addwu); +} + +static bool trans_subwu(DisasContext *ctx, arg_subwu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_subwu); +} + +static bool trans_addu_w(DisasContext *ctx, arg_addu_w *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, &gen_addu_w); +} + +static bool trans_slliu_w(DisasContext *ctx, arg_slliu_w *a) +{ + TCGv source1; + source1 =3D tcg_temp_new(); + gen_get_gpr(source1, a->rs1); + + tcg_gen_ext32u_tl(source1, source1); + tcg_gen_shli_tl(source1, source1, a->shamt); + gen_set_gpr(a->rd, source1); + + tcg_temp_free(source1); + return true; +} + #endif diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 584550a9db2..9d36d2bd685 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -672,12 +672,24 @@ static void gen_addw(TCGv ret, TCGv arg1, TCGv arg2) tcg_gen_ext32s_tl(ret, ret); } =20 +static void gen_addwu(TCGv ret, TCGv arg1, TCGv arg2) +{ + tcg_gen_add_tl(ret, arg1, arg2); + tcg_gen_ext32u_tl(ret, ret); +} + static void gen_subw(TCGv ret, TCGv arg1, TCGv arg2) { tcg_gen_sub_tl(ret, arg1, arg2); tcg_gen_ext32s_tl(ret, ret); } =20 +static void gen_subwu(TCGv ret, TCGv arg1, TCGv arg2) +{ + tcg_gen_sub_tl(ret, arg1, arg2); + tcg_gen_ext32u_tl(ret, ret); +} + static void gen_mulw(TCGv ret, TCGv arg1, TCGv arg2) { tcg_gen_mul_tl(ret, arg1, arg2); @@ -1252,6 +1264,12 @@ GEN_SHADDU_W(1) GEN_SHADDU_W(2) GEN_SHADDU_W(3) =20 +static void gen_addu_w(TCGv ret, TCGv arg1, TCGv arg2) +{ + tcg_gen_ext32u_tl(arg1, arg1); + tcg_gen_add_tl(ret, arg1, arg2); +} + #endif =20 static bool gen_arith(DisasContext *ctx, arg_r *a, --=20 2.17.1 From nobody Thu May 2 04:12:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Kito Cheng , Palmer Dabbelt , Sagar Karandikar , Bastian Koppelmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng B-extension is default off, use cpu rv32 or rv64 with x-b=3Dtrue to enable B-extension. Signed-off-by: Kito Cheng Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 4 ++++ target/riscv/cpu.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 0bbfd7f4574..bc29e118c6d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -438,6 +438,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error *= *errp) if (cpu->cfg.ext_h) { target_misa |=3D RVH; } + if (cpu->cfg.ext_b) { + target_misa |=3D RVB; + } if (cpu->cfg.ext_v) { target_misa |=3D RVV; if (!is_power_of_2(cpu->cfg.vlen)) { @@ -515,6 +518,7 @@ static Property riscv_cpu_properties[] =3D { DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true), DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true), /* This is experimental so mark with 'x-' */ + DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, true), DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false), DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false), DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true), diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index de4705bb578..c1c77c58a87 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -66,6 +66,7 @@ #define RVS RV('S') #define RVU RV('U') #define RVH RV('H') +#define RVB RV('B') =20 /* S extension denotes that Supervisor mode exists, however it is possible to have a core that support S mode but does not have an MMU and there @@ -278,6 +279,7 @@ struct RISCVCPU { bool ext_f; bool ext_d; bool ext_c; + bool ext_b; bool ext_s; bool ext_u; bool ext_h; --=20 2.17.1