On 16/11/20 21:13, Jessica Clarke wrote:
> These are meant to correspond to the error code reported for #PF, so fix
> the definition for Instruction Fetch faults and add one for Reserved Bit
> faults (checking for that is currently a TODO in x86_mmu.c).
>
> Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
> ---
> target/i386/hvf/x86_mmu.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/target/i386/hvf/x86_mmu.h b/target/i386/hvf/x86_mmu.h
> index cd6e137e79..710adb82b5 100644
> --- a/target/i386/hvf/x86_mmu.h
> +++ b/target/i386/hvf/x86_mmu.h
> @@ -34,7 +34,8 @@
> #define MMU_PAGE_PT (1 << 0)
> #define MMU_PAGE_WT (1 << 1)
> #define MMU_PAGE_US (1 << 2)
> -#define MMU_PAGE_NX (1 << 3)
> +#define MMU_PAGE_RS (1 << 3)
> +#define MMU_PAGE_NX (1 << 4)
>
> bool mmu_gva_to_gpa(struct CPUState *cpu, target_ulong gva, uint64_t *gpa);
Since you are at it, can you instead replace these flags with
PG_ERROR_{P,W,U,RSVD,I_D}_MASK from cpu.h?
Thanks,
Paolo