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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , julien@xen.org, Eduardo Habkost , masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, "open list:Virt" , stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The use of FDT's is quite common across our various platforms. To allow the generic loader to tweak it we need to make it available in the generic state. This creates the field and migrates the initial user to use the generic field. Other boards will be updated in later patches. Signed-off-by: Alex Benn=C3=A9e Message-Id: <20201021170842.25762-2-alex.bennee@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/arm/virt.h | 1 - include/hw/boards.h | 1 + hw/arm/virt.c | 322 ++++++++++++++++++++++-------------------- 3 files changed, 170 insertions(+), 154 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index aad6d69841..648e5d6791 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -152,7 +152,6 @@ struct VirtMachineState { char *pciehb_nodename; const int *irqmap; int smp_cpus; - void *fdt; int fdt_size; uint32_t clock_phandle; uint32_t gic_phandle; diff --git a/include/hw/boards.h b/include/hw/boards.h index a49e3a6b44..7b835e361c 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -257,6 +257,7 @@ struct MachineState { =20 /*< public >*/ =20 + void *fdt; char *dtb; char *dumpdtb; int phandle_start; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 27dbeb549e..14ba077bb0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -216,14 +216,14 @@ static bool cpu_type_valid(const char *cpu) return false; } =20 -static void create_kaslr_seed(VirtMachineState *vms, const char *node) +static void create_kaslr_seed(MachineState *ms, const char *node) { uint64_t seed; =20 if (qemu_guest_getrandom(&seed, sizeof(seed), NULL)) { return; } - qemu_fdt_setprop_u64(vms->fdt, node, "kaslr-seed", seed); + qemu_fdt_setprop_u64(ms->fdt, node, "kaslr-seed", seed); } =20 static void create_fdt(VirtMachineState *vms) @@ -237,7 +237,7 @@ static void create_fdt(VirtMachineState *vms) exit(1); } =20 - vms->fdt =3D fdt; + ms->fdt =3D fdt; =20 /* Header */ qemu_fdt_setprop_string(fdt, "/", "compatible", "linux,dummy-virt"); @@ -246,11 +246,11 @@ static void create_fdt(VirtMachineState *vms) =20 /* /chosen must exist for load_dtb to fill in necessary properties lat= er */ qemu_fdt_add_subnode(fdt, "/chosen"); - create_kaslr_seed(vms, "/chosen"); + create_kaslr_seed(ms, "/chosen"); =20 if (vms->secure) { qemu_fdt_add_subnode(fdt, "/secure-chosen"); - create_kaslr_seed(vms, "/secure-chosen"); + create_kaslr_seed(ms, "/secure-chosen"); } =20 /* Clock node, for the benefit of the UART. The kernel device tree @@ -314,6 +314,7 @@ static void fdt_add_timer_nodes(const VirtMachineState = *vms) ARMCPU *armcpu; VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); uint32_t irqflags =3D GIC_FDT_IRQ_FLAGS_LEVEL_HI; + MachineState *ms =3D MACHINE(vms); =20 if (vmc->claim_edge_triggered_timers) { irqflags =3D GIC_FDT_IRQ_FLAGS_EDGE_LO_HI; @@ -325,19 +326,19 @@ static void fdt_add_timer_nodes(const VirtMachineStat= e *vms) (1 << vms->smp_cpus) - 1); } =20 - qemu_fdt_add_subnode(vms->fdt, "/timer"); + qemu_fdt_add_subnode(ms->fdt, "/timer"); =20 armcpu =3D ARM_CPU(qemu_get_cpu(0)); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] =3D "arm,armv8-timer\0arm,armv7-timer"; - qemu_fdt_setprop(vms->fdt, "/timer", "compatible", + qemu_fdt_setprop(ms->fdt, "/timer", "compatible", compat, sizeof(compat)); } else { - qemu_fdt_setprop_string(vms->fdt, "/timer", "compatible", + qemu_fdt_setprop_string(ms->fdt, "/timer", "compatible", "arm,armv7-timer"); } - qemu_fdt_setprop(vms->fdt, "/timer", "always-on", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, "/timer", "interrupts", + qemu_fdt_setprop(ms->fdt, "/timer", "always-on", NULL, 0); + qemu_fdt_setprop_cells(ms->fdt, "/timer", "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflag= s, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqfla= gs, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags, @@ -372,36 +373,36 @@ static void fdt_add_cpu_nodes(const VirtMachineState = *vms) } } =20 - qemu_fdt_add_subnode(vms->fdt, "/cpus"); - qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#address-cells", addr_cells); - qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#size-cells", 0x0); + qemu_fdt_add_subnode(ms->fdt, "/cpus"); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", addr_cells); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); =20 for (cpu =3D vms->smp_cpus - 1; cpu >=3D 0; cpu--) { char *nodename =3D g_strdup_printf("/cpus/cpu@%d", cpu); ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(cpu)); CPUState *cs =3D CPU(armcpu); =20 - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "cpu"); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", armcpu->dtb_compatible); =20 if (vms->psci_conduit !=3D QEMU_PSCI_CONDUIT_DISABLED && vms->smp_cpus > 1) { - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_setprop_string(ms->fdt, nodename, "enable-method", "psci"); } =20 if (addr_cells =3D=3D 2) { - qemu_fdt_setprop_u64(vms->fdt, nodename, "reg", + qemu_fdt_setprop_u64(ms->fdt, nodename, "reg", armcpu->mp_affinity); } else { - qemu_fdt_setprop_cell(vms->fdt, nodename, "reg", + qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", armcpu->mp_affinity); } =20 if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { - qemu_fdt_setprop_cell(vms->fdt, nodename, "numa-node-id", + qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", ms->possible_cpus->cpus[cs->cpu_index].props.node_id); } =20 @@ -412,71 +413,74 @@ static void fdt_add_cpu_nodes(const VirtMachineState = *vms) static void fdt_add_its_gic_node(VirtMachineState *vms) { char *nodename; + MachineState *ms =3D MACHINE(vms); =20 - vms->msi_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + vms->msi_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); nodename =3D g_strdup_printf("/intc/its@%" PRIx64, vms->memmap[VIRT_GIC_ITS].base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v3-its"); - qemu_fdt_setprop(vms->fdt, nodename, "msi-controller", NULL, 0); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop(ms->fdt, nodename, "msi-controller", NULL, 0); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_ITS].base, 2, vms->memmap[VIRT_GIC_ITS].size); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->msi_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->msi_phandle); g_free(nodename); } =20 static void fdt_add_v2m_gic_node(VirtMachineState *vms) { + MachineState *ms =3D MACHINE(vms); char *nodename; =20 nodename =3D g_strdup_printf("/intc/v2m@%" PRIx64, vms->memmap[VIRT_GIC_V2M].base); - vms->msi_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + vms->msi_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v2m-frame"); - qemu_fdt_setprop(vms->fdt, nodename, "msi-controller", NULL, 0); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop(ms->fdt, nodename, "msi-controller", NULL, 0); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_V2M].base, 2, vms->memmap[VIRT_GIC_V2M].size); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->msi_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->msi_phandle); g_free(nodename); } =20 static void fdt_add_gic_node(VirtMachineState *vms) { + MachineState *ms =3D MACHINE(vms); char *nodename; =20 - vms->gic_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); - qemu_fdt_setprop_cell(vms->fdt, "/", "interrupt-parent", vms->gic_phan= dle); + vms->gic_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_setprop_cell(ms->fdt, "/", "interrupt-parent", vms->gic_phand= le); =20 nodename =3D g_strdup_printf("/intc@%" PRIx64, vms->memmap[VIRT_GIC_DIST].base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 3); - qemu_fdt_setprop(vms->fdt, nodename, "interrupt-controller", NULL, 0); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 0x2); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 0x2); - qemu_fdt_setprop(vms->fdt, nodename, "ranges", NULL, 0); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 3); + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 0x2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 0x2); + qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0); if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { int nb_redist_regions =3D virt_gicv3_redist_region_count(vms); =20 - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v3"); =20 - qemu_fdt_setprop_cell(vms->fdt, nodename, + qemu_fdt_setprop_cell(ms->fdt, nodename, "#redistributor-regions", nb_redist_regions); =20 if (nb_redist_regions =3D=3D 1) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].bas= e, 2, vms->memmap[VIRT_GIC_DIST].siz= e, 2, vms->memmap[VIRT_GIC_REDIST].b= ase, 2, vms->memmap[VIRT_GIC_REDIST].s= ize); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].base, 2, vms->memmap[VIRT_GIC_DIST].size, 2, vms->memmap[VIRT_GIC_REDIST].base, @@ -486,22 +490,22 @@ static void fdt_add_gic_node(VirtMachineState *vms) } =20 if (vms->virt) { - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IR= Q, GIC_FDT_IRQ_FLAGS_LEVEL_HI); } } else { /* 'cortex-a15-gic' means 'GIC v2' */ - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,cortex-a15-gic"); if (!vms->virt) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].bas= e, 2, vms->memmap[VIRT_GIC_DIST].siz= e, 2, vms->memmap[VIRT_GIC_CPU].base, 2, vms->memmap[VIRT_GIC_CPU].size= ); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].bas= e, 2, vms->memmap[VIRT_GIC_DIST].siz= e, 2, vms->memmap[VIRT_GIC_CPU].base, @@ -510,13 +514,13 @@ static void fdt_add_gic_node(VirtMachineState *vms) 2, vms->memmap[VIRT_GIC_HYP].size, 2, vms->memmap[VIRT_GIC_VCPU].bas= e, 2, vms->memmap[VIRT_GIC_VCPU].siz= e); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IR= Q, GIC_FDT_IRQ_FLAGS_LEVEL_HI); } } =20 - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->gic_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->gic_phandle); g_free(nodename); } =20 @@ -524,6 +528,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *v= ms) { ARMCPU *armcpu =3D ARM_CPU(first_cpu); uint32_t irqflags =3D GIC_FDT_IRQ_FLAGS_LEVEL_HI; + MachineState *ms =3D MACHINE(vms); =20 if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL)); @@ -536,12 +541,12 @@ static void fdt_add_pmu_nodes(const VirtMachineState = *vms) (1 << vms->smp_cpus) - 1); } =20 - qemu_fdt_add_subnode(vms->fdt, "/pmu"); + qemu_fdt_add_subnode(ms->fdt, "/pmu"); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] =3D "arm,armv8-pmuv3"; - qemu_fdt_setprop(vms->fdt, "/pmu", "compatible", + qemu_fdt_setprop(ms->fdt, "/pmu", "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_cells(vms->fdt, "/pmu", "interrupts", + qemu_fdt_setprop_cells(ms->fdt, "/pmu", "interrupts", GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_PMU_IRQ, irqf= lags); } } @@ -747,6 +752,7 @@ static void create_uart(const VirtMachineState *vms, in= t uart, const char clocknames[] =3D "uartclk\0apb_pclk"; DeviceState *dev =3D qdev_new(TYPE_PL011); SysBusDevice *s =3D SYS_BUS_DEVICE(dev); + MachineState *ms =3D MACHINE(vms); =20 qdev_prop_set_chr(dev, "chardev", chr); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -755,28 +761,28 @@ static void create_uart(const VirtMachineState *vms, = int uart, sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); =20 nodename =3D g_strdup_printf("/pl011@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); + qemu_fdt_add_subnode(ms->fdt, nodename); /* Note that we can't use setprop_string because of the embedded NUL */ - qemu_fdt_setprop(vms->fdt, nodename, "compatible", + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cells(vms->fdt, nodename, "clocks", + qemu_fdt_setprop_cells(ms->fdt, nodename, "clocks", vms->clock_phandle, vms->clock_phandle); - qemu_fdt_setprop(vms->fdt, nodename, "clock-names", + qemu_fdt_setprop(ms->fdt, nodename, "clock-names", clocknames, sizeof(clocknames)); =20 if (uart =3D=3D VIRT_UART) { - qemu_fdt_setprop_string(vms->fdt, "/chosen", "stdout-path", nodena= me); + qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodenam= e); } else { /* Mark as not usable by the normal world */ - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay= "); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"= ); =20 - qemu_fdt_setprop_string(vms->fdt, "/secure-chosen", "stdout-path", + qemu_fdt_setprop_string(ms->fdt, "/secure-chosen", "stdout-path", nodename); } =20 @@ -790,19 +796,20 @@ static void create_rtc(const VirtMachineState *vms) hwaddr size =3D vms->memmap[VIRT_RTC].size; int irq =3D vms->irqmap[VIRT_RTC]; const char compat[] =3D "arm,pl031\0arm,primecell"; + MachineState *ms =3D MACHINE(vms); =20 sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq)); =20 nodename =3D g_strdup_printf("/pl031@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(comp= at)); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compa= t)); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle= ); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "clock-names", "apb_pclk"); g_free(nodename); } =20 @@ -827,38 +834,39 @@ static void create_gpio(const VirtMachineState *vms) hwaddr size =3D vms->memmap[VIRT_GPIO].size; int irq =3D vms->irqmap[VIRT_GPIO]; const char compat[] =3D "arm,pl061\0arm,primecell"; + MachineState *ms =3D MACHINE(vms); =20 pl061_dev =3D sysbus_create_simple("pl061", base, qdev_get_gpio_in(vms->gic, irq)); =20 - uint32_t phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + uint32_t phandle =3D qemu_fdt_alloc_phandle(ms->fdt); nodename =3D g_strdup_printf("/pl061@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(comp= at)); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#gpio-cells", 2); - qemu_fdt_setprop(vms->fdt, nodename, "gpio-controller", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compa= t)); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#gpio-cells", 2); + qemu_fdt_setprop(ms->fdt, nodename, "gpio-controller", NULL, 0); + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle= ); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", phandle); =20 gpio_key_dev =3D sysbus_create_simple("gpio-key", -1, qdev_get_gpio_in(pl061_dev, 3)); - qemu_fdt_add_subnode(vms->fdt, "/gpio-keys"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-keys", "compatible", "gpio-ke= ys"); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#size-cells", 0); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#address-cells", 1); + qemu_fdt_add_subnode(ms->fdt, "/gpio-keys"); + qemu_fdt_setprop_string(ms->fdt, "/gpio-keys", "compatible", "gpio-key= s"); + qemu_fdt_setprop_cell(ms->fdt, "/gpio-keys", "#size-cells", 0); + qemu_fdt_setprop_cell(ms->fdt, "/gpio-keys", "#address-cells", 1); =20 - qemu_fdt_add_subnode(vms->fdt, "/gpio-keys/poweroff"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-keys/poweroff", + qemu_fdt_add_subnode(ms->fdt, "/gpio-keys/poweroff"); + qemu_fdt_setprop_string(ms->fdt, "/gpio-keys/poweroff", "label", "GPIO Key Poweroff"); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys/poweroff", "linux,code", + qemu_fdt_setprop_cell(ms->fdt, "/gpio-keys/poweroff", "linux,code", KEY_POWER); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-keys/poweroff", + qemu_fdt_setprop_cells(ms->fdt, "/gpio-keys/poweroff", "gpios", phandle, 3, 0); g_free(nodename); } @@ -867,6 +875,7 @@ static void create_virtio_devices(const VirtMachineStat= e *vms) { int i; hwaddr size =3D vms->memmap[VIRT_MMIO].size; + MachineState *ms =3D MACHINE(vms); =20 /* We create the transports in forwards order. Since qbus_realize() * prepends (not appends) new child buses, the incrementing loop below= will @@ -916,15 +925,15 @@ static void create_virtio_devices(const VirtMachineSt= ate *vms) hwaddr base =3D vms->memmap[VIRT_MMIO].base + i * size; =20 nodename =3D g_strdup_printf("/virtio_mmio@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "virtio,mmio"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); } } @@ -1005,17 +1014,18 @@ static void virt_flash_fdt(VirtMachineState *vms, { hwaddr flashsize =3D vms->memmap[VIRT_FLASH].size / 2; hwaddr flashbase =3D vms->memmap[VIRT_FLASH].base; + MachineState *ms =3D MACHINE(vms); char *nodename; =20 if (sysmem =3D=3D secure_sysmem) { /* Report both flash devices as a single node in the DT */ nodename =3D g_strdup_printf("/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-fla= sh"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flas= h"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsiz= e); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); g_free(nodename); } else { /* @@ -1023,21 +1033,21 @@ static void virt_flash_fdt(VirtMachineState *vms, * only visible to the secure world. */ nodename =3D g_strdup_printf("/secflash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-fla= sh"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flas= h"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase, 2, flashsize); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay= "); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"= ); g_free(nodename); =20 nodename =3D g_strdup_printf("/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-fla= sh"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flas= h"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase + flashsize, 2, flashsiz= e); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); g_free(nodename); } } @@ -1102,17 +1112,17 @@ static FWCfgState *create_fw_cfg(const VirtMachineS= tate *vms, AddressSpace *as) fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); =20 nodename =3D g_strdup_printf("/fw-cfg@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "qemu,fw-cfg-mmio"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); return fw_cfg; } =20 -static void create_pcie_irq_map(const VirtMachineState *vms, +static void create_pcie_irq_map(const MachineState *ms, uint32_t gic_phandle, int first_irq, const char *nodename) { @@ -1140,10 +1150,10 @@ static void create_pcie_irq_map(const VirtMachineSt= ate *vms, } } =20 - qemu_fdt_setprop(vms->fdt, nodename, "interrupt-map", + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map, sizeof(full_irq_map)); =20 - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupt-map-mask", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask", 0x1800, 0, 0, /* devfn (PCI_SLOT(3)) */ 0x7 /* PCI irq */); } @@ -1159,6 +1169,7 @@ static void create_smmu(const VirtMachineState *vms, hwaddr size =3D vms->memmap[VIRT_SMMU].size; const char irq_names[] =3D "eventq\0priq\0cmdq-sync\0gerror"; DeviceState *dev; + MachineState *ms =3D MACHINE(vms); =20 if (vms->iommu !=3D VIRT_IOMMU_SMMUV3 || !vms->iommu_phandle) { return; @@ -1176,26 +1187,26 @@ static void create_smmu(const VirtMachineState *vms, } =20 node =3D g_strdup_printf("/smmuv3@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, node); - qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", 2, base, 2, size); + qemu_fdt_add_subnode(ms->fdt, node); + qemu_fdt_setprop(ms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, node, "reg", 2, base, 2, size); =20 - qemu_fdt_setprop_cells(vms->fdt, node, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, node, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq , GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 1, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 2, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 3, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); =20 - qemu_fdt_setprop(vms->fdt, node, "interrupt-names", irq_names, + qemu_fdt_setprop(ms->fdt, node, "interrupt-names", irq_names, sizeof(irq_names)); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "clocks", vms->clock_phandle); - qemu_fdt_setprop_string(vms->fdt, node, "clock-names", "apb_pclk"); - qemu_fdt_setprop(vms->fdt, node, "dma-coherent", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, node, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, node, "clock-names", "apb_pclk"); + qemu_fdt_setprop(ms->fdt, node, "dma-coherent", NULL, 0); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(ms->fdt, node, "#iommu-cells", 1); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle); g_free(node); } =20 @@ -1203,22 +1214,23 @@ static void create_virtio_iommu_dt_bindings(VirtMac= hineState *vms) { const char compat[] =3D "virtio,pci-iommu"; uint16_t bdf =3D vms->virtio_iommu_bdf; + MachineState *ms =3D MACHINE(vms); char *node; =20 - vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + vms->iommu_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); =20 node =3D g_strdup_printf("%s/virtio_iommu@%d", vms->pciehb_nodename, b= df); - qemu_fdt_add_subnode(vms->fdt, node); - qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", + qemu_fdt_add_subnode(ms->fdt, node); + qemu_fdt_setprop(ms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, node, "reg", 1, bdf << 8, 1, 0, 1, 0, 1, 0, 1, 0); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); - qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + qemu_fdt_setprop_cell(ms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle); g_free(node); =20 - qemu_fdt_setprop_cells(vms->fdt, vms->pciehb_nodename, "iommu-map", + qemu_fdt_setprop_cells(ms->fdt, vms->pciehb_nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, bdf, bdf + 1, vms->iommu_phandle, bdf + 1, 0xffff - = bdf); } @@ -1243,6 +1255,7 @@ static void create_pcie(VirtMachineState *vms) char *nodename; int i, ecam_id; PCIHostState *pci; + MachineState *ms =3D MACHINE(vms); =20 dev =3D qdev_new(TYPE_GPEX_HOST); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -1302,27 +1315,27 @@ static void create_pcie(VirtMachineState *vms) } =20 nodename =3D vms->pciehb_nodename =3D g_strdup_printf("/pcie@%" PRIx64= , base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "pci-host-ecam-generic"); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "pci"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 3); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 2); - qemu_fdt_setprop_cell(vms->fdt, nodename, "linux,pci-domain", 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "bus-range", 0, + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "pci"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 3); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "linux,pci-domain", 0); + qemu_fdt_setprop_cells(ms->fdt, nodename, "bus-range", 0, nr_pcie_buses - 1); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); =20 if (vms->msi_phandle) { - qemu_fdt_setprop_cells(vms->fdt, nodename, "msi-parent", + qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-parent", vms->msi_phandle); } =20 - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base_ecam, 2, size_ecam); =20 if (vms->highmem) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "ranges", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, @@ -1331,23 +1344,23 @@ static void create_pcie(VirtMachineState *vms) 2, base_mmio_high, 2, base_mmio_high, 2, size_mmio_high); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "ranges", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, 2, base_mmio, 2, size_mmio); } =20 - qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 1); - create_pcie_irq_map(vms, vms->gic_phandle, irq, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1); + create_pcie_irq_map(ms, vms->gic_phandle, irq, nodename); =20 if (vms->iommu) { - vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + vms->iommu_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); =20 switch (vms->iommu) { case VIRT_IOMMU_SMMUV3: create_smmu(vms, pci->bus); - qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", + qemu_fdt_setprop_cells(ms->fdt, nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, 0x10000); break; default: @@ -1399,17 +1412,18 @@ static void create_secure_ram(VirtMachineState *vms, char *nodename; hwaddr base =3D vms->memmap[VIRT_SECURE_MEM].base; hwaddr size =3D vms->memmap[VIRT_SECURE_MEM].size; + MachineState *ms =3D MACHINE(vms); =20 memory_region_init_ram(secram, NULL, "virt.secure-ram", size, &error_fatal); memory_region_add_subregion(secure_sysmem, base, secram); =20 nodename =3D g_strdup_printf("/secram@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "memory"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", 2, base, 2, si= ze); - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, siz= e); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); =20 if (secure_tag_sysmem) { create_tag_ram(secure_tag_sysmem, base, size, "mach-virt.secure-ta= g"); @@ -1422,9 +1436,11 @@ static void *machvirt_dtb(const struct arm_boot_info= *binfo, int *fdt_size) { const VirtMachineState *board =3D container_of(binfo, VirtMachineState, bootinfo); + MachineState *ms =3D MACHINE(board); + =20 *fdt_size =3D board->fdt_size; - return board->fdt; + return ms->fdt; } =20 static void virt_build_smbios(VirtMachineState *vms) @@ -1472,7 +1488,7 @@ void virt_machine_done(Notifier *notifier, void *data) * while qemu takes charge of the qom stuff. */ if (info->dtb_filename =3D=3D NULL) { - platform_bus_add_all_fdt_nodes(vms->fdt, "/intc", + platform_bus_add_all_fdt_nodes(ms->fdt, "/intc", vms->memmap[VIRT_PLATFORM_BUS].base, vms->memmap[VIRT_PLATFORM_BUS].size, vms->irqmap[VIRT_PLATFORM_BUS]); --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1604599110; cv=none; d=zohomail.com; s=zohoarc; b=m0mafnhg00758hZCwqGPy+ES5nei1+e8JvPVot4kG1dPbzmsORb4iM+xRrc5hO/z7hAjZLnmcqQNLSvG1W+TMZBFowkmmm3Eq0xyT2NWhMZcZSnFCM05Dlss/VQppihemBEdSGPt861oGtwnueSui6oe83+SvrcSWVtg0WViQbE= ARC-Message-Signature: i=1; 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Thu, 05 Nov 2020 09:52:01 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 02/15] hw/riscv: migrate fdt field to generic MachineState Date: Thu, 5 Nov 2020 17:51:40 +0000 Message-Id: <20201105175153.30489-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, Sagar Karandikar , masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, Alistair Francis , Bastian Koppelmann , Palmer Dabbelt , stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , "open list:RISC-V TCG CPUs" , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is a mechanical change to make the fdt available through MachineState. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Message-Id: <20201021170842.25762-3-alex.bennee@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/riscv/virt.h | 1 - hw/riscv/virt.c | 20 ++++++++++---------- 2 files changed, 10 insertions(+), 11 deletions(-) diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index b4ed9a32eb..6505ae8d23 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -41,7 +41,6 @@ struct RISCVVirtState { DeviceState *plic[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; =20 - void *fdt; int fdt_size; }; =20 diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 25cea7aa67..377400e02a 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -197,14 +197,14 @@ static void create_fdt(RISCVVirtState *s, const struc= t MemmapEntry *memmap, =20 dtb_filename =3D qemu_opt_get(qemu_get_machine_opts(), "dtb"); if (dtb_filename) { - fdt =3D s->fdt =3D load_device_tree(dtb_filename, &s->fdt_size); + fdt =3D mc->fdt =3D load_device_tree(dtb_filename, &s->fdt_size); if (!fdt) { error_report("load_device_tree() failed"); exit(1); } goto update_bootargs; } else { - fdt =3D s->fdt =3D create_device_tree(&s->fdt_size); + fdt =3D mc->fdt =3D create_device_tree(&s->fdt_size); if (!fdt) { error_report("create_device_tree() failed"); exit(1); @@ -442,12 +442,12 @@ static void create_fdt(RISCVVirtState *s, const struc= t MemmapEntry *memmap, g_free(name); =20 name =3D g_strdup_printf("/soc/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(s->fdt, name); - qemu_fdt_setprop_string(s->fdt, name, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + qemu_fdt_add_subnode(mc->fdt, name); + qemu_fdt_setprop_string(mc->fdt, name, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(mc->fdt, name, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsize); - qemu_fdt_setprop_cell(s->fdt, name, "bank-width", 4); + qemu_fdt_setprop_cell(mc->fdt, name, "bank-width", 4); g_free(name); =20 update_bootargs: @@ -631,9 +631,9 @@ static void virt_machine_init(MachineState *machine) hwaddr end =3D riscv_load_initrd(machine->initrd_filename, machine->ram_size, kernel_entry, &start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-start", start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", end); } } else { @@ -654,11 +654,11 @@ static void virt_machine_init(MachineState *machine) =20 /* Compute the fdt load address in dram */ fdt_load_addr =3D riscv_load_fdt(memmap[VIRT_DRAM].base, - machine->ram_size, s->fdt); + machine->ram_size, machine->fdt); /* load the reset vector */ riscv_setup_rom_reset_vec(start_addr, virt_memmap[VIRT_MROM].base, virt_memmap[VIRT_MROM].size, kernel_entry, - fdt_load_addr, s->fdt); + fdt_load_addr, machine->fdt); =20 /* SiFive Test MMIO device */ sifive_test_create(memmap[VIRT_TEST].base); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, Alistair Francis , David Gibson , stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) A string array in device tree is simply a series of \0 terminated strings next to each other. As libfdt doesn't support that directly we need to build it ourselves. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Message-Id: <20201021170842.25762-4-alex.bennee@linaro.org> Signed-off-by: Alex Benn=C3=A9e --- include/sysemu/device_tree.h | 17 +++++++++++++++++ softmmu/device_tree.c | 26 ++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index 982c89345f..8a2fe55622 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -70,6 +70,23 @@ int qemu_fdt_setprop_u64(void *fdt, const char *node_pat= h, const char *property, uint64_t val); int qemu_fdt_setprop_string(void *fdt, const char *node_path, const char *property, const char *string); + +/** + * qemu_fdt_setprop_string_array: set a string array property + * + * @fdt: pointer to the dt blob + * @name: node name + * @prop: property array + * @array: pointer to an array of string pointers + * @len: length of array + * + * assigns a string array to a property. This function converts and + * array of strings to a sequential string with \0 separators before + * setting the property. + */ +int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, + const char *prop, char **array, int len); + int qemu_fdt_setprop_phandle(void *fdt, const char *node_path, const char *property, const char *target_node_path); diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c index b335dae707..a19873316a 100644 --- a/softmmu/device_tree.c +++ b/softmmu/device_tree.c @@ -21,6 +21,7 @@ #include "qemu/error-report.h" #include "qemu/option.h" #include "qemu/bswap.h" +#include "qemu/cutils.h" #include "sysemu/device_tree.h" #include "sysemu/sysemu.h" #include "hw/loader.h" @@ -397,6 +398,31 @@ int qemu_fdt_setprop_string(void *fdt, const char *nod= e_path, return r; } =20 +/* + * libfdt doesn't allow us to add string arrays directly but they are + * test a series of null terminated strings with a length. We build + * the string up here so we can calculate the final length. + */ +int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, const = char *prop, + char **array, int len) +{ + int ret, i, total_len =3D 0; + char *str, *p; + for (i =3D 0; i < len; i++) { + total_len +=3D strlen(array[i]) + 1; + } + p =3D str =3D g_malloc0(total_len); + for (i =3D 0; i < len; i++) { + int len =3D strlen(array[i]) + 1; + pstrcpy(p, len, array[i]); + p +=3D len; + } + + ret =3D qemu_fdt_setprop(fdt, node_path, prop, str, total_len); + g_free(str); + return ret; +} + const void *qemu_fdt_getprop(void *fdt, const char *node_path, const char *property, int *lenp, Error **errp) { --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Hypervisors, especially type-1 ones, need the firmware/bootcode to put their initial guest somewhere in memory and pass the information to it via platform data. The guest-loader is modelled after the generic loader for exactly this sort of purpose: $QEMU $ARGS -kernel ~/xen.git/xen/xen \ -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \ -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"root= =3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \ -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio Signed-off-by: Alex Benn=C3=A9e Message-Id: <20201021170842.25762-5-alex.bennee@linaro.org> Signed-off-by: Alex Benn=C3=A9e --- hw/core/guest-loader.h | 34 ++++++++++ hw/core/guest-loader.c | 140 +++++++++++++++++++++++++++++++++++++++++ hw/core/meson.build | 2 + 3 files changed, 176 insertions(+) create mode 100644 hw/core/guest-loader.h create mode 100644 hw/core/guest-loader.c diff --git a/hw/core/guest-loader.h b/hw/core/guest-loader.h new file mode 100644 index 0000000000..07f4b4884b --- /dev/null +++ b/hw/core/guest-loader.h @@ -0,0 +1,34 @@ +/* + * Guest Loader + * + * Copyright (C) 2020 Linaro + * Written by Alex Benn=C3=A9e + * (based on the generic-loader by Li Guang ) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#ifndef GUEST_LOADER_H +#define GUEST_LOADER_H + +#include "hw/qdev-core.h" +#include "qom/object.h" + +struct GuestLoaderState { + /* */ + DeviceState parent_obj; + + /* */ + uint64_t addr; + char *kernel; + char *args; + char *initrd; +}; + +#define TYPE_GUEST_LOADER "guest-loader" +OBJECT_DECLARE_SIMPLE_TYPE(GuestLoaderState, GUEST_LOADER) + +#endif diff --git a/hw/core/guest-loader.c b/hw/core/guest-loader.c new file mode 100644 index 0000000000..1ce39842be --- /dev/null +++ b/hw/core/guest-loader.c @@ -0,0 +1,140 @@ +/* + * Guest Loader + * + * Copyright (C) 2020 Linaro + * Written by Alex Benn=C3=A9e + * (based on the generic-loader by Li Guang ) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +/* + * Much like the generic-loader this is treated as a special device + * inside QEMU. However unlike the generic-loader this device is used + * to load guest images for hypervisors. As part of that process the + * hypervisor needs to have platform information passed to it by the + * lower levels of the stack (e.g. firmware/bootloader). If you boot + * the hypervisor directly you use the guest-loader to load the Dom0 + * or equivalent guest images in the right place in the same way a + * boot loader would. + * + * This is only relevant for full system emulation. + */ + +#include "qemu/osdep.h" +#include "hw/core/cpu.h" +#include "hw/sysbus.h" +#include "sysemu/dma.h" +#include "hw/loader.h" +#include "hw/qdev-properties.h" +#include "qapi/error.h" +#include "qemu/module.h" +#include "guest-loader.h" +#include "sysemu/device_tree.h" +#include "hw/boards.h" + +/* + * Insert some FDT nodes for the loaded blob. + */ +static void loader_insert_platform_data(GuestLoaderState *s, int size, Err= or **errp) +{ + MachineState *machine =3D MACHINE(qdev_get_machine()); + void *fdt =3D machine->fdt; + g_autofree char *node =3D g_strdup_printf("/chosen/module@%#08lx", s->= addr); + uint64_t reg_attr[2] =3D {cpu_to_be64(s->addr), cpu_to_be64(size)}; + + if (!fdt) { + error_setg(errp, "Cannot modify FDT fields if the machine has none= "); + return; + } + + qemu_fdt_add_subnode(fdt, node); + qemu_fdt_setprop(fdt, node, "reg", ®_attr, sizeof(reg_attr)); + + if (s->kernel) { + const char *compat[2] =3D { "multiboot,module", "multiboot,kernel"= }; + if (qemu_fdt_setprop_string_array + (fdt, node, "compatible", (char **) &compat, ARRAY_SIZE(compat= )) < 0) { + error_setg(errp, "couldn't set %s/compatible", node); + return; + } + if (s->args) { + if (qemu_fdt_setprop_string(fdt, node, "bootargs", s->args) < = 0) { + error_setg(errp, "couldn't set %s/bootargs", node); + } + } + } else if (s->initrd) { + const char * compat[2] =3D { "multiboot,module", "multiboot,ramdis= k" }; + if (qemu_fdt_setprop_string_array + (fdt, node, "compatible", (char **) &compat, ARRAY_SIZE(compat= )) < 0) { + error_setg(errp, "couldn't set %s/compatible", node); + return; + } + } +} + +static void guest_loader_realize(DeviceState *dev, Error **errp) +{ + GuestLoaderState *s =3D GUEST_LOADER(dev); + char *file =3D s->kernel ? s->kernel : s->initrd; + int size =3D 0; + + /* Perform some error checking on the user's options */ + if (s->kernel && s->initrd) { + error_setg(errp, "Cannot specify a kernel and initrd in the same s= tanza"); + return; + } else if (!s->kernel && !s->initrd) { + error_setg(errp, "Need to specify a kernel or initrd image"); + return; + } else if (!s->addr) { + error_setg(errp, "Need to specify the address of guest blob"); + return; + } else if (s->args && !s->kernel) { + error_setg(errp, "Boot args only relevant to kernel blobs"); + } + + /* Default to the maximum size being the machine's ram size */ + size =3D load_image_targphys_as(file, s->addr, ram_size, NULL); + if (size < 0) { + error_setg(errp, "Cannot load specified image %s", file); + return; + } + + /* Now the image is loaded we need to update the platform data */ + loader_insert_platform_data(s, size, errp); +} + +static Property guest_loader_props[] =3D { + DEFINE_PROP_UINT64("addr", GuestLoaderState, addr, 0), + DEFINE_PROP_STRING("kernel", GuestLoaderState, kernel), + DEFINE_PROP_STRING("bootargs", GuestLoaderState, args), + DEFINE_PROP_STRING("initrd", GuestLoaderState, initrd), + DEFINE_PROP_END_OF_LIST(), +}; + +static void guest_loader_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D guest_loader_realize; + device_class_set_props(dc, guest_loader_props); + dc->desc =3D "Guest Loader"; + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static TypeInfo guest_loader_info =3D { + .name =3D TYPE_GUEST_LOADER, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(GuestLoaderState), + .class_init =3D guest_loader_class_init, +}; + +static void guest_loader_register_type(void) +{ + type_register_static(&guest_loader_info); +} + +type_init(guest_loader_register_type) diff --git a/hw/core/meson.build b/hw/core/meson.build index 4a744f3b5e..27a69fc578 100644 --- a/hw/core/meson.build +++ b/hw/core/meson.build @@ -37,6 +37,8 @@ softmmu_ss.add(files( 'clock-vmstate.c', )) =20 +softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('guest-loader.c')) + specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: files( 'machine-qmp-cmds.c', 'numa.c', --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7OQVV+4dDAK9BrsulGq6EIUpoaeySsacRv+eB9jEMfg=; b=chfS2wxdTKiB/VQVq52oeBtHUasXOZfxuJgbGH/IxvuL/cmVwpaJ5vZJs2vniBdwJ0 8QN3HQsdmMlxjU5ZtS3LWQtqaHBDGlgMi/HELkycl1Ngi8T3mPs0QLpgu78o5m7dbx/5 ycLufmzQ8mDCjiM5V4o62LW1/tU+6haFvunpkW1OZ0IIrfNa0eHU5Iitnm7py8PKkDFd bfawuvsurUQdG+/JH5vPug0srFMKHvPrqOsDbGsp0QqiuuQUv6/vvuqB778FLAjaZ9eM lcZAWfafd55cAmpQVz6CZSCPmE4PImWtsOLB61QgZbzw4bNer4zMA9p82v3YcWg0WsOW q02g== X-Gm-Message-State: AOAM533ZjY+oUJ40WDOnPnDIifxEC2ZI91wlPzc2uyIFmIEaC3QE7Rgm jMSQthGaZvM/EuL5tUdLPb/pTQ== X-Google-Smtp-Source: ABdhPJxrAHuCe6VDInEX4wLfPxKjiJZjj04n2QThFEG8TF8xsbjOQ1z7jMzDxi2NwMGvljwRkdQemg== X-Received: by 2002:a05:600c:210:: with SMTP id 16mr3909151wmi.122.1604598731412; Thu, 05 Nov 2020 09:52:11 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 05/15] docs: move generic-loader documentation into the main manual Date: Thu, 5 Nov 2020 17:51:43 +0000 Message-Id: <20201105175153.30489-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We might as well surface this useful information in the manual so users can find it easily. It is a fairly simple conversion to rst with the only textual fixes being QemuOps to QemuOpts. Signed-off-by: Alex Benn=C3=A9e --- docs/generic-loader.txt | 92 -------------------------- docs/system/generic-loader.rst | 117 +++++++++++++++++++++++++++++++++ docs/system/index.rst | 1 + 3 files changed, 118 insertions(+), 92 deletions(-) delete mode 100644 docs/generic-loader.txt create mode 100644 docs/system/generic-loader.rst diff --git a/docs/generic-loader.txt b/docs/generic-loader.txt deleted file mode 100644 index a9603a2af7..0000000000 --- a/docs/generic-loader.txt +++ /dev/null @@ -1,92 +0,0 @@ -Copyright (c) 2016 Xilinx Inc. - -This work is licensed under the terms of the GNU GPL, version 2 or later. = See -the COPYING file in the top-level directory. - - -The 'loader' device allows the user to load multiple images or values into -QEMU at startup. - -Loading Data into Memory Values -------------------------------- -The loader device allows memory values to be set from the command line. Th= is -can be done by following the syntax below: - - -device loader,addr=3D,data=3D,data-len=3D - [,data-be=3D][,cpu-num=3D] - - - The address to store the data in. - - The value to be written to the address. The maximum size= of - the data is 8 bytes. - - The length of the data in bytes. This argument must be - included if the data argument is. - - Set to true if the data to be stored on the guest should= be - written as big endian data. The default is to write litt= le - endian data. - - The number of the CPU's address space where the data sho= uld - be loaded. If not specified the address space of the fir= st - CPU is used. - -All values are parsed using the standard QemuOps parsing. This allows the = user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the nu= mber -with a '0x'. - -An example of loading value 0x8000000e to address 0xfd1a0104 is: - -device loader,addr=3D0xfd1a0104,data=3D0x8000000e,data-len=3D4 - -Setting a CPU's Program Counter -------------------------------- -The loader device allows the CPU's PC to be set from the command line. This -can be done by following the syntax below: - - -device loader,addr=3D,cpu-num=3D - - - The value to use as the CPU's PC. - - The number of the CPU whose PC should be set to the - specified value. - -All values are parsed using the standard QemuOps parsing. This allows the = user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the nu= mber -with a '0x'. - -An example of setting CPU 0's PC to 0x8000 is: - -device loader,addr=3D0x8000,cpu-num=3D0 - -Loading Files -------------- -The loader device also allows files to be loaded into memory. It can load = ELF, -U-Boot, and Intel HEX executable formats as well as raw images. The synta= x is -shown below: - - -device loader,file=3D[,addr=3D][,cpu-num=3D][,fo= rce-raw=3D] - - - A file to be loaded into memory - - The memory address where the file should be loaded. This= is - required for raw images and ignored for non-raw files. - - This specifies the CPU that should be used. This is an - optional argument and will cause the CPU's PC to be set = to - the memory address where the raw file is loaded or the e= ntry - point specified in the executable format header. This op= tion - should only be used for the boot image. - This will also cause the image to be written to the spec= ified - CPU's address space. If not specified, the default is CP= U 0. - - Setting force-raw=3Don forces the file to be treated as = a raw - image. This can be used to load supported executable fo= rmats - as if they were raw. - -All values are parsed using the standard QemuOps parsing. This allows the = user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the nu= mber -with a '0x'. - -An example of loading an ELF file which CPU0 will boot is shown below: - -device loader,file=3D./images/boot.elf,cpu-num=3D0 - -Restrictions and ToDos ----------------------- - - At the moment it is just assumed that if you specify a cpu-num then you - want to set the PC as well. This might not always be the case. In future - the internal state 'set_pc' (which exists in the generic loader now) sh= ould - be exposed to the user so that they can choose if the PC is set or not. diff --git a/docs/system/generic-loader.rst b/docs/system/generic-loader.rst new file mode 100644 index 0000000000..59f28d1230 --- /dev/null +++ b/docs/system/generic-loader.rst @@ -0,0 +1,117 @@ +.. + Copyright (c) 2016, Xilinx Inc. + +This work is licensed under the terms of the GNU GPL, version 2 or later. = See +the COPYING file in the top-level directory. + +Generic Loader +-------------- + +The 'loader' device allows the user to load multiple images or values into +QEMU at startup. + +Loading Data into Memory Values +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +The loader device allows memory values to be set from the command line. Th= is +can be done by following the syntax below:: + + -device loader,addr=3D,data=3D,data-len=3D \ + [,data-be=3D][,cpu-num=3D] + +```` + The address to store the data in. + +```` + The value to be written to the address. The maximum size of the data + is 8 bytes. + +```` + The length of the data in bytes. This argument must be included if + the data argument is. + +```` + Set to true if the data to be stored on the guest should be written + as big endian data. The default is to write little endian data. + +```` + The number of the CPU's address space where the data should be + loaded. If not specified the address space of the first CPU is used. + +All values are parsed using the standard QemuOps parsing. This allows the = user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the nu= mber +with a '0x'. + +An example of loading value 0x8000000e to address 0xfd1a0104 is:: + + -device loader,addr=3D0xfd1a0104,data=3D0x8000000e,data-len=3D4 + +Setting a CPU's Program Counter +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The loader device allows the CPU's PC to be set from the command line. This +can be done by following the syntax below:: + + -device loader,addr=3D,cpu-num=3D + +```` + The value to use as the CPU's PC. + +```` + The number of the CPU whose PC should be set to the specified value. + +All values are parsed using the standard QemuOpts parsing. This allows the= user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the nu= mber +with a '0x'. + +An example of setting CPU 0's PC to 0x8000 is:: + + -device loader,addr=3D0x8000,cpu-num=3D0 + +Loading Files +^^^^^^^^^^^^^ + +The loader device also allows files to be loaded into memory. It can load = ELF, +U-Boot, and Intel HEX executable formats as well as raw images. The synta= x is +shown below: + + -device loader,file=3D[,addr=3D][,cpu-num=3D][,fo= rce-raw=3D] + +```` + A file to be loaded into memory + +```` + The memory address where the file should be loaded. This is required + for raw images and ignored for non-raw files. + =20 +```` + This specifies the CPU that should be used. This is an + optional argument and will cause the CPU's PC to be set to the + memory address where the raw file is loaded or the entry point + specified in the executable format header. This option should only + be used for the boot image. This will also cause the image to be + written to the specified CPU's address space. If not specified, the + default is CPU 0. - Setting force-raw=3Don forces the file + to be treated as a raw image. This can be used to load supported + executable formats as if they were raw. + +All values are parsed using the standard QemuOpts parsing. This allows the= user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the nu= mber +with a '0x'. + +An example of loading an ELF file which CPU0 will boot is shown below:: + + -device loader,file=3D./images/boot.elf,cpu-num=3D0 + +Restrictions and ToDos +^^^^^^^^^^^^^^^^^^^^^^ + +At the moment it is just assumed that if you specify a cpu-num then +you want to set the PC as well. This might not always be the case. In +future the internal state 'set_pc' (which exists in the generic loader +now) should be exposed to the user so that they can choose if the PC +is set or not. + + diff --git a/docs/system/index.rst b/docs/system/index.rst index c0f685b818..3cff0ca98f 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -24,6 +24,7 @@ Contents: usb ivshmem linuxboot + generic-loader vnc-security tls gdb --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1604599128; cv=none; d=zohomail.com; s=zohoarc; b=aRdDqV8LkqoD5/mOljW6z3V0kQeCNp+4JbkXBX19QXAI1HqyF19AoMi98wXk+o0Soc+9dMAWJFxpVIFMZgNw8qR+kPEXRY5RRld+uE/tntrn1vjuam/2seAuS7x1Iba2AiQ0wN9qLrr/OUn6MAc9pWP+w1Od6chMJtRIc18V5Bo= ARC-Message-Signature: i=1; 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Thu, 05 Nov 2020 09:52:09 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 06/15] docs: add some documentation for the guest-loader Date: Thu, 5 Nov 2020 17:51:44 +0000 Message-Id: <20201105175153.30489-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis --- docs/system/guest-loader.rst | 54 ++++++++++++++++++++++++++++++++++++ docs/system/index.rst | 1 + 2 files changed, 55 insertions(+) create mode 100644 docs/system/guest-loader.rst diff --git a/docs/system/guest-loader.rst b/docs/system/guest-loader.rst new file mode 100644 index 0000000000..37d03cbd89 --- /dev/null +++ b/docs/system/guest-loader.rst @@ -0,0 +1,54 @@ +.. + Copyright (c) 2020, Linaro + +Guest Loader +------------ + +The guest loader is similar to the `generic-loader` although it is +aimed at a particular use case of loading hypervisor guests. This is +useful for debugging hypervisors without having to jump through the +hoops of firmware and boot-loaders. + +The guest loader does two things: + + - load blobs (kernels and initial ram disks) into memory + - sets platform FDT data so hypervisors can find and boot them + +This is what is typically done by a boot-loader like grub using it's +multi-boot capability. A typical example would look like: + +.. parsed-literal:: + + |qemu_system| -kernel ~/xen.git/xen/xen \ + -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \ + -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"root= =3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \ + -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio + +In the above example the Xen hypervisor is loaded by the -kernel +parameter and passed it's boot arguments via -append. The Dom0 guest +is loaded into the areas of memory. Each blob will get +`/chosen/module@` entry in the FDT to indicate it's location and +size. Additional information can be passed with by using additional +arguments. + +Currently the only supported machines which use FDT data to boot are +the ARM and RiscV `virt` machines. + +Arguments +^^^^^^^^^ + +The full syntax of the guest-loader is:: + + -device guest-loader,addr=3D[,kernel=3D,[bootargs=3D]]= [,initrd=3D] + +``addr=3D`` + This is mandatory and indicates the start address of the blob. + +``kernel|initrd=3D`` + Indicates the filename of the kernel or initrd blob. Both blobs will + have the "multiboot,module" compatibility string as well as + "multiboot,kernel" or "multiboot,ramdisk" as appropriate. + +``bootargs=3D`` + This is an optional field for kernel blobs which will pass command + like via the `/chosen/module@/bootargs` node. diff --git a/docs/system/index.rst b/docs/system/index.rst index 3cff0ca98f..b5cfe8ee93 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -25,6 +25,7 @@ Contents: ivshmem linuxboot generic-loader + guest-loader vnc-security tls gdb --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1604599768; cv=none; d=zohomail.com; s=zohoarc; b=EbpsSfhKa70od7HbtKOHgft3r9W5aBlujTGgdayf0QlO7BPxv0SKLHT9rR2reLWw68TQ6QMpybiuOOpi52OL6DIARNG4IO4w42fSpv++1f5W4SjxTJkYgYVdJBhL7Wa9yuI9dbZuq8yK967ZNM9iAo/p53cQx6l3RdD5+krr/qE= ARC-Message-Signature: i=1; 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Thu, 05 Nov 2020 09:52:24 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 07/15] accel/meson: you only need accelerator stubs for softmmu builds Date: Thu, 5 Nov 2020 17:51:45 +0000 Message-Id: <20201105175153.30489-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This avoids us pulling in Xen headers we don't need. The TCG accelerator will always exist for the *-user builds. Signed-off-by: Alex Benn=C3=A9e --- accel/meson.build | 4 +++- accel/stubs/meson.build | 12 ++++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/accel/meson.build b/accel/meson.build index b26cca227a..c4936698cd 100644 --- a/accel/meson.build +++ b/accel/meson.build @@ -4,7 +4,9 @@ subdir('qtest') subdir('kvm') subdir('tcg') subdir('xen') -subdir('stubs') +if have_system + subdir('stubs') +endif =20 dummy_ss =3D ss.source_set() dummy_ss.add(files( diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build index 12dd1539af..d65cb6a5e1 100644 --- a/accel/stubs/meson.build +++ b/accel/stubs/meson.build @@ -1,4 +1,8 @@ -specific_ss.add(when: 'CONFIG_HAX', if_false: files('hax-stub.c')) -specific_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c')) -specific_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c')) -specific_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c')) +softmmu_stub_ss =3D ss.source_set() + +softmmu_stub_ss.add(when: 'CONFIG_HAX', if_false: files('hax-stub.c')) +softmmu_stub_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c')) +softmmu_stub_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c')) +softmmu_stub_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c')) + +specific_ss.add_all(when: 'CONFIG_SOFTMMU', if_true: softmmu_stub_ss) --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , julien@xen.org, masami.hiramatsu@linaro.org, Paul Durrant , andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, Anthony Perard , Paolo Bonzini , stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Xen is supported on ARM although weirdly using the i386-softmmu model. Checking based on the host CPU meant we never enabled Xen support. It would be nice to enable CONFIG_XEN for aarch64-softmmu to make it not seem weird but that will require further build surgery. Suggested-by: Paolo Bonzini Signed-off-by: Alex Benn=C3=A9e Cc: Masami Hiramatsu Cc: Stefano Stabellini Cc: Anthony Perard Cc: Paul Durrant Fixes: 8a19980e3f ("configure: move accelerator logic to meson") Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index f5175010df..58e95227ea 100644 --- a/meson.build +++ b/meson.build @@ -74,10 +74,15 @@ else endif =20 accelerator_targets =3D { 'CONFIG_KVM': kvm_targets } +if cpu in ['x86', 'x86_64', 'arm', 'aarch64'] + # i368 emulator provides xenpv machine type for multiple architectures + accelerator_targets +=3D { + 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu'], + } +endif if cpu in ['x86', 'x86_64'] accelerator_targets +=3D { 'CONFIG_HAX': ['i386-softmmu', 'x86_64-softmmu'], - 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu'], 'CONFIG_HVF': ['x86_64-softmmu'], 'CONFIG_WHPX': ['i386-softmmu', 'x86_64-softmmu'], } --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, Paolo Bonzini , stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) While Xen traditionally uses i386-softmmu to run it's PV models on all architectures some models are very much x86 only. This includes the full hardware virtualisation (HVM) which is only used on x86 HW. By introducing the symbol we can also fix the inclusion of XEN_PCI_PASSTHROUGH which should only be built for x86 (and Linux) systems. Suggested-by: Paolo Bonzini Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 6 +++++- accel/Kconfig | 3 +++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 58e95227ea..46e4c2fc3a 100644 --- a/meson.build +++ b/meson.build @@ -83,6 +83,7 @@ endif if cpu in ['x86', 'x86_64'] accelerator_targets +=3D { 'CONFIG_HAX': ['i386-softmmu', 'x86_64-softmmu'], + 'CONFIG_XEN_HVM': ['i386-softmmu', 'x86_64-softmmu'], 'CONFIG_HVF': ['x86_64-softmmu'], 'CONFIG_WHPX': ['i386-softmmu', 'x86_64-softmmu'], } @@ -204,6 +205,9 @@ if not get_option('kvm').disabled() and targetos =3D=3D= 'linux' endif if not get_option('xen').disabled() and 'CONFIG_XEN_BACKEND' in config_host accelerators +=3D 'CONFIG_XEN' + if host_machine.cpu() =3D=3D 'x86_64' + accelerators +=3D 'CONFIG_XEN_HVM' + endif have_xen_pci_passthrough =3D not get_option('xen_pci_passthrough').disab= led() and targetos =3D=3D 'linux' else have_xen_pci_passthrough =3D false @@ -916,7 +920,7 @@ foreach target : target_dirs if sym =3D=3D 'CONFIG_TCG' or target in accelerator_targets.get(sym, [= ]) config_target +=3D { sym: 'y' } config_all +=3D { sym: 'y' } - if sym =3D=3D 'CONFIG_XEN' and have_xen_pci_passthrough + if sym =3D=3D 'CONFIG_XEN_HVM' and have_xen_pci_passthrough config_target +=3D { 'CONFIG_XEN_PCI_PASSTHROUGH': 'y' } endif have_accel =3D true diff --git a/accel/Kconfig b/accel/Kconfig index 2ad94a3839..4cd54029bd 100644 --- a/accel/Kconfig +++ b/accel/Kconfig @@ -7,3 +7,6 @@ config KVM config XEN bool select FSDEV_9P if VIRTFS + +config XEN_HVM + bool --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Report XEN support along with the rest of the accelerators. Repurposed the existing Xen support line to display details about the control API version and the additional enabled features. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 46e4c2fc3a..79b74fbda7 100644 --- a/meson.build +++ b/meson.build @@ -2078,8 +2078,15 @@ if vnc.found() summary_info +=3D {'VNC JPEG support': jpeg.found()} summary_info +=3D {'VNC PNG support': png.found()} endif -summary_info +=3D {'xen support': config_host.has_key('CONFIG_XEN_BA= CKEND')} if config_host.has_key('CONFIG_XEN_BACKEND') + xen_features =3D ['backend'] + if config_all.has_key('CONFIG_XEN_HVM') + xen_features +=3D 'HVM' + endif + if config_all.has_key('CONFIG_XEN_PCI_PASSTHROUGH') + xen_features +=3D 'PCI Passthrough' + endif + summary_info +=3D {'xen features': ' '.join(xen_features)} summary_info +=3D {'xen ctrl version': config_host['CONFIG_XEN_CTRL_INT= ERFACE_VERSION']} endif summary_info +=3D {'brlapi support': config_host.has_key('CONFIG_BRLAPI= ')} @@ -2092,6 +2099,7 @@ summary_info +=3D {'Linux io_uring support': config_h= ost.has_key('CONFIG_LINUX_IO_ summary_info +=3D {'ATTR/XATTR support': config_host.has_key('CONFIG_ATTR'= )} summary_info +=3D {'Install blobs': get_option('install_blobs')} summary_info +=3D {'KVM support': config_all.has_key('CONFIG_KVM')} +summary_info +=3D {'XEN support': config_all.has_key('CONFIG_XEN')} summary_info +=3D {'HAX support': config_all.has_key('CONFIG_HAX')} summary_info +=3D {'HVF support': config_all.has_key('CONFIG_HVF')} summary_info +=3D {'WHPX support': config_all.has_key('CONFIG_WHPX')} --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Thu, 05 Nov 2020 09:58:30 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: julien@xen.org, stefano.stabellini@linaro.org, stefano.stabellini@xilinx.com, masami.hiramatsu@linaro.org, takahiro.akashi@linaro.org, andre.przywara@arm.com, stratos-dev@op-lists.linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Stefano Stabellini , Anthony Perard , Paul Durrant , xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [RFC PATCH 11/15] include/hw/xen.h: drop superfluous struct Date: Thu, 5 Nov 2020 17:51:49 +0000 Message-Id: <20201105175153.30489-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @linaro.org) Chardev is already a typedef'ed struct. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/xen/xen.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h index 1406648ca5..0f9962b1c1 100644 --- a/include/hw/xen/xen.h +++ b/include/hw/xen/xen.h @@ -28,7 +28,7 @@ int xen_is_pirq_msi(uint32_t msi_data); =20 qemu_irq *xen_interrupt_controller_init(void); =20 -void xenstore_store_pv_console_info(int i, struct Chardev *chr); +void xenstore_store_pv_console_info(int i, Chardev *chr); =20 void xen_register_framebuffer(struct MemoryRegion *mr); =20 --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @linaro.org) We should never build something that calls this without having it. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- stubs/xen-hw-stub.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/stubs/xen-hw-stub.c b/stubs/xen-hw-stub.c index 2ea8190921..15f3921a76 100644 --- a/stubs/xen-hw-stub.c +++ b/stubs/xen-hw-stub.c @@ -10,10 +10,6 @@ #include "hw/xen/xen.h" #include "hw/xen/xen-x86.h" =20 -void xenstore_store_pv_console_info(int i, Chardev *chr) -{ -} - int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) { return -1; --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1604599869; cv=none; d=zohomail.com; s=zohoarc; b=jDcVfOLWbhPYLPlAghJNuNFr4KzuI3RyX6Sh5RkRxYyI7xwIlIF6buIgFTIkM4rDNoeYvjsSFC8m4i/gdg4QU7b5dlMrT0fUy9B9eY9fhRVCgJpYbcPsz/bg3J2jiWkFdLytUm6cSPnn1OHqsvIdoOQU0v8eJSp/44G4iol9D/U= ARC-Message-Signature: i=1; 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Thu, 05 Nov 2020 09:52:29 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 13/15] accel/stubs: drop unused cpu.h include Date: Thu, 5 Nov 2020 17:51:51 +0000 Message-Id: <20201105175153.30489-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, Colin Xu , Wenchao Wang , "open list:X86 HAXM CPUs" , stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/stubs/hax-stub.c | 1 - 1 file changed, 1 deletion(-) diff --git a/accel/stubs/hax-stub.c b/accel/stubs/hax-stub.c index 1a9da83185..49077f88e3 100644 --- a/accel/stubs/hax-stub.c +++ b/accel/stubs/hax-stub.c @@ -14,7 +14,6 @@ */ =20 #include "qemu/osdep.h" -#include "cpu.h" #include "sysemu/hax.h" =20 int hax_sync_vcpus(void) --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Thu, 05 Nov 2020 09:52:26 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: julien@xen.org, stefano.stabellini@linaro.org, stefano.stabellini@xilinx.com, masami.hiramatsu@linaro.org, takahiro.akashi@linaro.org, andre.przywara@arm.com, stratos-dev@op-lists.linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Stefano Stabellini , Anthony Perard , Paul Durrant , Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , Marcel Apfelbaum , xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [RFC PATCH 14/15] xen: only build HVM support under CONFIG_XEN_HVM Date: Thu, 5 Nov 2020 17:51:52 +0000 Message-Id: <20201105175153.30489-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105175153.30489-1-alex.bennee@linaro.org> References: <20201105175153.30489-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @linaro.org) When running on non-x86 systems there is no point building HVM support because we will never see such things. To achieve this we need to shuffle a little bit of the inline and other stubs about. Signed-off-by: Alex Benn=C3=A9e --- include/sysemu/xen-mapcache.h | 2 +- include/sysemu/xen.h | 9 +++++---- accel/stubs/xen-all-stub.c | 11 +++++++++++ accel/stubs/xen-stub.c | 2 -- accel/stubs/meson.build | 3 ++- hw/i386/xen/meson.build | 2 +- 6 files changed, 20 insertions(+), 9 deletions(-) create mode 100644 accel/stubs/xen-all-stub.c diff --git a/include/sysemu/xen-mapcache.h b/include/sysemu/xen-mapcache.h index c8e7c2f6cf..4bba764745 100644 --- a/include/sysemu/xen-mapcache.h +++ b/include/sysemu/xen-mapcache.h @@ -13,7 +13,7 @@ =20 typedef hwaddr (*phys_offset_to_gaddr_t)(hwaddr phys_offset, ram_addr_t size); -#ifdef CONFIG_XEN +#ifdef CONFIG_XEN_HVM =20 void xen_map_cache_init(phys_offset_to_gaddr_t f, void *opaque); diff --git a/include/sysemu/xen.h b/include/sysemu/xen.h index 0ca25697e4..43d2314441 100644 --- a/include/sysemu/xen.h +++ b/include/sysemu/xen.h @@ -24,7 +24,7 @@ extern bool xen_allowed; =20 #define xen_enabled() (xen_allowed) =20 -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_XEN_HVM void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t length); void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, struct MemoryRegion *mr, Error **errp); @@ -33,7 +33,10 @@ void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, #else /* !CONFIG_XEN_IS_POSSIBLE */ =20 #define xen_enabled() 0 -#ifndef CONFIG_USER_ONLY + +#endif /* CONFIG_XEN_IS_POSSIBLE */ + +#if !defined(CONFIG_XEN_HVM) && !defined(CONFIG_USER_ONLY) static inline void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t le= ngth) { /* nothing */ @@ -45,6 +48,4 @@ static inline void xen_ram_alloc(ram_addr_t ram_addr, ram= _addr_t size, } #endif =20 -#endif /* CONFIG_XEN_IS_POSSIBLE */ - #endif diff --git a/accel/stubs/xen-all-stub.c b/accel/stubs/xen-all-stub.c new file mode 100644 index 0000000000..597c5789cc --- /dev/null +++ b/accel/stubs/xen-all-stub.c @@ -0,0 +1,11 @@ +/* + * Copyright (C) 2014 Citrix Systems UK Ltd. + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "sysemu/xen.h" + +bool xen_allowed; diff --git a/accel/stubs/xen-stub.c b/accel/stubs/xen-stub.c index 7054965c48..6bc9906239 100644 --- a/accel/stubs/xen-stub.c +++ b/accel/stubs/xen-stub.c @@ -9,8 +9,6 @@ #include "sysemu/xen.h" #include "qapi/qapi-commands-migration.h" =20 -bool xen_allowed; - void qmp_xen_set_global_dirty_log(bool enable, Error **errp) { } diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build index d65cb6a5e1..dca468c82a 100644 --- a/accel/stubs/meson.build +++ b/accel/stubs/meson.build @@ -1,7 +1,8 @@ softmmu_stub_ss =3D ss.source_set() =20 softmmu_stub_ss.add(when: 'CONFIG_HAX', if_false: files('hax-stub.c')) -softmmu_stub_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c')) +softmmu_stub_ss.add(when: 'CONFIG_XEN', if_false: files('xen-all-stub.c')) +softmmu_stub_ss.add(when: 'CONFIG_XEN_HVM', if_false: files('xen-stub.c')) softmmu_stub_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c')) softmmu_stub_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c')) =20 diff --git a/hw/i386/xen/meson.build b/hw/i386/xen/meson.build index be84130300..576e2cc5dc 100644 --- a/hw/i386/xen/meson.build +++ b/hw/i386/xen/meson.build @@ -1,4 +1,4 @@ -i386_ss.add(when: 'CONFIG_XEN', if_true: files( +i386_ss.add(when: 'CONFIG_XEN_HVM', if_true: files( 'xen-hvm.c', 'xen-mapcache.c', 'xen_apic.c', --=20 2.20.1 From nobody Wed May 8 23:25:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien@xen.org, masami.hiramatsu@linaro.org, andre.przywara@arm.com, stefano.stabellini@linaro.org, takahiro.akashi@linaro.org, stefano.stabellini@xilinx.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , stratos-dev@op-lists.linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The i386-softmmu is a bit of an oddity for running ARM Xen guests so lets allow us to build an aarch64 binary with a reasonable name as well. Signed-off-by: Alex Benn=C3=A9e --- meson.build | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/meson.build b/meson.build index 79b74fbda7..5280cd9e8f 100644 --- a/meson.build +++ b/meson.build @@ -74,15 +74,16 @@ else endif =20 accelerator_targets =3D { 'CONFIG_KVM': kvm_targets } -if cpu in ['x86', 'x86_64', 'arm', 'aarch64'] - # i368 emulator provides xenpv machine type for multiple architectures +if cpu in ['arm', 'aarch64'] + # i386 emulator used to provide xenpv machine type for all + # supported architectures accelerator_targets +=3D { - 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu'], + 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu', 'arm-softmmu', 'aarch= 64-softmmu'], } -endif -if cpu in ['x86', 'x86_64'] +elif cpu in ['x86', 'x86_64'] accelerator_targets +=3D { 'CONFIG_HAX': ['i386-softmmu', 'x86_64-softmmu'], + 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu'], 'CONFIG_XEN_HVM': ['i386-softmmu', 'x86_64-softmmu'], 'CONFIG_HVF': ['x86_64-softmmu'], 'CONFIG_WHPX': ['i386-softmmu', 'x86_64-softmmu'], --=20 2.20.1