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Tsirkin" To: qemu-devel@nongnu.org Subject: [PULL 19/38] memory: Add interface to set iommu page size mask Message-ID: <20201103142306.71782-20-mst@redhat.com> References: <20201103142306.71782-1-mst@redhat.com> MIME-Version: 1.0 In-Reply-To: <20201103142306.71782-1-mst@redhat.com> X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/11/03 00:03:41 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Jean-Philippe Brucker , Peter Xu , Eric Auger , Paolo Bonzini , Bharat Bhushan Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bharat Bhushan Allow to set the page size mask supported by an iommu memory region. This enables a vIOMMU to communicate the page size granule supported by an assigned device, on hosts that use page sizes greater than 4kB. Acked-by: Peter Xu Reviewed-by: Eric Auger Signed-off-by: Bharat Bhushan Signed-off-by: Jean-Philippe Brucker Message-Id: <20201030180510.747225-8-jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/exec/memory.h | 38 ++++++++++++++++++++++++++++++++++++++ softmmu/memory.c | 13 +++++++++++++ 2 files changed, 51 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index aff6ef7605..0f3e6bcd5e 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -397,6 +397,32 @@ struct IOMMUMemoryRegionClass { * @iommu: the IOMMUMemoryRegion */ int (*num_indexes)(IOMMUMemoryRegion *iommu); + + /** + * @iommu_set_page_size_mask: + * + * Restrict the page size mask that can be supported with a given IOMMU + * memory region. Used for example to propagate host physical IOMMU pa= ge + * size mask limitations to the virtual IOMMU. + * + * Optional method: if this method is not provided, then the default g= lobal + * page mask is used. + * + * @iommu: the IOMMUMemoryRegion + * + * @page_size_mask: a bitmask of supported page sizes. At least one bi= t, + * representing the smallest page size, must be set. Additional set bi= ts + * represent supported block sizes. For example a host physical IOMMU = that + * uses page tables with a page size of 4kB, and supports 2MB and 4GB + * blocks, will set mask 0x40201000. A granule of 4kB with indiscrimin= ate + * block sizes is specified with mask 0xfffffffffffff000. + * + * Returns 0 on success, or a negative error. In case of failure, the = error + * object must be created. + */ + int (*iommu_set_page_size_mask)(IOMMUMemoryRegion *iommu, + uint64_t page_size_mask, + Error **errp); }; =20 typedef struct CoalescedMemoryRange CoalescedMemoryRange; @@ -1409,6 +1435,18 @@ int memory_region_iommu_attrs_to_index(IOMMUMemoryRe= gion *iommu_mr, */ int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr); =20 +/** + * memory_region_iommu_set_page_size_mask: set the supported page + * sizes for a given IOMMU memory region + * + * @iommu_mr: IOMMU memory region + * @page_size_mask: supported page size mask + * @errp: pointer to Error*, to store an error if it happens. + */ +int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr, + uint64_t page_size_mask, + Error **errp); + /** * memory_region_name: get a memory region's name * diff --git a/softmmu/memory.c b/softmmu/memory.c index 21d533d8ed..71951fe4dc 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -1841,6 +1841,19 @@ static int memory_region_update_iommu_notify_flags(I= OMMUMemoryRegion *iommu_mr, return ret; } =20 +int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr, + uint64_t page_size_mask, + Error **errp) +{ + IOMMUMemoryRegionClass *imrc =3D IOMMU_MEMORY_REGION_GET_CLASS(iommu_m= r); + int ret =3D 0; + + if (imrc->iommu_set_page_size_mask) { + ret =3D imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, e= rrp); + } + return ret; +} + int memory_region_register_iommu_notifier(MemoryRegion *mr, IOMMUNotifier *n, Error **errp) { --=20 MST