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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id 130sm2908224wmd.18.2020.11.03.03.46.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2020 03:46:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vLwQzK3euyp1V0xxDaf9XmLFVlrucKWOw3sirbQ2sVw=; b=UxVuJI8A8x0DNhPGfoFHjGaF0RPjMSPT1a2KjqhHApl9pPhW6P1yYCboeUzLFIxLRe xUBNZPbrLVWt2nvGmAj/hyOMA0CEitbaGrzuw7O9guAJ/6nKQSmQaPoZUkH3OiaN2QVq ZoZmiUfT65QM5Haq2JM7hh/ydckXM3CDd2J3Dha17zCjuGzIQ/kj1OLPHCxx8NpqAgBy Lg84dXxuwKw9ilFfiE2/iLwCdAt0xuyDcu1ycVd8358G9Yy8vrAxtNdTc8FkmyFQWcPz zkhRD21rLlf2nulblvgpesCOueN7+XHOcfxjSA11mu5uWvTm4aPus+TvI3nGqLBp6vTo tRBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vLwQzK3euyp1V0xxDaf9XmLFVlrucKWOw3sirbQ2sVw=; b=gthHItQGj9+YztAgVLMYtlBxQcm4Gf/K3KPAS8vKNPU5PH/Vb9yY15KJyUcaosxh8y vme9l5cEiSwQiuJ7MKcV4qZLKj5cLhzhMfHe1yYUw3ktyjws5BDmHh5WfVK7nj7w13d5 fctyLvHdbBivwykuJVWEL23Oj/Cq5Zs4qBZ3DezSaxUC9gBlkso5Bb3pGiwPLjc64GXL fylQxC4GYwsqg82I6b3Lpff/fzT9xjh1FdXy3mKodbhviq7pW7SEpyXCtjVC955JGrpW kCY5uBmHshb4EJ8/yrMkb3hEeRprAI6XBkYNf9X8P1ryRFFsCorXTr9rRwNKZpyi/H2Z yCuQ== X-Gm-Message-State: AOAM530OVjMn2y7tS/JhUF+TGOEI0tcTVHjEbrH9byMZ1cZuYnGW7vHQ mow0IWfV4WwtLQUR/ieBecZlKIur/qNKMg== X-Google-Smtp-Source: ABdhPJxKkN5vfMmG7reLTaFY2VXo1ZZFu5NVV6N32cPwcyzLgoXZP8ahJ6UqMg7XclGgzgimaxmRnA== X-Received: by 2002:a1c:4c13:: with SMTP id z19mr3129945wmf.121.1604404018287; Tue, 03 Nov 2020 03:46:58 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH] target/openrisc: Remove dead code attempting to check "is timer disabled" Date: Tue, 3 Nov 2020 11:46:54 +0000 Message-Id: <20201103114654.18540-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stafford Horne Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" In the mtspr helper we attempt to check for "is the timer disabled" with "if (env->ttmr & TIMER_NONE)". This is wrong because TIMER_NONE is zero and the condition is always false (Coverity complains about the dead code.) The correct check would be to test whether the TTMR_M field in the register is equal to TIMER_NONE instead. However, the cpu_openrisc_timer_update() function checks whether the timer is enabled (it looks at cpu->env.is_counting, which is set to 0 via cpu_openrisc_count_stop() when the TTMR_M field is set to TIMER_NONE), so there's no need to check for "timer disabled" in the target/openrisc code. Instead, simply remove the dead code. Fixes: Coverity CID 1005812 Signed-off-by: Peter Maydell Acked-by: Stafford Horne --- target/openrisc/sys_helper.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index d9fe6c59489..41390d046f6 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -176,9 +176,6 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong = spr, target_ulong rb) =20 case TO_SPR(10, 1): /* TTCR */ cpu_openrisc_count_set(cpu, rb); - if (env->ttmr & TIMER_NONE) { - return; - } cpu_openrisc_timer_update(cpu); break; #endif --=20 2.20.1