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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 23/48] hw/arm/bcm2836: Introduce BCM283XClass::core_count
Date: Tue, 27 Oct 2020 11:44:13 +0000
Message-Id: <20201027114438.17662-24-peter.maydell@linaro.org>
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From: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
The BCM2835 has only one core. Introduce the core_count field to
be able to use values different than BCM283X_NCPUS (4).
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Message-id: 20201024170127.3592182-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/bcm2836.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 8f921d8e904..c5d46a8e805 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -23,6 +23,7 @@ typedef struct BCM283XClass {
/*< public >*/
const char *name;
const char *cpu_type;
+ unsigned core_count;
hwaddr peri_base; /* Peripheral base address seen by the CPU */
hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
int clusterid;
@@ -39,7 +40,7 @@ static void bcm2836_init(Object *obj)
BCM283XClass *bc =3D BCM283X_GET_CLASS(obj);
int n;
=20
- for (n =3D 0; n < BCM283X_NCPUS; n++) {
+ for (n =3D 0; n < bc->core_count; n++) {
object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
bc->cpu_type);
}
@@ -149,6 +150,7 @@ static void bcm2836_class_init(ObjectClass *oc, void *d=
ata)
BCM283XClass *bc =3D BCM283X_CLASS(oc);
=20
bc->cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a7");
+ bc->core_count =3D BCM283X_NCPUS;
bc->peri_base =3D 0x3f000000;
bc->ctrl_base =3D 0x40000000;
bc->clusterid =3D 0xf;
@@ -163,6 +165,7 @@ static void bcm2837_class_init(ObjectClass *oc, void *d=
ata)
BCM283XClass *bc =3D BCM283X_CLASS(oc);
=20
bc->cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a53");
+ bc->core_count =3D BCM283X_NCPUS;
bc->peri_base =3D 0x3f000000;
bc->ctrl_base =3D 0x40000000;
bc->clusterid =3D 0x0;
--=20
2.20.1