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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id 32sm1712203wro.31.2020.10.27.04.45.07 for <qemu-devel@nongnu.org> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Oct 2020 04:45:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=oFTqEA1Ec4xzgG6UB1H8yvtpkow/6LqkhyaFb7FLJRU=; b=YcIAobtxasVZwvCPagdtbO+3n+xL5N8XJRUk3U/B/oE4IjcTGXoNkd1cpsnZAdoO8D GdgUy6vNG0xY3MvrIE1WCAcy2vfI125/8W8YEdbxlKlf56pKIgM+tqAzy4M1In6SCBIi Lcp38UL3LWLDT1Lt2uzx89LhCaES9XFGdQh1+KORLLcc7hzyBnc7VMqez5jfqVEd4f2C 55bilymawxPE3VjZlL/GsVVZIvYgDcdbrJCAq7wd3gJbJhnNoSKgnGhJJF0C4tOnHr29 Lo4OJdvwOyzVrvyYrXhUPbxPg2uIKr16nDRcDxr58ZRb+SGV21u8haKgTzC8nvYfLxkv VXIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oFTqEA1Ec4xzgG6UB1H8yvtpkow/6LqkhyaFb7FLJRU=; b=sj/0DcAhLQEMN4iKmQuYUQf51S6usc6aCwggVWtgeNGX5vnEhgRPF73rOyyrK0LJPb stClwcO0KdwioJfjArKlMzCy5kNj8ahJ/NQ+4xti5BwZhdephoWsYlfTHKmSzgIDMC1e yQ7lAnE/PC6iVMhYG5I+DjEHqV/BNZM1W5SXDQpgitM7dZ41W8Z5NJhQU1ZyoJL1nJH3 cqgFq8k3dn8vFDuBIa1iFsusNJWWeY6Me222T30VHCpLpqEL2R/TN/qJMbI/b0D2g+jI /bTMJbXECB5LFDgHv09Y2QDF+P5sJCoIlyW3953XX1ERgbVp2BmQtdtcWwfjYNfXz8mx TFmA== X-Gm-Message-State: AOAM532s1nJ3hs15t2epBswuocNEQu8oWb/CVScWh0osoro7uoeENrQp HnOEH5Htz7BFFTjfXgqwUf0LkpsPK7tbwA== X-Google-Smtp-Source: ABdhPJzlXlwEcflTctBJtJZsc6ozfsU7XaXydgeh/MXsfpgj3oF7j94qXls6YU/84Pzlcq2zZYhzxw== X-Received: by 2002:a7b:c015:: with SMTP id c21mr2286631wmb.22.1603799108232; Tue, 27 Oct 2020 04:45:08 -0700 (PDT) From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 22/48] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type Date: Tue, 27 Oct 2020 11:44:12 +0000 Message-Id: <20201027114438.17662-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201027114438.17662-1-peter.maydell@linaro.org> References: <20201027114438.17662-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+importer=patchew.org@nongnu.org> X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org> Remove usage of TypeInfo::class_data. Instead fill the fields in the corresponding class_init(). So far all children use the same values for almost all fields, but we are going to add the BCM2711/BCM2838 SoC for the raspi4 machine which use different fields. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org> Message-id: 20201024170127.3592182-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/bcm2836.c | 108 ++++++++++++++++++++++------------------------- 1 file changed, 51 insertions(+), 57 deletions(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index e7cc2c930d9..8f921d8e904 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -17,57 +17,31 @@ #include "hw/arm/raspi_platform.h" #include "hw/sysbus.h" =20 -typedef struct BCM283XInfo BCM283XInfo; - typedef struct BCM283XClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ - const BCM283XInfo *info; -} BCM283XClass; - -struct BCM283XInfo { const char *name; const char *cpu_type; hwaddr peri_base; /* Peripheral base address seen by the CPU */ hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */ int clusterid; -}; +} BCM283XClass; =20 #define BCM283X_CLASS(klass) \ OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X) #define BCM283X_GET_CLASS(obj) \ OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X) =20 -static const BCM283XInfo bcm283x_socs[] =3D { - { - .name =3D TYPE_BCM2836, - .cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a7"), - .peri_base =3D 0x3f000000, - .ctrl_base =3D 0x40000000, - .clusterid =3D 0xf, - }, -#ifdef TARGET_AARCH64 - { - .name =3D TYPE_BCM2837, - .cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a53"), - .peri_base =3D 0x3f000000, - .ctrl_base =3D 0x40000000, - .clusterid =3D 0x0, - }, -#endif -}; - static void bcm2836_init(Object *obj) { BCM283XState *s =3D BCM283X(obj); BCM283XClass *bc =3D BCM283X_GET_CLASS(obj); - const BCM283XInfo *info =3D bc->info; int n; =20 for (n =3D 0; n < BCM283X_NCPUS; n++) { object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, - info->cpu_type); + bc->cpu_type); } =20 object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONT= ROL); @@ -84,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **err= p) { BCM283XState *s =3D BCM283X(dev); BCM283XClass *bc =3D BCM283X_GET_CLASS(dev); - const BCM283XInfo *info =3D bc->info; Object *obj; int n; =20 @@ -102,14 +75,14 @@ static void bcm2836_realize(DeviceState *dev, Error **= errp) "sd-bus"); =20 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0, - info->peri_base, 1); + bc->peri_base, 1); =20 /* bcm2836 interrupt controller (and mailboxes, etc.) */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->control), errp)) { return; } =20 - sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base); =20 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0)); @@ -118,11 +91,11 @@ static void bcm2836_realize(DeviceState *dev, Error **= errp) =20 for (n =3D 0; n < BCM283X_NCPUS; n++) { /* TODO: this should be converted to a property of ARM_CPU */ - s->cpu[n].core.mp_affinity =3D (info->clusterid << 8) | n; + s->cpu[n].core.mp_affinity =3D (bc->clusterid << 8) | n; =20 /* set periphbase/CBAR value for CPU-local registers */ if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar", - info->peri_base, errp)) { + bc->peri_base, errp)) { return; } =20 @@ -165,38 +138,59 @@ static Property bcm2836_props[] =3D { static void bcm283x_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); - BCM283XClass *bc =3D BCM283X_CLASS(oc); =20 - bc->info =3D data; - dc->realize =3D bcm2836_realize; - device_class_set_props(dc, bcm2836_props); /* Reason: Must be wired up in code (see raspi_init() function) */ dc->user_creatable =3D false; } =20 -static const TypeInfo bcm283x_type_info =3D { - .name =3D TYPE_BCM283X, - .parent =3D TYPE_DEVICE, - .instance_size =3D sizeof(BCM283XState), - .instance_init =3D bcm2836_init, - .class_size =3D sizeof(BCM283XClass), - .abstract =3D true, +static void bcm2836_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + BCM283XClass *bc =3D BCM283X_CLASS(oc); + + bc->cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a7"); + bc->peri_base =3D 0x3f000000; + bc->ctrl_base =3D 0x40000000; + bc->clusterid =3D 0xf; + dc->realize =3D bcm2836_realize; + device_class_set_props(dc, bcm2836_props); }; =20 -static void bcm2836_register_types(void) +#ifdef TARGET_AARCH64 +static void bcm2837_class_init(ObjectClass *oc, void *data) { - int i; + DeviceClass *dc =3D DEVICE_CLASS(oc); + BCM283XClass *bc =3D BCM283X_CLASS(oc); =20 - type_register_static(&bcm283x_type_info); - for (i =3D 0; i < ARRAY_SIZE(bcm283x_socs); i++) { - TypeInfo ti =3D { - .name =3D bcm283x_socs[i].name, - .parent =3D TYPE_BCM283X, - .class_init =3D bcm283x_class_init, - .class_data =3D (void *) &bcm283x_socs[i], - }; - type_register(&ti); + bc->cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a53"); + bc->peri_base =3D 0x3f000000; + bc->ctrl_base =3D 0x40000000; + bc->clusterid =3D 0x0; + dc->realize =3D bcm2836_realize; + device_class_set_props(dc, bcm2836_props); +}; +#endif + +static const TypeInfo bcm283x_types[] =3D { + { + .name =3D TYPE_BCM2836, + .parent =3D TYPE_BCM283X, + .class_init =3D bcm2836_class_init, +#ifdef TARGET_AARCH64 + }, { + .name =3D TYPE_BCM2837, + .parent =3D TYPE_BCM283X, + .class_init =3D bcm2837_class_init, +#endif + }, { + .name =3D TYPE_BCM283X, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(BCM283XState), + .instance_init =3D bcm2836_init, + .class_size =3D sizeof(BCM283XClass), + .class_init =3D bcm283x_class_init, + .abstract =3D true, } -} +}; =20 -type_init(bcm2836_register_types) +DEFINE_TYPES(bcm283x_types) --=20 2.20.1