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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 22/48] hw/arm/bcm2836: QOM'ify more by adding class_init() to
 each SoC type
Date: Tue, 27 Oct 2020 11:44:12 +0000
Message-Id: <20201027114438.17662-23-peter.maydell@linaro.org>
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From: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>

Remove usage of TypeInfo::class_data. Instead fill the fields in
the corresponding class_init().

So far all children use the same values for almost all fields,
but we are going to add the BCM2711/BCM2838 SoC for the raspi4
machine which use different fields.

Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Message-id: 20201024170127.3592182-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/bcm2836.c | 108 ++++++++++++++++++++++-------------------------
 1 file changed, 51 insertions(+), 57 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index e7cc2c930d9..8f921d8e904 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -17,57 +17,31 @@
 #include "hw/arm/raspi_platform.h"
 #include "hw/sysbus.h"
=20
-typedef struct BCM283XInfo BCM283XInfo;
-
 typedef struct BCM283XClass {
     /*< private >*/
     DeviceClass parent_class;
     /*< public >*/
-    const BCM283XInfo *info;
-} BCM283XClass;
-
-struct BCM283XInfo {
     const char *name;
     const char *cpu_type;
     hwaddr peri_base; /* Peripheral base address seen by the CPU */
     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
     int clusterid;
-};
+} BCM283XClass;
=20
 #define BCM283X_CLASS(klass) \
     OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X)
 #define BCM283X_GET_CLASS(obj) \
     OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
=20
-static const BCM283XInfo bcm283x_socs[] =3D {
-    {
-        .name =3D TYPE_BCM2836,
-        .cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a7"),
-        .peri_base =3D 0x3f000000,
-        .ctrl_base =3D 0x40000000,
-        .clusterid =3D 0xf,
-    },
-#ifdef TARGET_AARCH64
-    {
-        .name =3D TYPE_BCM2837,
-        .cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a53"),
-        .peri_base =3D 0x3f000000,
-        .ctrl_base =3D 0x40000000,
-        .clusterid =3D 0x0,
-    },
-#endif
-};
-
 static void bcm2836_init(Object *obj)
 {
     BCM283XState *s =3D BCM283X(obj);
     BCM283XClass *bc =3D BCM283X_GET_CLASS(obj);
-    const BCM283XInfo *info =3D bc->info;
     int n;
=20
     for (n =3D 0; n < BCM283X_NCPUS; n++) {
         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
-                                info->cpu_type);
+                                bc->cpu_type);
     }
=20
     object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONT=
ROL);
@@ -84,7 +58,6 @@ static void bcm2836_realize(DeviceState *dev, Error **err=
p)
 {
     BCM283XState *s =3D BCM283X(dev);
     BCM283XClass *bc =3D BCM283X_GET_CLASS(dev);
-    const BCM283XInfo *info =3D bc->info;
     Object *obj;
     int n;
=20
@@ -102,14 +75,14 @@ static void bcm2836_realize(DeviceState *dev, Error **=
errp)
                               "sd-bus");
=20
     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
-                            info->peri_base, 1);
+                            bc->peri_base, 1);
=20
     /* bcm2836 interrupt controller (and mailboxes, etc.) */
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->control), errp)) {
         return;
     }
=20
-    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, bc->ctrl_base);
=20
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
@@ -118,11 +91,11 @@ static void bcm2836_realize(DeviceState *dev, Error **=
errp)
=20
     for (n =3D 0; n < BCM283X_NCPUS; n++) {
         /* TODO: this should be converted to a property of ARM_CPU */
-        s->cpu[n].core.mp_affinity =3D (info->clusterid << 8) | n;
+        s->cpu[n].core.mp_affinity =3D (bc->clusterid << 8) | n;
=20
         /* set periphbase/CBAR value for CPU-local registers */
         if (!object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
-                                     info->peri_base, errp)) {
+                                     bc->peri_base, errp)) {
             return;
         }
=20
@@ -165,38 +138,59 @@ static Property bcm2836_props[] =3D {
 static void bcm283x_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc =3D DEVICE_CLASS(oc);
-    BCM283XClass *bc =3D BCM283X_CLASS(oc);
=20
-    bc->info =3D data;
-    dc->realize =3D bcm2836_realize;
-    device_class_set_props(dc, bcm2836_props);
     /* Reason: Must be wired up in code (see raspi_init() function) */
     dc->user_creatable =3D false;
 }
=20
-static const TypeInfo bcm283x_type_info =3D {
-    .name =3D TYPE_BCM283X,
-    .parent =3D TYPE_DEVICE,
-    .instance_size =3D sizeof(BCM283XState),
-    .instance_init =3D bcm2836_init,
-    .class_size =3D sizeof(BCM283XClass),
-    .abstract =3D true,
+static void bcm2836_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc =3D DEVICE_CLASS(oc);
+    BCM283XClass *bc =3D BCM283X_CLASS(oc);
+
+    bc->cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a7");
+    bc->peri_base =3D 0x3f000000;
+    bc->ctrl_base =3D 0x40000000;
+    bc->clusterid =3D 0xf;
+    dc->realize =3D bcm2836_realize;
+    device_class_set_props(dc, bcm2836_props);
 };
=20
-static void bcm2836_register_types(void)
+#ifdef TARGET_AARCH64
+static void bcm2837_class_init(ObjectClass *oc, void *data)
 {
-    int i;
+    DeviceClass *dc =3D DEVICE_CLASS(oc);
+    BCM283XClass *bc =3D BCM283X_CLASS(oc);
=20
-    type_register_static(&bcm283x_type_info);
-    for (i =3D 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
-        TypeInfo ti =3D {
-            .name =3D bcm283x_socs[i].name,
-            .parent =3D TYPE_BCM283X,
-            .class_init =3D bcm283x_class_init,
-            .class_data =3D (void *) &bcm283x_socs[i],
-        };
-        type_register(&ti);
+    bc->cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a53");
+    bc->peri_base =3D 0x3f000000;
+    bc->ctrl_base =3D 0x40000000;
+    bc->clusterid =3D 0x0;
+    dc->realize =3D bcm2836_realize;
+    device_class_set_props(dc, bcm2836_props);
+};
+#endif
+
+static const TypeInfo bcm283x_types[] =3D {
+    {
+        .name           =3D TYPE_BCM2836,
+        .parent         =3D TYPE_BCM283X,
+        .class_init     =3D bcm2836_class_init,
+#ifdef TARGET_AARCH64
+    }, {
+        .name           =3D TYPE_BCM2837,
+        .parent         =3D TYPE_BCM283X,
+        .class_init     =3D bcm2837_class_init,
+#endif
+    }, {
+        .name           =3D TYPE_BCM283X,
+        .parent         =3D TYPE_DEVICE,
+        .instance_size  =3D sizeof(BCM283XState),
+        .instance_init  =3D bcm2836_init,
+        .class_size     =3D sizeof(BCM283XClass),
+        .class_init     =3D bcm283x_class_init,
+        .abstract       =3D true,
     }
-}
+};
=20
-type_init(bcm2836_register_types)
+DEFINE_TYPES(bcm283x_types)
--=20
2.20.1