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[88.18.140.237]) by smtp.gmail.com with ESMTPSA id b18sm560318wmj.41.2020.10.26.03.56.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 03:56:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1603709787; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=na09npuagCae1jkRDHu8fQc6bmdR06DBBHFCPQpb2ds=; b=d2PNgGCvdToR9UWJ6zyAJ81Y+zZvpT24w2qaAtY4zRjDVSGMaMfOBkAXcscLz0pgvRVao/ CIclbcGSiEm8YiqaAUNpJexn3hfdX2exzW4lktnOpCHprDInPib4noQcFOJKhRFqq8ENAa iJjsg7oIhQR7DTs1voJfPP10sm3xew4= X-MC-Unique: jqQSB3SoOEu49e6lsjXqjA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=na09npuagCae1jkRDHu8fQc6bmdR06DBBHFCPQpb2ds=; b=p70NoO686qGPPBp7knwIQw5a6HULFi+zxbWe8XX0Z3XTqlMbzOraMZNZixgm64d6SF HtvB1t1qGHlYXHL0AaNnec8BRhuDs8+d2tHZogffiJTK4gtS1gEM9FsnEF/Q3nYZffO9 s86B0brXuUFiLnvTMBnspyu7d2gVDXlqYMJLhtn2lbUsk16j7/SEjLs59Axmd1MHud+c o3YmbVSLND0SUXBhGL+G51M/WnaXlfiP1rivKGYS0t1rM2AuJQCzYXLCO8Jvr+KD5E21 fVmZckzLygHw5PCvD3vYWa6qtN7D6uYH3lxx4MBDsRceUBb3NJLAG0EOATbKmvlfoiQ/ kr8Q== X-Gm-Message-State: AOAM533FyrOtwkG+HotitCsWbYeBtvVQCCeErKGz/ciqsGjNvXw8qKaw Js32LCjCzvGTPIe5sqZB4ebocEamTFwfSoCYfLDtqTRX1AwhoKOhDB+S0blyK8T2Lou+9S0CglS GDudsfERWryaW0w== X-Received: by 2002:adf:f043:: with SMTP id t3mr16377497wro.234.1603709784431; Mon, 26 Oct 2020 03:56:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxpt9jt5u2ibRJg874zc7T/p1gdb7BGoBhmVbY5NvnSjELDjLyNuFmNU/z1wQKaS0Mf/U8enQ== X-Received: by 2002:adf:f043:: with SMTP id t3mr16377473wro.234.1603709784176; Mon, 26 Oct 2020 03:56:24 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eric Auger , Alex Williamson , qemu-block@nongnu.org, Fam Zheng , Max Reitz , Stefan Hajnoczi , Kevin Wolf , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 16/19] util/vfio-helpers: Introduce qemu_vfio_pci_msix_init_irqs() Date: Mon, 26 Oct 2020 11:55:01 +0100 Message-Id: <20201026105504.4023620-17-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201026105504.4023620-1-philmd@redhat.com> References: <20201026105504.4023620-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) qemu_vfio_pci_init_irq() allows us to initialize any type of IRQ, but only one. Introduce qemu_vfio_pci_msix_init_irqs() which is specific to MSIX IRQ type, and allow us to use multiple IRQs (thus passing multiple eventfd notifiers). All eventfd notifiers are initialized with the special '-1' value meaning "un-assigned". Reviewed-by: Stefan Hajnoczi Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/qemu/vfio-helpers.h | 6 +++- util/vfio-helpers.c | 65 ++++++++++++++++++++++++++++++++++++- util/trace-events | 1 + 3 files changed, 70 insertions(+), 2 deletions(-) diff --git a/include/qemu/vfio-helpers.h b/include/qemu/vfio-helpers.h index 4b97a904e93..492072cba2f 100644 --- a/include/qemu/vfio-helpers.h +++ b/include/qemu/vfio-helpers.h @@ -1,11 +1,13 @@ /* * QEMU VFIO helpers * - * Copyright 2016 - 2018 Red Hat, Inc. + * Copyright 2016 - 2020 Red Hat, Inc. * * Authors: * Fam Zheng + * Philippe Mathieu-Daud=C3=A9 * + * SPDX-License-Identifier: GPL-2.0-or-later * This work is licensed under the terms of the GNU GPL, version 2 or late= r. * See the COPYING file in the top-level directory. */ @@ -29,5 +31,7 @@ void qemu_vfio_pci_unmap_bar(QEMUVFIOState *s, int index,= void *bar, uint64_t offset, uint64_t size); int qemu_vfio_pci_init_irq(QEMUVFIOState *s, EventNotifier *e, int irq_type, Error **errp); +int qemu_vfio_pci_msix_init_irqs(QEMUVFIOState *s, + unsigned *irq_count, Error **errp); =20 #endif diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index 874d76c2a2a..d88e2c7dc1f 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -1,11 +1,13 @@ /* * VFIO utility * - * Copyright 2016 - 2018 Red Hat, Inc. + * Copyright 2016 - 2020 Red Hat, Inc. * * Authors: * Fam Zheng + * Philippe Mathieu-Daud=C3=A9 * + * SPDX-License-Identifier: GPL-2.0-or-later * This work is licensed under the terms of the GNU GPL, version 2 or late= r. * See the COPYING file in the top-level directory. */ @@ -230,6 +232,67 @@ int qemu_vfio_pci_init_irq(QEMUVFIOState *s, EventNoti= fier *e, return 0; } =20 +/** + * Initialize device MSIX IRQs and register event notifiers. + * @irq_count: pointer to number of MSIX IRQs to initialize + * + * If the number of IRQs requested exceeds the available on the device, + * store the number of available IRQs in @irq_count and return -EOVERFLOW. + */ +int qemu_vfio_pci_msix_init_irqs(QEMUVFIOState *s, + unsigned *irq_count, Error **errp) +{ + int r; + size_t irq_set_size; + struct vfio_irq_set *irq_set; + struct vfio_irq_info irq_info =3D { + .argsz =3D sizeof(irq_info), + .index =3D VFIO_PCI_MSIX_IRQ_INDEX + }; + + if (ioctl(s->device, VFIO_DEVICE_GET_IRQ_INFO, &irq_info)) { + error_setg_errno(errp, errno, "Failed to get device interrupt info= "); + return -errno; + } + trace_qemu_vfio_msix_info_irqs(irq_info.count, *irq_count); + if (irq_info.count < *irq_count) { + error_setg(errp, "Not enough device interrupts available"); + *irq_count =3D irq_info.count; + return -EOVERFLOW; + } + if (!(irq_info.flags & VFIO_IRQ_INFO_EVENTFD)) { + error_setg(errp, "Device interrupt doesn't support eventfd"); + return -EINVAL; + } + + irq_set_size =3D sizeof(*irq_set) + *irq_count * sizeof(int32_t); + irq_set =3D g_malloc0(irq_set_size); + + /* Get to a known IRQ state */ + *irq_set =3D (struct vfio_irq_set) { + .argsz =3D irq_set_size, + .flags =3D VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER, + .index =3D VFIO_PCI_MSIX_IRQ_INDEX, + .start =3D 0, + .count =3D *irq_count, + }; + + for (unsigned i =3D 0; i < *irq_count; i++) { + ((int32_t *)&irq_set->data)[i] =3D -1; /* un-assigned: skip */ + } + r =3D ioctl(s->device, VFIO_DEVICE_SET_IRQS, irq_set); + g_free(irq_set); + if (r < 0) { + error_setg_errno(errp, errno, "Failed to setup device interrupts"); + return -errno; + } else if (r > 0) { + error_setg(errp, "Not enough device interrupts available"); + *irq_count =3D r; + return -EOVERFLOW; + } + return 0; +} + static int qemu_vfio_pci_read_config(QEMUVFIOState *s, void *buf, int size, int ofs) { diff --git a/util/trace-events b/util/trace-events index 3c36def9f30..ec93578b125 100644 --- a/util/trace-events +++ b/util/trace-events @@ -87,6 +87,7 @@ qemu_vfio_do_mapping(void *s, void *host, uint64_t iova, = size_t size) "s %p host qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64= _t *iova) "s %p host %p size 0x%zx temporary %d &iova %p" qemu_vfio_dma_mapped(void *s, void *host, uint64_t iova, size_t size) "s %= p host %p <-> iova 0x%"PRIx64" size 0x%zx" qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" +qemu_vfio_msix_info_irqs(uint32_t count, unsigned asked) "msix irqs %"PRIu= 32" (asked: %u)" qemu_vfio_iommu_iova_pgsizes(uint64_t iova_pgsizes) "iommu page size bitma= sk: 0x%08"PRIx64 qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_of= s, uint64_t region_size) "read cfg ptr %p ofs 0x%x size %d (region ofs 0x%"= PRIx64" size %"PRId64")" qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_o= fs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size %d (region ofs 0x= %"PRIx64" size %"PRId64")" --=20 2.26.2