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[88.18.140.237]) by smtp.gmail.com with ESMTPSA id z15sm10503227wmk.4.2020.10.26.03.56.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 03:56:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1603709782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UchhDxvfvK9mvljYS5+MFH11t7RpYY2MHNXuIXgkVCI=; b=dfX1mlrNygF7zmzQY+nl64oST0YhBbjhUgJTDPmOjqsMyfhYD8E3Tv11xq4hsxc1jZPta+ I90ZWGDGWsKOXscZGYzRY9dgwupeXG7Qqd1ZVME2tJgCw1sITrg56+pt+PLtwPGlEmsU09 TRZQARo2V/EIMh0a1Jt015rR8hnbR+4= X-MC-Unique: T3BevwncOk66H9mdFQifzA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UchhDxvfvK9mvljYS5+MFH11t7RpYY2MHNXuIXgkVCI=; b=iYfZWnZTqiARmAxxkswNNWbLwzTeKusqrWeKrzIifvBJzwBpa7c1k0juqrnsJ8KyM0 xmgjEIrzCV8ePj1XxbW/aSn7dJsfb6QhzDET8pvO71TeUOidYR/qtg74N2jN4EfEj92r d3jzYTZp6OHoQGPEEurajuCwzEW1UHd9Dl0MBtdQKQOXtZkM4RmbTMuZ3SSiLXrJmH63 BQBJ+wZ90o0C3g3B7aGfR4ldQvV4zVK+rt6br4Bm5cl4kJkh8S60vc9eOGfh4towsx9U vDlfn6TIdweWD9lpNZ8H7eS9FOLMyqJLfPP41UKEyjblydKDs9ydbMnEqe7NT7obmcRh NDQg== X-Gm-Message-State: AOAM532sHlikC9ipcUvQwMGLO3p5B1UapN9l9PxbnsZQqDDTcYD3u0CZ /S5nbbJycudK29PhMoEq1EkAeDDEhg0x7Jlm4jzbMVb9WOPPcfke0KOw1SqO2CSMv1PvP1tnEcE JFqIUywVX98BkxA== X-Received: by 2002:a7b:c3d3:: with SMTP id t19mr10792126wmj.139.1603709779455; Mon, 26 Oct 2020 03:56:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxK+reWy6GKPqc0RXEbvbCmYmcLuekj14GSWO7nIOUhrD91W9ScTna0LeoOJcD4rgpvatBiKA== X-Received: by 2002:a7b:c3d3:: with SMTP id t19mr10792101wmj.139.1603709779242; Mon, 26 Oct 2020 03:56:19 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eric Auger , Alex Williamson , qemu-block@nongnu.org, Fam Zheng , Max Reitz , Stefan Hajnoczi , Kevin Wolf , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 15/19] util/vfio-helpers: Report error when IOMMU page size is not supported Date: Mon, 26 Oct 2020 11:55:00 +0100 Message-Id: <20201026105504.4023620-16-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201026105504.4023620-1-philmd@redhat.com> References: <20201026105504.4023620-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) This driver uses the host page size to align its memory regions, but this size is not always compatible with the IOMMU. Add a check if the size matches, and bails out providing a hint what is the minimum page size the driver should use. Suggested-by: Alex Williamson Reviewed-by: Stefan Hajnoczi Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- util/vfio-helpers.c | 28 ++++++++++++++++++++++++++-- util/trace-events | 1 + 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index 5e288dfa113..874d76c2a2a 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -11,6 +11,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/cutils.h" #include #include #include "qapi/error.h" @@ -288,7 +289,7 @@ static void collect_usable_iova_ranges(QEMUVFIOState *s= , void *buf) } =20 static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device, - Error **errp) + size_t *requested_page_size, Error **errp) { int ret; int i; @@ -299,6 +300,8 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const c= har *device, struct vfio_device_info device_info =3D { .argsz =3D sizeof(device_inf= o) }; char *group_file =3D NULL; =20 + assert(requested_page_size && is_power_of_2(*requested_page_size)); + s->usable_iova_ranges =3D NULL; =20 /* Create a new container */ @@ -373,6 +376,27 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const = char *device, ret =3D -errno; goto fail; } + if (!(iommu_info->flags & VFIO_IOMMU_INFO_PGSIZES)) { + error_setg(errp, "Failed to get IOMMU page size info"); + ret =3D -EINVAL; + goto fail; + } + trace_qemu_vfio_iommu_iova_pgsizes(iommu_info->iova_pgsizes); + if (!(iommu_info->iova_pgsizes & *requested_page_size)) { + g_autofree char *req_page_size_str =3D size_to_str(*requested_page= _size); + g_autofree char *min_page_size_str =3D NULL; + uint64_t pgsizes_masked; + + pgsizes_masked =3D MAKE_64BIT_MASK(0, ctz64(*requested_page_size)); + *requested_page_size =3D 1U << ctz64(iommu_info->iova_pgsizes + & ~pgsizes_masked); + min_page_size_str =3D size_to_str(*requested_page_size); + error_setg(errp, "Unsupported IOMMU page size: %s", req_page_size_= str); + error_append_hint(errp, "Minimum IOMMU page size: %s\n", + min_page_size_str); + ret =3D -EINVAL; + goto fail; + } =20 /* * if the kernel does not report usable IOVA regions, choose @@ -520,7 +544,7 @@ QEMUVFIOState *qemu_vfio_open_pci(const char *device, s= ize_t *min_page_size, int r; QEMUVFIOState *s =3D g_new0(QEMUVFIOState, 1); =20 - r =3D qemu_vfio_init_pci(s, device, errp); + r =3D qemu_vfio_init_pci(s, device, min_page_size, errp); if (r) { g_free(s); return NULL; diff --git a/util/trace-events b/util/trace-events index 7faad2a718c..3c36def9f30 100644 --- a/util/trace-events +++ b/util/trace-events @@ -87,6 +87,7 @@ qemu_vfio_do_mapping(void *s, void *host, uint64_t iova, = size_t size) "s %p host qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64= _t *iova) "s %p host %p size 0x%zx temporary %d &iova %p" qemu_vfio_dma_mapped(void *s, void *host, uint64_t iova, size_t size) "s %= p host %p <-> iova 0x%"PRIx64" size 0x%zx" qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" +qemu_vfio_iommu_iova_pgsizes(uint64_t iova_pgsizes) "iommu page size bitma= sk: 0x%08"PRIx64 qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_of= s, uint64_t region_size) "read cfg ptr %p ofs 0x%x size %d (region ofs 0x%"= PRIx64" size %"PRId64")" qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_o= fs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size %d (region ofs 0x= %"PRIx64" size %"PRId64")" qemu_vfio_region_info(const char *desc, uint64_t offset, uint64_t size, ui= nt32_t cap_offset) "region '%s' ofs 0x%"PRIx64" size %"PRId64" cap_ofs %"PR= Id32 --=20 2.26.2