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v2: dropped linux-user bti series. The following changes since commit 4c41341af76cfc85b5a6c0f87de4838672ab9f89: Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20201020' into staging (2020-10-20 11:20:36 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201020-1 for you to fetch changes up to 8128c8e8cc9489a8387c74075974f86dc0222e7f: target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension (2020-10-20 16:12:01 +0100) ---------------------------------------------------------------- target-arm queue: * Fix AArch32 SMLAD incorrect setting of Q bit * AArch32 VCVT fixed-point to float is always round-to-nearest * strongarm: Fix 'time to transmit a char' unit comment * Restrict APEI tables generation to the 'virt' machine * bcm2835: minor code cleanups * bcm2835: connect all IRQs from SYS_timer device * correctly flush TLBs when TBI is enabled * tests/qtest: Add npcm7xx timer test * loads-stores.rst: add footnote that clarifies GETPC usage * Fix reported EL for mte_check_fail * Ignore HCR_EL2.ATA when {E2H,TGE} != 11 * microbit_i2c: Fix coredump when dump-vmstate * nseries: Fix loading kernel image on n8x0 machines * Implement v8.1M low-overhead-loops ---------------------------------------------------------------- Emanuele Giuseppe Esposito (1): loads-stores.rst: add footnote that clarifies GETPC usage Havard Skinnemoen (1): tests/qtest: Add npcm7xx timer test Peng Liang (1): microbit_i2c: Fix coredump when dump-vmstate Peter Maydell (12): target/arm: Fix SMLAD incorrect setting of Q bit target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest decodetree: Fix codegen for non-overlapping group inside overlapping group target/arm: Implement v8.1M NOCP handling target/arm: Implement v8.1M conditional-select insns target/arm: Make the t32 insn[25:23]=111 group non-overlapping target/arm: Don't allow BLX imm for M-profile target/arm: Implement v8.1M branch-future insns (as NOPs) target/arm: Implement v8.1M low-overhead-loop instructions target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16 target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension Philippe Mathieu-Daudé (9): hw/arm/strongarm: Fix 'time to transmit a char' unit comment hw/arm: Restrict APEI tables generation to the 'virt' machine hw/timer/bcm2835: Introduce BCM2835_SYSTIMER_COUNT definition hw/timer/bcm2835: Rename variable holding CTRL_STATUS register hw/timer/bcm2835: Support the timer COMPARE registers hw/arm/bcm2835_peripherals: Correctly wire the SYS_timer IRQs hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers hw/arm/nseries: Fix loading kernel image on n8x0 machines Richard Henderson (5): accel/tcg: Add tlb_flush_page_bits_by_mmuidx* target/arm: Use tlb_flush_page_bits_by_mmuidx* target/arm: Remove redundant mmu_idx lookup target/arm: Fix reported EL for mte_check_fail target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11 docs/devel/loads-stores.rst | 8 +- default-configs/devices/arm-softmmu.mak | 1 - include/exec/exec-all.h | 36 ++ include/hw/timer/bcm2835_systmr.h | 17 +- target/arm/cpu.h | 8 + target/arm/helper.h | 13 + target/arm/internals.h | 9 +- target/arm/m-nocp.decode | 10 +- target/arm/t32.decode | 50 ++- accel/tcg/cputlb.c | 275 +++++++++++++++- hw/arm/bcm2835_peripherals.c | 13 +- hw/arm/nseries.c | 1 + hw/arm/strongarm.c | 2 +- hw/i2c/microbit_i2c.c | 1 + hw/intc/bcm2835_ic.c | 4 +- hw/intc/bcm2836_control.c | 8 +- hw/timer/bcm2835_systmr.c | 57 ++-- target/arm/cpu.c | 38 ++- target/arm/helper.c | 55 +++- target/arm/mte_helper.c | 13 +- target/arm/translate.c | 239 +++++++++++++- target/arm/vfp_helper.c | 76 +++-- tests/qtest/npcm7xx_timer-test.c | 562 ++++++++++++++++++++++++++++++++ hw/arm/Kconfig | 1 + hw/intc/trace-events | 4 + hw/timer/trace-events | 6 +- scripts/decodetree.py | 2 +- target/arm/translate-vfp.c.inc | 41 ++- tests/qtest/meson.build | 1 + 29 files changed, 1404 insertions(+), 147 deletions(-) create mode 100644 tests/qtest/npcm7xx_timer-test.c
v3->v4: Windows headers define an INT type which clashed with an enum value name in arm_gicv3_its.c... The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5: Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13' into staging (2021-09-13 11:00:30 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210913-3 for you to fetch changes up to 28e987a7e7edaa3ca7feeac65edca26145df8814: hw/arm/mps2.c: Mark internal-only I2C buses as 'full' (2021-09-13 21:01:08 +0100) ---------------------------------------------------------------- target-arm queue: * mark MPS2/MPS3 board-internal i2c buses as 'full' so that command line user-created devices are not plugged into them * Take an exception if PSTATE.IL is set * Support an emulated ITS in the virt board * Add support for kudo-bmc board * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM * cadence_uart: Fix clock handling issues that prevented u-boot from running ---------------------------------------------------------------- Bin Meng (6): hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase hw/char: cadence_uart: Disable transmit when input clock is disabled hw/char: cadence_uart: Move clock/reset check to uart_can_receive() hw/char: cadence_uart: Convert to memop_with_attrs() ops hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() hw/char: cadence_uart: Log a guest error when device is unclocked or in reset Chris Rauer (1): hw/arm: Add support for kudo-bmc board. Marc Zyngier (1): hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM Peter Maydell (5): target/arm: Take an exception if PSTATE.IL is set qdev: Support marking individual buses as 'full' hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full' hw/arm/mps2.c: Mark internal-only I2C buses as 'full' Richard Henderson (1): target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Shashi Mallela (9): hw/intc: GICv3 ITS initial framework hw/intc: GICv3 ITS register definitions added hw/intc: GICv3 ITS command queue framework hw/intc: GICv3 ITS Command processing hw/intc: GICv3 ITS Feature enablement hw/intc: GICv3 redistributor ITS processing tests/data/acpi/virt: Add IORT files for ITS hw/arm/virt: add ITS support in virt GIC tests/data/acpi/virt: Update IORT files for ITS docs/system/arm/nuvoton.rst | 1 + hw/intc/gicv3_internal.h | 188 ++++- include/hw/arm/virt.h | 2 + include/hw/intc/arm_gicv3_common.h | 13 + include/hw/intc/arm_gicv3_its_common.h | 32 +- include/hw/qdev-core.h | 24 + target/arm/cpu.h | 1 + target/arm/kvm_arm.h | 4 +- target/arm/syndrome.h | 5 + target/arm/translate.h | 2 + hw/arm/mps2-tz.c | 92 ++- hw/arm/mps2.c | 12 +- hw/arm/npcm7xx_boards.c | 34 + hw/arm/virt.c | 29 +- hw/char/cadence_uart.c | 61 +- hw/intc/arm_gicv3.c | 14 + hw/intc/arm_gicv3_common.c | 13 + hw/intc/arm_gicv3_cpuif.c | 7 +- hw/intc/arm_gicv3_dist.c | 5 +- hw/intc/arm_gicv3_its.c | 1322 ++++++++++++++++++++++++++++++++ hw/intc/arm_gicv3_its_common.c | 7 +- hw/intc/arm_gicv3_its_kvm.c | 2 +- hw/intc/arm_gicv3_redist.c | 153 +++- hw/misc/zynq_slcr.c | 31 +- softmmu/qdev-monitor.c | 7 +- target/arm/helper-a64.c | 1 + target/arm/helper.c | 8 + target/arm/kvm.c | 7 +- target/arm/translate-a64.c | 255 +++--- target/arm/translate.c | 21 + hw/intc/meson.build | 1 + tests/data/acpi/virt/IORT | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.memhp | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.numamem | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.pxb | Bin 0 -> 124 bytes 35 files changed, 2144 insertions(+), 210 deletions(-) create mode 100644 hw/intc/arm_gicv3_its.c create mode 100644 tests/data/acpi/virt/IORT create mode 100644 tests/data/acpi/virt/IORT.memhp create mode 100644 tests/data/acpi/virt/IORT.numamem create mode 100644 tests/data/acpi/virt/IORT.pxb