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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EUu3TowM3/XiihIE5qZiOjj814pdfxEcCr/jEGGcaVo=; b=bUHlOKo1wbgmVu62s6KmEqmbmxR7Q+RGw2pR1H4mA7sJmZi/G3t3eLEnhKUPJAefKO LoNWcJziUeD+og/S1RzxSPhIYL9jxk2lySOpLfc5IYpR0XKlziBCXVa0yFYC83Tuodum 0Mm0LSS+9J51KviSrW/G2D4QfHUYmyHQFofCj++8cDRxAds4YEOh+E89JDZ7S81KaORR bKAiWH+jPHkK5y40KDY+Rt7oySjndSfxmYjoCONjJmLZlKn33sxsVCAXk4GH1WTPSBQn oXRwT6T9aDUrF7KEkEmqRB2xMa0JteYDyFdcBXJUl3nmFI1kIWeKQFoUSOgFsTDZJxi+ acxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EUu3TowM3/XiihIE5qZiOjj814pdfxEcCr/jEGGcaVo=; b=ZF9SxQkpGkHdd8MORs0PM7+JxzPT5DxhOEPAFzQokhNyD/uK5EoriYbtUjXQZI54uJ dRP5Yfs6fx1g4bKJyaOn5+tGWPOcApZ8JKeA7CUPOzJsgz6oZWjLxc4CsvG3nrMsXWQc OKLNBvDPskpAFxppxKQxPoGO7OVcmfBeCyYtasc1hG+5vNjG5fM6n3s69QmV/2B0fUw1 Ntd/S7E8hhjqfc9G3gZ8h6pqw7Y5lOaH51xd6gNzxG8sgykelKP1+yXfFsAHq/deZIao VoxGk24KysDppV6jlClVCtj9/o8RkNk9b4ohPARgpqIg2rjv5fBAxkQGcUgt76R6iia8 SgNg== X-Gm-Message-State: AOAM5316Tzga9x2l3TpGFGZmcp52DECRa0baeMtfaWnat0pC1F0YLzui l3KDAc3fAYxxkFucOxsi/1vOzw== X-Google-Smtp-Source: ABdhPJxb6KHri7P5pcwCwjK+OsRpBfJgRhE+oIUChm9EBPTLrDj6cO5aScpOPnARepoONd7BYoDTjA== X-Received: by 2002:adf:e8cb:: with SMTP id k11mr20325285wrn.91.1603120389675; Mon, 19 Oct 2020 08:13:09 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 05/10] target/arm: Don't allow BLX imm for M-profile Date: Mon, 19 Oct 2020 16:12:56 +0100 Message-Id: <20201019151301.2046-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The BLX immediate insn in the Thumb encoding always performs a switch from Thumb to Arm state. This would be totally useless in M-profile which has no Arm decoder, and so the instruction does not exist at all there. Make the encoding UNDEF for M-profile. (This part of the encoding space is used for the branch-future and low-overhead-loop insns in v8.1M.) Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/translate.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index c145775438e..613bc0b9f1e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7880,6 +7880,14 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *= a) { TCGv_i32 tmp; =20 + /* + * BLX would be useless on M-profile; the encoding space + * is used for other insns from v8.1M onward, and UNDEFs before that. + */ + if (arm_dc_feature(s, ARM_FEATURE_M)) { + return false; + } + /* For A32, ARM_FEATURE_V5 is checked near the start of the uncond blo= ck. */ if (s->thumb && (a->imm & 2)) { return false; --=20 2.20.1