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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SjAOm7vNdY1fRUdfqYZeeidFWrwzSxpq+qzgfHwNtsM=; b=tALTCdeiFwC/7fynmi9JXz2zPwiHM/TCHffDUEDNeuvHvSJ6BghwLtZx15rlpC4vRy /UKegIHpU8yEcrEyr6hl7BvmGCkybV1zK9u8ZSO35GUnZXDE0xdr9+DXSQ5ZZfniwB7K w5ZH+9nS1NDpVap5Ma1GqcoK4JZRo6CX3Yo4GJK4vfnYnmb8v62tedyFICylQ6NMb/Wi u73mxIBAw2pFFsc6EkBfQzB8QWN+6ebbiZMAnk0HnKNp6Xx5WmFPIhAjfR5oXT4xYDlP adLGlOhJS1lKIV5vNP6BxMWWfhtX2lq4cx87NL7CVuiWDM5Dd6SeopSNfmgxZfciTmMl R5nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SjAOm7vNdY1fRUdfqYZeeidFWrwzSxpq+qzgfHwNtsM=; b=pSg+X14Y3S7G4RMsh0niqpVqg+pYXKBaaf33SMBI+/XlPL9SaCNWtTJMr8VzDMdq8X 92WT0jTPNYzfv+ze2YuWxcquQ53skIXm6u/PZwjoDhRS2qR0HscAk4tPA5H1i/TGN5i/ If18OAHR8GkgR7oE+JIoJjbEh9JwJLAdRTqcokKsEWjcKGbHuTCqfxtADmgIlUex7FdL O2tbhjptI4j6DfHAKMkrayUMeXj9BR+MSduiSC9/NfCyx2B6UB7o8CqasQ9OVG0Zj9ej w1oNN86j871sZxZQlV5KwBXB1ykw2E34btDUOcYhvuUOOIoNn7vIrGmNC+TzVEaAn7Km PjYw== X-Gm-Message-State: AOAM533mMwM9tuVBiKDqeWvIb40mLFdIqYHe3IodtH1iQ9JAmbSOXVXX 8ClJjl5FBVDnOxYjj9pOhHOkojmPCcq0Rg== X-Google-Smtp-Source: ABdhPJzzhVtOB3YfRnS/i8zFQmEaLoZsztOShK9Tq92Liv8ea4a8u6+OL4kaOtBQhu5+7nuWJBwVLw== X-Received: by 2002:a1c:ddc2:: with SMTP id u185mr18714567wmg.21.1603120384901; Mon, 19 Oct 2020 08:13:04 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 01/10] decodetree: Fix codegen for non-overlapping group inside overlapping group Date: Mon, 19 Oct 2020 16:12:52 +0100 Message-Id: <20201019151301.2046-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" For nested groups like: { [ pattern 1 pattern 2 ] pattern 3 } the intended behaviour is that patterns 1 and 2 must not overlap with each other; if the insn matches neither then we fall through to pattern 3 as the next thing in the outer overlapping group. Currently we generate incorrect code for this situation, because in the code path for a failed match inside the inner non-overlapping group we generate a "return" statement, which causes decode to stop entirely rather than continuing to the next thing in the outer group. Generate a "break" instead, so that decode flow behaves as required for this nested group case. Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- scripts/decodetree.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/decodetree.py b/scripts/decodetree.py index 60fd3b5e5f6..c1bf3cfa85f 100644 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -548,7 +548,7 @@ class Tree: output(ind, ' /* ', str_match_bits(innerbits, innermask), ' */\n') s.output_code(i + 4, extracted, innerbits, innermask) - output(ind, ' return false;\n') + output(ind, ' break;\n') output(ind, '}\n') # end Tree =20 --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603120771; cv=none; d=zohomail.com; s=zohoarc; b=VnlR9lK1DOeqV+PevK+qlZuefHsF+5clyxs7fWOug77QkG5P1RmcobugoxfC8ddhfttb1m+eS7eM7B5SGfCT5H+of8aF277x7BvR/WMzXu5MRxE5nYfwieO+DmOV/beMf0nxGuNvOWK3osdJBpIgZV9Y1K4OOj0McnzIyuI7wAI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603120771; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=73sxXQONcqBgzHuOsaIz5hu+3BY6+pw52N6WyKkQfZo=; b=b9XcRfQ8z9xvztDOPxQvoiFLBXm651pD2eiv61zztWumZs8NUCK7U2H1H3dkfbi3J9eza5khbG3rSStqNrKGQ9qC8+81OAWWmcj5HyDODFou+mPszTjEoWidd7iPgo36ztuTDQs8ER2lpIGmYuN5zbjG0tZ37cKcPHQapKWave4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603120771044330.9252938325433; Mon, 19 Oct 2020 08:19:31 -0700 (PDT) Received: from localhost ([::1]:38920 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUWwa-00058z-MP for importer@patchew.org; Mon, 19 Oct 2020 11:19:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41898) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqW-0006p9-1H for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:12 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:40606) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqS-0002jp-9s for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:10 -0400 Received: by mail-wm1-x343.google.com with SMTP id k18so185505wmj.5 for ; Mon, 19 Oct 2020 08:13:07 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=73sxXQONcqBgzHuOsaIz5hu+3BY6+pw52N6WyKkQfZo=; b=dV3shNVINT2JmGcZ1DoEKBgo9PJ/JaVd55gCmwwFC+lFWWGb5+ZfGSXWV1xK7BZ51u L0Ex2krQo7iSxfdR3rQXSxjyDOTNeUkbNLl9pG1q9dFLZfq0pjkp72KhS6jz9iSPcEBb 0b6nmnkTpBcHB8J88cjm9Wkyd3nCWJVsx6lNXwIquyKQBmPABGm3G6TFmI/QGcDR1MtC 7pnu2LFP0/EM5TXjMbC8VwUsGN2M/UppNjSZjA3dKTfKfb8ygrHZRm0NiaMmXtZLxZsg woeGbEsar7EW9nfvQbZOjMVW3v7f13CXcjkQ9W197stScAkYeju/zHkd7jbsKkGYguSq DIsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=73sxXQONcqBgzHuOsaIz5hu+3BY6+pw52N6WyKkQfZo=; b=ZtrFdIGM4RC12jrefq2+8h2ylJ/AXFwut/RsgKlSrAcSFKCWy4DJY5/oWmxWNR1Vsy bv2+kOh6Vq5jZcnJUlHedVCPe+SQ1hrUOFuxfAOVPa5Mwr4ifyw4UBwfj1Z/Rba+dqj+ MGe0VgFiyE+bBZcMACCddM6UKHtE605jvR15SCZGkZNgKjqOMVtYsYoTxL2f5jYoauN7 foYv0nv1ji0KePAMxGmrWYtnGX96BuM6uw/1c4k4jMBCTicGmdsAkLTAXy0mY9BEcRcF ESsWUv7LDg3P0/Vqf4SusIHGaeQlUNa8EWxO8VjAnWdNwlwaoxuVt+SqskJgHgsayqw/ rqxQ== X-Gm-Message-State: AOAM532CTjDvTTonW+65KDfaEtgzBng9q32dbkkJEmNemGFEXIxB/d2i 7ISTi0WYA9ClnawOHNOitJy+IQ== X-Google-Smtp-Source: ABdhPJznDz8+FedrzMjkeEfryTakU/AHDCY074XsNveDtAwczKWinYFPt7nJmtFpebo5nskeNeIwwQ== X-Received: by 2002:a1c:3c4:: with SMTP id 187mr44004wmd.14.1603120386263; Mon, 19 Oct 2020 08:13:06 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 02/10] target/arm: Implement v8.1M NOCP handling Date: Mon, 19 Oct 2020 16:12:53 +0100 Message-Id: <20201019151301.2046-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From v8.1M, disabled-coprocessor handling changes slightly: * coprocessors 8, 9, 14 and 15 are also governed by the cp10 enable bit, like cp11 * an extra range of instruction patterns is considered to be inside the coprocessor space We previously marked these up with TODO comments; implement the correct behaviour. Unfortunately there is no ID register field which indicates this behaviour. We could in theory test an unrelated ID register which indicates guaranteed-to-be-in-v8.1M behaviour like ID_ISAR0.CmpBranch >=3D 3 (low-overhead-loops), but it seems better to simply define a new ARM_FEATURE_V8_1M feature flag and use it for this and other new-in-v8.1M behaviour that isn't identifiable from the ID registers. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/cpu.h | 1 + target/arm/m-nocp.decode | 10 ++++++---- target/arm/translate-vfp.c.inc | 17 +++++++++++++++-- 3 files changed, 22 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index cfff1b5c8fe..74392fa0295 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1985,6 +1985,7 @@ enum arm_features { ARM_FEATURE_VBAR, /* has cp15 VBAR */ ARM_FEATURE_M_SECURITY, /* M profile Security Extension */ ARM_FEATURE_M_MAIN, /* M profile Main Extension */ + ARM_FEATURE_V8_1M, /* M profile extras only in v8.1M and later */ }; =20 static inline int arm_feature(CPUARMState *env, int feature) diff --git a/target/arm/m-nocp.decode b/target/arm/m-nocp.decode index 7182d7d1217..28c8ac6b94c 100644 --- a/target/arm/m-nocp.decode +++ b/target/arm/m-nocp.decode @@ -29,14 +29,16 @@ # If the coprocessor is not present or disabled then we will generate # the NOCP exception; otherwise we let the insn through to the main decode. =20 +&nocp cp + { # Special cases which do not take an early NOCP: VLLDM and VLSTM VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 0000 0000 # TODO: VSCCLRM (new in v8.1M) is similar: #VSCCLRM 1110 1100 1-01 1111 ---- 1011 ---- ---0 =20 - NOCP 111- 1110 ---- ---- ---- cp:4 ---- ---- - NOCP 111- 110- ---- ---- ---- cp:4 ---- ---- - # TODO: From v8.1M onwards we will also want this range to NOCP - #NOCP_8_1 111- 1111 ---- ---- ---- ---- ---- ---- cp=3D10 + NOCP 111- 1110 ---- ---- ---- cp:4 ---- ---- &nocp + NOCP 111- 110- ---- ---- ---- cp:4 ---- ---- &nocp + # From v8.1M onwards this range will also NOCP: + NOCP_8_1 111- 1111 ---- ---- ---- ---- ---- ---- &nocp cp=3D10 } diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc index 28e0dba5f14..cc9ffb95887 100644 --- a/target/arm/translate-vfp.c.inc +++ b/target/arm/translate-vfp.c.inc @@ -3459,7 +3459,7 @@ static bool trans_VLLDM_VLSTM(DisasContext *s, arg_VL= LDM_VLSTM *a) return true; } =20 -static bool trans_NOCP(DisasContext *s, arg_NOCP *a) +static bool trans_NOCP(DisasContext *s, arg_nocp *a) { /* * Handle M-profile early check for disabled coprocessor: @@ -3472,7 +3472,11 @@ static bool trans_NOCP(DisasContext *s, arg_NOCP *a) if (a->cp =3D=3D 11) { a->cp =3D 10; } - /* TODO: in v8.1M cp 8, 9, 14, 15 also are governed by the cp10 enable= */ + if (arm_dc_feature(s, ARM_FEATURE_V8_1M) && + (a->cp =3D=3D 8 || a->cp =3D=3D 9 || a->cp =3D=3D 14 || a->cp =3D= =3D 15)) { + /* in v8.1M cp 8, 9, 14, 15 also are governed by the cp10 enable */ + a->cp =3D 10; + } =20 if (a->cp !=3D 10) { gen_exception_insn(s, s->pc_curr, EXCP_NOCP, @@ -3489,6 +3493,15 @@ static bool trans_NOCP(DisasContext *s, arg_NOCP *a) return false; } =20 +static bool trans_NOCP_8_1(DisasContext *s, arg_nocp *a) +{ + /* This range needs a coprocessor check for v8.1M and later only */ + if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) { + return false; + } + return trans_NOCP(s, a); +} + static bool trans_VINS(DisasContext *s, arg_VINS *a) { TCGv_i32 rd, rm; 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ikEdl6rx0OeiOU/X5Loal0K6ppxgDNTAV6c5EKnjG6I=; b=QVH/+hd14D3lnF6cy7qMa4xgoaIS8SN8fD3jQwNYVtMbJFbLQktfGv3nyvz2Hm1+Ag MIQq7wOK+HvdnzAraImkjT5BfpH6wibQxGzfPG6KOmaZ4pfPKX8GpAL4v/6AxdXmCkHd 6yviXa/JjKZ0AX4F7HVlG1v3BFnZ/ea4lX9uvQruT76Lj0UWBJLxTn56C/UtFX7dBAtN 0ldGWu7wYgzytyFqopn4Zad6+R5LM7+qz7OglyYdhCt7BJHNbRa526Jplk8BJuCCjIzj q57YNVxSwtzFJJMzkHuBczGhgbA28oiKzbHdgBPi5VfLCs3kfEZhfUZv+7A/jPGRH791 hScQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ikEdl6rx0OeiOU/X5Loal0K6ppxgDNTAV6c5EKnjG6I=; b=g+bSKHotsb360nIgaMmYd6gX++zCvXj4AvY44Q/fYhdepeGSD2YVq7FKkvCb++gyZ/ MuSQUVwwgmRDme4J6u6mIvXwMYWmfq1pxDjaYvzXMtLjasi7r+84ahSn9HgSKGmVv7Pw wOJsbmAq5UQHsB/uE3rAHN7lOmGsq0RTxDBqcZT+oTZ7SdZqCpTNvqE+OKfzvl3HAtFf NiYctvh3nSZHHMRFpNsCoVwmpBsR7U+iLnwDrpteAPAe4taY2HjYcA/MtAUut1ko3jVc c1shHC1BxQFwKKkKm8xPAlzcMdyW+OpV/hYKMBNIXS3Vdw6n4k+cEJYaretnEWkh6Gng dpww== X-Gm-Message-State: AOAM530XGRMKXsRrbo6+YPFwmFZvGJ2rauBwkksgqchi8ndq7tpPHTJE ooPiGjJRY3UPY5gPCUYRMOeolw== X-Google-Smtp-Source: ABdhPJxiQ/9nRtzqD0zHMJTrW+Uv2vDHrldqaKOwnNYpcg5mfbwtus5qtmQP7gdyTQafmPC4SyEiSw== X-Received: by 2002:adf:e38f:: with SMTP id e15mr7650wrm.294.1603120387422; Mon, 19 Oct 2020 08:13:07 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 03/10] target/arm: Implement v8.1M conditional-select insns Date: Mon, 19 Oct 2020 16:12:54 +0100 Message-Id: <20201019151301.2046-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" v8.1M brings four new insns to M-profile: * CSEL : Rd =3D cond ? Rn : Rm * CSINC : Rd =3D cond ? Rn : Rm+1 * CSINV : Rd =3D cond ? Rn : ~Rm * CSNEG : Rd =3D cond ? Rn : -Rm Implement these. Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/t32.decode | 3 +++ target/arm/translate.c | 60 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/target/arm/t32.decode b/target/arm/t32.decode index 7069d821fde..d8454bd814e 100644 --- a/target/arm/t32.decode +++ b/target/arm/t32.decode @@ -90,6 +90,9 @@ SBC_rrri 1110101 1011 . .... 0 ... .... .... ....= @s_rrr_shi } RSB_rrri 1110101 1110 . .... 0 ... .... .... .... @s_rrr_shi =20 +# v8.1M CSEL and friends +CSEL 1110101 0010 1 rn:4 10 op:2 rd:4 fcond:4 rm:4 + # Data-processing (register-shifted register) =20 MOV_rxrr 1111 1010 0 shty:2 s:1 rm:4 1111 rd:4 0000 rs:4 \ diff --git a/target/arm/translate.c b/target/arm/translate.c index d34c1d351a6..c145775438e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8224,6 +8224,66 @@ static bool trans_IT(DisasContext *s, arg_IT *a) return true; } =20 +/* v8.1M CSEL/CSINC/CSNEG/CSINV */ +static bool trans_CSEL(DisasContext *s, arg_CSEL *a) +{ + TCGv_i32 rn, rm, zero; + DisasCompare c; + + if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) { + return false; + } + + if (a->rm =3D=3D 13) { + /* SEE "Related encodings" (MVE shifts) */ + return false; + } + + if (a->rd =3D=3D 13 || a->rd =3D=3D 15 || a->rn =3D=3D 13 || a->fcond = >=3D 14) { + /* CONSTRAINED UNPREDICTABLE: we choose to UNDEF */ + return false; + } + + /* In this insn input reg fields of 0b1111 mean "zero", not "PC" */ + if (a->rn =3D=3D 15) { + rn =3D tcg_const_i32(0); + } else { + rn =3D load_reg(s, a->rn); + } + if (a->rm =3D=3D 15) { + rm =3D tcg_const_i32(0); + } else { + rm =3D load_reg(s, a->rm); + } + + switch (a->op) { + case 0: /* CSEL */ + break; + case 1: /* CSINC */ + tcg_gen_addi_i32(rm, rm, 1); + break; + case 2: /* CSINV */ + tcg_gen_not_i32(rm, rm); + break; + case 3: /* CSNEG */ + tcg_gen_neg_i32(rm, rm); + break; + default: + g_assert_not_reached(); + } + + arm_test_cc(&c, a->fcond); + zero =3D tcg_const_i32(0); + tcg_gen_movcond_i32(c.cond, rn, c.value, zero, rn, rm); + arm_free_cc(&c); + tcg_temp_free_i32(zero); + + store_reg(s, a->rd, rn); + tcg_temp_free_i32(rm); + + return true; +} + /* * Legacy decoder. */ --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603121038; cv=none; d=zohomail.com; s=zohoarc; b=abiDZ6yyTmwrlce4Zy+cnUmXGcUv9rWwBzvV+V/RBBDTTFjvPjNkTQA2aRgJ/NgIU4XTRCrcb6LXIzAh/1QUMgJN3FUApNRSlaH1sI57gHndrYJlH46vzrcxrts0ptk0rWfrf0LJLXR9HOw/jnxteNaXrBkW7xhVXISJsYkP0VE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603121038; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=kLCgJNRELMxG1PAWJwJlgP80Ymoy4kuq1bsu+yq9fEQ=; b=CcuSXeT4+SQLvH3hBmSsrUH4T/nqjObiFgLsnuYaS4l2R1nQ9CD3CI1hN8ADzCuDFLCC0BLGECh/Nz0v0KpZ82PoSHbrWj1Y6DIFuq9NxLPNpcp2wPZ6VShchJYoRRSwRv2a3eQWNblPNMFS+b02U7zwSZQqmK6lvnNnIs+7aRs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603121038657971.7664968157649; Mon, 19 Oct 2020 08:23:58 -0700 (PDT) Received: from localhost ([::1]:53004 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUX0t-0002mc-IV for importer@patchew.org; Mon, 19 Oct 2020 11:23:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42018) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqZ-0006sV-Fx for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:15 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:33366) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqV-0002kJ-Up for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:14 -0400 Received: by mail-wr1-x441.google.com with SMTP id b8so180015wrn.0 for ; Mon, 19 Oct 2020 08:13:09 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kLCgJNRELMxG1PAWJwJlgP80Ymoy4kuq1bsu+yq9fEQ=; b=q8oKyXk8lShUd8g1quoB7Qr1ZdncnUXrAW3TcBPPd06bpvGw1ESIGJNfEKmubWDsyq rsd0orW58GjAf4L7c2ewRj0aSlxh7xQEX2qOHiG/sQbCQlqde35mAiRvpiVKh2fLNveq 7NyCVLEbKfc/oVjaqAOySWfb5qgrTJvCEKmHBuUMyNY7/R3X9SUbThLUHFFGQuHAI2uV gOZnAfxlZX7WgMkQrq4iRWqFdGy6lXObIYz3ruBafJE5bkhVANow0FoRAP4ZZ8eZJ8Nz CMO51IVl5Ky4xs9nbUH0Pdh5igYXVRJCmP5FA8LAq67hUoQ+JpXVdZdp1Qx+13ETt/n7 BHvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kLCgJNRELMxG1PAWJwJlgP80Ymoy4kuq1bsu+yq9fEQ=; b=DXk8LR6L6qVAqkMvP9TA+FNByO4B5YwvyxJjGtijja/SdU2YX5pHkN8TCNRXHcXXGM EA6IiEj3xn/dSSDt/1jDrWJ0rP/aoN3HKaABbuQ11icWCloTuPmtwkGhW5IwAgRH/SaV gIwyz8qBIHxIR+fxISM9sVM/aho7CWZjug4siK9yUnn9zugHVEIoiLizf3ZAt0iFUAUS 2H6jRspzBoVlfubWKCgYG9ver2B3XZHVCLQwntQveLxV13a0ZShIHdigpPpmglj6IlkT 01Mccd+jSlkQMqQ0iPp5Koo/ubZfZzmAFJEETtoujW0/CkLNF/kqB7pIYn11GV4fJdnY ZN+g== X-Gm-Message-State: AOAM5319Ylehh7iOzIYu3emcQ9dpt9jmJfG6V0h75D7hWjmT+QKpOWfX O9VH1aw1ZkCHz/M0+NEaH2pCdQ== X-Google-Smtp-Source: ABdhPJzhe4PUVIdfJqtJdpDK+9K7Sp5MC4wZZnRr5e9G/Zy/omywWpMwFoEHKpbskPQPRNVCGHyB6A== X-Received: by 2002:a5d:480b:: with SMTP id l11mr20640042wrq.225.1603120388580; Mon, 19 Oct 2020 08:13:08 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 04/10] target/arm: Make the t32 insn[25:23]=111 group non-overlapping Date: Mon, 19 Oct 2020 16:12:55 +0100 Message-Id: <20201019151301.2046-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The t32 decode has a group which represents a set of insns which overlap with B_cond_thumb because they have [25:23]=3D111 (which is an invalid condition code field for the branch insn). This group is currently defined using the {} overlap-OK syntax, but it is almost entirely non-overlapping patterns. Switch it over to use a non-overlapping group. For this to be valid syntactically, CPS must move into the same overlapping-group as the hint insns (CPS vs hints was the only actual use of the overlap facility for the group). The non-overlapping subgroup for CLREX/DSB/DMB/ISB/SB is no longer necessary and so we can remove it (promoting those insns to be members of the parent group). Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/t32.decode | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/target/arm/t32.decode b/target/arm/t32.decode index d8454bd814e..7d5e000e82c 100644 --- a/target/arm/t32.decode +++ b/target/arm/t32.decode @@ -296,8 +296,8 @@ CLZ 1111 1010 1011 ---- 1111 .... 1000 ...= . @rdm { # Group insn[25:23] =3D 111, which is cond=3D111x for the branch below, # or unconditional, which would be illegal for the branch. - { - # Hints + [ + # Hints, and CPS { YIELD 1111 0011 1010 1111 1000 0000 0000 0001 WFE 1111 0011 1010 1111 1000 0000 0000 0010 @@ -310,20 +310,18 @@ CLZ 1111 1010 1011 ---- 1111 .... 1000 .= ... @rdm # The canonical nop ends in 0000 0000, but the whole rest # of the space is "reserved hint, behaves as nop". NOP 1111 0011 1010 1111 1000 0000 ---- ---- + + # If imod =3D=3D '00' && M =3D=3D '0' then SEE "Hint instructions", = above. + CPS 1111 0011 1010 1111 1000 0 imod:2 M:1 A:1 I:1 F:1 mode:5 \ + &cps } =20 - # If imod =3D=3D '00' && M =3D=3D '0' then SEE "Hint instructions", ab= ove. - CPS 1111 0011 1010 1111 1000 0 imod:2 M:1 A:1 I:1 F:1 mode:5 \ - &cps - # Miscellaneous control - [ - CLREX 1111 0011 1011 1111 1000 1111 0010 1111 - DSB 1111 0011 1011 1111 1000 1111 0100 ---- - DMB 1111 0011 1011 1111 1000 1111 0101 ---- - ISB 1111 0011 1011 1111 1000 1111 0110 ---- - SB 1111 0011 1011 1111 1000 1111 0111 0000 - ] + CLREX 1111 0011 1011 1111 1000 1111 0010 1111 + DSB 1111 0011 1011 1111 1000 1111 0100 ---- + DMB 1111 0011 1011 1111 1000 1111 0101 ---- + ISB 1111 0011 1011 1111 1000 1111 0110 ---- + SB 1111 0011 1011 1111 1000 1111 0111 0000 =20 # Note that the v7m insn overlaps both the normal and banked insn. { @@ -351,7 +349,7 @@ CLZ 1111 1010 1011 ---- 1111 .... 1000 ...= . @rdm HVC 1111 0111 1110 .... 1000 .... .... .... \ &i imm=3D%imm16_16_0 UDF 1111 0111 1111 ---- 1010 ---- ---- ---- - } + ] B_cond_thumb 1111 0. cond:4 ...... 10.0 ............ &ci imm=3D%i= mm21 } =20 --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603120576; cv=none; d=zohomail.com; s=zohoarc; b=EBQZF5ry0QieVdqnkyaK6IoljJIwLcK9CYDHstbRfaqrmYkKEY/NPI5ZbL0/hyVJqIBKSrCZejkqAY9WcibExB1XLSY7QHOyS44v6zueTDEGDdGPyyelycB913TQqjxQWbqsjIqzyaUMOSfFucZ80ngzAzTtDb3+rH8cowX4bZQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603120576; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EUu3TowM3/XiihIE5qZiOjj814pdfxEcCr/jEGGcaVo=; b=Ky+X7fSIMlo7HGCy/18b9gF7iV2cIK2pApzbyi5XnaIZfAA9Y5xp2UX1X7bjdqpmpLUzoBUvRTb2N7DJK1WaPWOle9snSaYEu/ni46cyeiJ4MBfqHZ4F4KpUdBYfU4HtAyjE0wxcufyf0GXclVuj3gcZT8iVuuJIYR2s/tavK74= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603120576787381.0409629032199; Mon, 19 Oct 2020 08:16:16 -0700 (PDT) Received: from localhost ([::1]:58736 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUWtT-0001Td-E9 for importer@patchew.org; Mon, 19 Oct 2020 11:16:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqa-0006ti-HO for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:17 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:42524) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqW-0002kW-5A for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:16 -0400 Received: by mail-wr1-x444.google.com with SMTP id j7so106510wrt.9 for ; Mon, 19 Oct 2020 08:13:10 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EUu3TowM3/XiihIE5qZiOjj814pdfxEcCr/jEGGcaVo=; b=bUHlOKo1wbgmVu62s6KmEqmbmxR7Q+RGw2pR1H4mA7sJmZi/G3t3eLEnhKUPJAefKO LoNWcJziUeD+og/S1RzxSPhIYL9jxk2lySOpLfc5IYpR0XKlziBCXVa0yFYC83Tuodum 0Mm0LSS+9J51KviSrW/G2D4QfHUYmyHQFofCj++8cDRxAds4YEOh+E89JDZ7S81KaORR bKAiWH+jPHkK5y40KDY+Rt7oySjndSfxmYjoCONjJmLZlKn33sxsVCAXk4GH1WTPSBQn oXRwT6T9aDUrF7KEkEmqRB2xMa0JteYDyFdcBXJUl3nmFI1kIWeKQFoUSOgFsTDZJxi+ acxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EUu3TowM3/XiihIE5qZiOjj814pdfxEcCr/jEGGcaVo=; b=ZF9SxQkpGkHdd8MORs0PM7+JxzPT5DxhOEPAFzQokhNyD/uK5EoriYbtUjXQZI54uJ dRP5Yfs6fx1g4bKJyaOn5+tGWPOcApZ8JKeA7CUPOzJsgz6oZWjLxc4CsvG3nrMsXWQc OKLNBvDPskpAFxppxKQxPoGO7OVcmfBeCyYtasc1hG+5vNjG5fM6n3s69QmV/2B0fUw1 Ntd/S7E8hhjqfc9G3gZ8h6pqw7Y5lOaH51xd6gNzxG8sgykelKP1+yXfFsAHq/deZIao VoxGk24KysDppV6jlClVCtj9/o8RkNk9b4ohPARgpqIg2rjv5fBAxkQGcUgt76R6iia8 SgNg== X-Gm-Message-State: AOAM5316Tzga9x2l3TpGFGZmcp52DECRa0baeMtfaWnat0pC1F0YLzui l3KDAc3fAYxxkFucOxsi/1vOzw== X-Google-Smtp-Source: ABdhPJxb6KHri7P5pcwCwjK+OsRpBfJgRhE+oIUChm9EBPTLrDj6cO5aScpOPnARepoONd7BYoDTjA== X-Received: by 2002:adf:e8cb:: with SMTP id k11mr20325285wrn.91.1603120389675; Mon, 19 Oct 2020 08:13:09 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 05/10] target/arm: Don't allow BLX imm for M-profile Date: Mon, 19 Oct 2020 16:12:56 +0100 Message-Id: <20201019151301.2046-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The BLX immediate insn in the Thumb encoding always performs a switch from Thumb to Arm state. This would be totally useless in M-profile which has no Arm decoder, and so the instruction does not exist at all there. Make the encoding UNDEF for M-profile. (This part of the encoding space is used for the branch-future and low-overhead-loop insns in v8.1M.) Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/translate.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index c145775438e..613bc0b9f1e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7880,6 +7880,14 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *= a) { TCGv_i32 tmp; =20 + /* + * BLX would be useless on M-profile; the encoding space + * is used for other insns from v8.1M onward, and UNDEFs before that. + */ + if (arm_dc_feature(s, ARM_FEATURE_M)) { + return false; + } + /* For A32, ARM_FEATURE_V5 is checked near the start of the uncond blo= ck. */ if (s->thumb && (a->imm & 2)) { return false; --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603120576; cv=none; d=zohomail.com; s=zohoarc; b=InCz24A1GdtiAG5wM6Mf5EZ/HbaGhEGvp/USSbQ/uNJZUmOGbTFN1jXB9i8LKcSVNEyCP8+HtfgbW6S196G8yHWRfjX9pJ7+fY3STVFl5Nlj9iBvJjA+8+vxEvuTbP3wWhybcDRjSCvKT8poGmhbaU3lA/938HlfijwSYzdk7eo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603120576; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=V/LvLA2iccBjOYEyw5LIs4r+VXSRSZkC4Y1G+GAL/2E=; b=M+emwPPlaG52DW4i1zFsDrEITeUoy8wPls28ek1L4ov7nrJWf1yF1K/SBcCxlDi3aE1S2CL++BYeGlIpp8n6aFgT/fpG9+lk+X26lLuO3Mgr5VnMmz6aDoZTvGYxxbA9X6qQoFXfNjCNv+nY4Ylyc93RVcBe2pJ3UZpwFZhMf54= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603120576341608.0194540696996; Mon, 19 Oct 2020 08:16:16 -0700 (PDT) Received: from localhost ([::1]:58756 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUWtT-0001UO-6T for importer@patchew.org; Mon, 19 Oct 2020 11:16:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42020) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqZ-0006sX-H6 for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:15 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:35321) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqW-0002ku-9j for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:15 -0400 Received: by mail-wr1-x42e.google.com with SMTP id n15so163641wrq.2 for ; Mon, 19 Oct 2020 08:13:11 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=V/LvLA2iccBjOYEyw5LIs4r+VXSRSZkC4Y1G+GAL/2E=; b=y4UvonsnDn+6CnxdU+2JjXf4GReaMo6lQA+vxo7XclTU24qClWaXBi0B9BRiBaUHfl wi+q/8ch3dgCgj1DI4Zai7b4o2fq28Ei5pQNrDc9lX11QpcFFom04yZtkGjkDrxlUIZA P4ZIyJFg4QE31amEPGKrbZne0FyTp8Hyk3H+cxMlO89h5GBLp8xP/u0afrDtl+bxymYl CH6q7W5+gbJWvJzozwF84+wHctaZ8+wR9GJ+JU2/D/6Hb6sJ+JYJ5mHw20yerxkD8wxx UPtp2SDtNJeIFYoYfcTigcR575C7m0ZLh5Zz0e3/owlq+zJBXdHKCKZd14MjiwfF0nda Spiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=V/LvLA2iccBjOYEyw5LIs4r+VXSRSZkC4Y1G+GAL/2E=; b=Gj1cwskiVtPLQVUxsBCAn4RmrTZsEIr0FvWDZdc8QUx9+RwQn9MGEHevDkwnjAulpQ cV3LMm3FGAMfo8MObET/+rn3wohwI0yA0lYtjz8PEEsd4gRItswt+gv5qIFnDcnjAqW7 UPCktTxi49uS3YyQDxnZlPeFovcCvm0X6EjsdrTjM/hoETaBMkurJ3fFCzRqHId2jRcg fkgOfXHoefRHup+rN4Peo7pVPx1S7Tml1/bu9JGtu++7+IJDGE0IbLYU5BgjKoi0MaGB bkvl5TnNHHHi77csx2iHEvR+BaoS2i5FhVLAutHU/AsTVVGT6cq66w+5j8O7kgGBo6wq Gh2A== X-Gm-Message-State: AOAM530i54xiW/vYIOhtgLSQO0EH3FmY8Je88DD1ySxp8x1LZIt/6TX9 mc4odJ5ZBrPAYUFyc+cP9z1IVg== X-Google-Smtp-Source: ABdhPJwR4xUGDG6cB9ZB1wEFV0UcLVK6On7ZHBWwY7kvn5sUqAZm7HEag1VbjiAFuPkxdbymOqHgkQ== X-Received: by 2002:a5d:498a:: with SMTP id r10mr33540wrq.106.1603120390932; Mon, 19 Oct 2020 08:13:10 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 06/10] target/arm: Implement v8.1M branch-future insns (as NOPs) Date: Mon, 19 Oct 2020 16:12:57 +0100 Message-Id: <20201019151301.2046-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" v8.1M implements a new 'branch future' feature, which is a set of instructions that request the CPU to perform a branch "in the future", when it reaches a particular execution address. In hardware, the expected implementation is that the information about the branch location and destination is cached and then acted upon when execution reaches the specified address. However the architecture permits an implementation to discard this cached information at any point, and so guest code must always include a normal branch insn at the branch point as a fallback. In particular, an implementation is specifically permitted to treat all BF insns as NOPs (which is equivalent to discarding the cached information immediately). For QEMU, implementing this caching of branch information would be complicated and would not improve the speed of execution at all, so we make the IMPDEF choice to implement all BF insns as NOPs. Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/cpu.h | 6 ++++++ target/arm/t32.decode | 13 ++++++++++++- target/arm/translate.c | 20 ++++++++++++++++++++ 3 files changed, 38 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 74392fa0295..a432f301f11 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3473,6 +3473,12 @@ static inline bool isar_feature_aa32_arm_div(const A= RMISARegisters *id) return FIELD_EX32(id->id_isar0, ID_ISAR0, DIVIDE) > 1; } =20 +static inline bool isar_feature_aa32_lob(const ARMISARegisters *id) +{ + /* (M-profile) low-overhead loops and branch future */ + return FIELD_EX32(id->id_isar0, ID_ISAR0, CMPBRANCH) >=3D 3; +} + static inline bool isar_feature_aa32_jazelle(const ARMISARegisters *id) { return FIELD_EX32(id->id_isar1, ID_ISAR1, JAZELLE) !=3D 0; diff --git a/target/arm/t32.decode b/target/arm/t32.decode index 7d5e000e82c..3015731a8d0 100644 --- a/target/arm/t32.decode +++ b/target/arm/t32.decode @@ -648,4 +648,15 @@ MRC 1110 1110 ... 1 .... .... .... ... 1 = .... @mcr =20 B 1111 0. .......... 10.1 ............ @branch24 BL 1111 0. .......... 11.1 ............ @branch24 -BLX_i 1111 0. .......... 11.0 ............ @branch24 +{ + # BLX_i is non-M-profile only + BLX_i 1111 0. .......... 11.0 ............ @branch24 + # M-profile only: loop and branch insns + [ + # All these BF insns have boff !=3D 0b0000; we NOP them all + BF 1111 0 boff:4 ------- 1100 - ---------- 1 # BFL + BF 1111 0 boff:4 0 ------ 1110 - ---------- 1 # BFCSEL + BF 1111 0 boff:4 10 ----- 1110 - ---------- 1 # BF + BF 1111 0 boff:4 11 ----- 1110 0 0000000000 1 # BFX, BFLX + ] +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 613bc0b9f1e..01b697083a0 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7933,6 +7933,26 @@ static bool trans_BLX_suffix(DisasContext *s, arg_BL= X_suffix *a) return true; } =20 +static bool trans_BF(DisasContext *s, arg_BF *a) +{ + /* + * M-profile branch future insns. The architecture permits an + * implementation to implement these as NOPs (equivalent to + * discarding the LO_BRANCH_INFO cache immediately), and we + * take that IMPDEF option because for QEMU a "real" implementation + * would be complicated and wouldn't execute any faster. + */ + if (!dc_isar_feature(aa32_lob, s)) { + return false; + } + if (a->boff =3D=3D 0) { + /* SEE "Related encodings" (loop insns) */ + return false; + } + /* Handle as NOP */ + return true; +} + static bool op_tbranch(DisasContext *s, arg_tbranch *a, bool half) { TCGv_i32 addr, tmp; --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603120793; cv=none; d=zohomail.com; s=zohoarc; b=TbkoiIjZLL952AaF+Mlh5OW8YoQuw0h1UYUY8ENFEhLTlMWti7wfF5KyHty/H4JU8Ch4nqW3FTbHsO6xFyhVMB7OIIHbrvOCnhr09eqUz9SxEd4bazcijnTgX4Jjjn7AH07+TwM+xzic8PId33t0aI8jAA3ZpH2cpTx15HdjBvE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603120793; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ef3HmBS2nRGxZqZRT4CTCAq+5F2Nv/+vesJZx/y5JRY=; b=LC7A5rzAP5+sDNjD4jHZukUtowjdtQcrE6jUrW18zy8vsmyQnot+FNT2L1bllyJ5tebtmcrXeI7IJtoYwTIESX+Ne1KpF2+dlKTiwcV5trK5DQTOrJH5bDcyOIOmYe6VprpRe8t1R6823AODjQKtHKWYSJ/gx84WDwYOCl/KbaY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603120793006138.0669633562087; Mon, 19 Oct 2020 08:19:53 -0700 (PDT) Received: from localhost ([::1]:40210 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUWwx-0005es-TI for importer@patchew.org; Mon, 19 Oct 2020 11:19:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42092) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqb-0006uU-GA for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:17 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:45574) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqX-0002lI-9z for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:17 -0400 Received: by mail-wr1-x42e.google.com with SMTP id e17so83452wru.12 for ; Mon, 19 Oct 2020 08:13:12 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ef3HmBS2nRGxZqZRT4CTCAq+5F2Nv/+vesJZx/y5JRY=; b=Bo5wfdDBaCnY1mSbHgE0/YE7wRlWGKYdOxu1Mu6Ofc7qdeo6pOXfpytQOjXZ67gcKV jx7NyD7eShUCKcv3MGvCJYBDIVqj0wYQ0CIyJ/M5KtF2GFbEyp94f+h+Rwq1ndBEY7tb 4eIrSuzvTCP70UVKw2NSqhQohvzu0nyS7AY9ujsL7H85Go0t6kiyK8nujvT0tocxSRfy 5IFl+PTMTN0qn6lAnKUEv6dFMrCXJnc6RqrhF4opjS7IvSHuV+GcSfOmmJ0lUmVhtx5t FjcC5GRZV7xWK2gdWEWNI+Jtf9rw9hucVHLlJ8hkfpkUuanKsj8OOFxMEomA0Ua67E/8 D4tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ef3HmBS2nRGxZqZRT4CTCAq+5F2Nv/+vesJZx/y5JRY=; b=Ro8wE17EnXE9cz/wxuZpzGzMe2p1Oh7nSL/nfnxu3ZjLfN9WzdfLeMbn61fgGeGdTV q+ZjCEPFEZg6OEnnoAtIA9kOqY0S1NtcW0cNzbi0RQISZNFmO/wg4VlztjAekKiCmK+K K48nhv6SrBlhCFBoS41oFw98I/DPhWr4Q48DZf2DuLMs/SoJ8iO7MAin1igH2728QFOd RxN8kh7rhDq5LL3TEZLQAs3e+5XBPmMJ1kYl6jt0rbB91xiEayU7sVx0u2mRuye1qmJ5 P9b1c7W5K9Jilwfq7naUVsXLs6ud8XGud7i8DcI/RpGu2666GF2Vv7w20oyeQdtDkAtr aiRg== X-Gm-Message-State: AOAM531du3HzTNoCNqvmnYv2kY5rjOjEIFAfal7QDmmanuh2HGUG8ni/ 0vMq3lZkC7aOjKMFR4izr83cuw== X-Google-Smtp-Source: ABdhPJwneFPNx1m/moSuf67oqxeXROwPeSrc/FbvYU6Odpp1Qtcm0sXYdW0pcwzxEsnum7N5sndJqA== X-Received: by 2002:a5d:684d:: with SMTP id o13mr8266wrw.302.1603120392001; Mon, 19 Oct 2020 08:13:12 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 07/10] target/arm: Implement v8.1M low-overhead-loop instructions Date: Mon, 19 Oct 2020 16:12:58 +0100 Message-Id: <20201019151301.2046-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" v8.1M's "low-overhead-loop" extension has three instructions for looping: * DLS (start of a do-loop) * WLS (start of a while-loop) * LE (end of a loop) The loop-start instructions are both simple operations to start a loop whose iteration count (if any) is in LR. The loop-end instruction handles "decrement iteration count and jump back to loop start"; it also caches the information about the branch back to the start of the loop to improve performance of the branch on subsequent iterations. As with the branch-future instructions, the architecture permits an implementation to discard the LO_BRANCH_INFO cache at any time, and QEMU takes the IMPDEF option to never set it in the first place (equivalent to discarding it immediately), because for us a "real" implementation would be unnecessary complexity. (This implementation only provides the simple looping constructs; the vector extension MVE (Helium) adds some extra variants to handle looping across vectors. We'll add those later when we implement MVE.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/t32.decode | 8 ++++ target/arm/translate.c | 93 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 99 insertions(+), 2 deletions(-) diff --git a/target/arm/t32.decode b/target/arm/t32.decode index 3015731a8d0..8152739b52b 100644 --- a/target/arm/t32.decode +++ b/target/arm/t32.decode @@ -659,4 +659,12 @@ BL 1111 0. .......... 11.1 ............ = @branch24 BF 1111 0 boff:4 10 ----- 1110 - ---------- 1 # BF BF 1111 0 boff:4 11 ----- 1110 0 0000000000 1 # BFX, BFLX ] + [ + # LE and WLS immediate + %lob_imm 1:10 11:1 !function=3Dtimes_2 + + DLS 1111 0 0000 100 rn:4 1110 0000 0000 0001 + WLS 1111 0 0000 100 rn:4 1100 . .......... 1 imm=3D%lob_i= mm + LE 1111 0 0000 0 f:1 0 1111 1100 . .......... 1 imm=3D%lob_i= mm + ] } diff --git a/target/arm/translate.c b/target/arm/translate.c index 01b697083a0..5083f828780 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -2490,17 +2490,23 @@ static void gen_goto_tb(DisasContext *s, int n, tar= get_ulong dest) s->base.is_jmp =3D DISAS_NORETURN; } =20 -static inline void gen_jmp (DisasContext *s, uint32_t dest) +/* Jump, specifying which TB number to use if we gen_goto_tb() */ +static inline void gen_jmp_tb(DisasContext *s, uint32_t dest, int tbno) { if (unlikely(is_singlestepping(s))) { /* An indirect jump so that we still trigger the debug exception. = */ gen_set_pc_im(s, dest); s->base.is_jmp =3D DISAS_JUMP; } else { - gen_goto_tb(s, 0, dest); + gen_goto_tb(s, tbno, dest); } } =20 +static inline void gen_jmp(DisasContext *s, uint32_t dest) +{ + gen_jmp_tb(s, dest, 0); +} + static inline void gen_mulxy(TCGv_i32 t0, TCGv_i32 t1, int x, int y) { if (x) @@ -7953,6 +7959,89 @@ static bool trans_BF(DisasContext *s, arg_BF *a) return true; } =20 +static bool trans_DLS(DisasContext *s, arg_DLS *a) +{ + /* M-profile low-overhead loop start */ + TCGv_i32 tmp; + + if (!dc_isar_feature(aa32_lob, s)) { + return false; + } + if (a->rn =3D=3D 13 || a->rn =3D=3D 15) { + /* CONSTRAINED UNPREDICTABLE: we choose to UNDEF */ + return false; + } + + /* Not a while loop, no tail predication: just set LR to the count */ + tmp =3D load_reg(s, a->rn); + store_reg(s, 14, tmp); + return true; +} + +static bool trans_WLS(DisasContext *s, arg_WLS *a) +{ + /* M-profile low-overhead while-loop start */ + TCGv_i32 tmp; + TCGLabel *nextlabel; + + if (!dc_isar_feature(aa32_lob, s)) { + return false; + } + if (a->rn =3D=3D 13 || a->rn =3D=3D 15) { + /* CONSTRAINED UNPREDICTABLE: we choose to UNDEF */ + return false; + } + if (s->condexec_mask) { + /* + * WLS in an IT block is CONSTRAINED UNPREDICTABLE; + * we choose to UNDEF, because otherwise our use of + * gen_goto_tb(1) would clash with the use of TB exit 1 + * in the dc->condjmp condition-failed codepath in + * arm_tr_tb_stop() and we'd get an assertion. + */ + return false; + } + nextlabel =3D gen_new_label(); + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_R[a->rn], 0, nextlabel); + tmp =3D load_reg(s, a->rn); + store_reg(s, 14, tmp); + gen_jmp_tb(s, s->base.pc_next, 1); + + gen_set_label(nextlabel); + gen_jmp(s, read_pc(s) + a->imm); + return true; +} + +static bool trans_LE(DisasContext *s, arg_LE *a) +{ + /* + * M-profile low-overhead loop end. The architecture permits an + * implementation to discard the LO_BRANCH_INFO cache at any time, + * and we take the IMPDEF option to never set it in the first place + * (equivalent to always discarding it immediately), because for QEMU + * a "real" implementation would be complicated and wouldn't execute + * any faster. + */ + TCGv_i32 tmp; + + if (!dc_isar_feature(aa32_lob, s)) { + return false; + } + + if (!a->f) { + /* Not loop-forever. If LR <=3D 1 this is the last loop: do nothin= g. */ + arm_gen_condlabel(s); + tcg_gen_brcondi_i32(TCG_COND_LEU, cpu_R[14], 1, s->condlabel); + /* Decrement LR */ + tmp =3D load_reg(s, 14); + tcg_gen_addi_i32(tmp, tmp, -1); + store_reg(s, 14, tmp); + } + /* Jump back to the loop start */ + gen_jmp(s, read_pc(s) - a->imm); + return true; +} + static bool op_tbranch(DisasContext *s, arg_tbranch *a, bool half) { TCGv_i32 addr, tmp; --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603121270; cv=none; d=zohomail.com; s=zohoarc; b=HRpsjOEEfYhv4ucgKKEXYo0jsSZj3e+tMoqpQANHshV625iH3aQs06+ahivowKZ1PfmNMkYcT4BBIh3UlZi/zrR+vCnvYYr16URQkqHsyfIFx1e9MFZrFsK2AL8wqyonjvGi/0/HOt5VXXQqYZjYYJkhEGaURoVpMv48uGbh0r4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603121270; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6hKic17i51H/7+th1/P5umqhoIFiqn2jr04cBxU9UUU=; b=OYVRO3BrmDSqqoTQ5YClEUo50sXpWPcDvmK7uKiDlhqG14JTB2vuZo1YpC6x9I7oigVrp8UYDKvsEAjT4JF0lCDGde/uNOP/YdLAraijpK40tTsmIACGxaR4S5qLMGfh/Nj8i1T9ieTnpcMWJOy5Lmgb1UOaBiqR5x7xOfDHzWA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603121270247143.3038822472355; Mon, 19 Oct 2020 08:27:50 -0700 (PDT) Received: from localhost ([::1]:36216 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUX4f-0007f3-6L for importer@patchew.org; Mon, 19 Oct 2020 11:27:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42168) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqf-00070H-Hs for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:21 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:46392) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqZ-0002la-2T for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:21 -0400 Received: by mail-wr1-x444.google.com with SMTP id n6so74605wrm.13 for ; Mon, 19 Oct 2020 08:13:14 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6hKic17i51H/7+th1/P5umqhoIFiqn2jr04cBxU9UUU=; b=XO/pELETpBfePYzggX2WerIDXKceQabShhBSBsEq+UtA//1x/7mx6XFoGSmpHtEpIY fYVOjvtUpzEWyyS+ZNP6Z8hQjvuY6kEUfMXJUv7o0f1g6KReHTgio8+9w7xxtUdaOYPa PJr7Ho/0IGO8lca9gLnAmhJG/tK0IjBUnWStzJ5Q/YMUy/elxGLxVTVZ3zbADPeIQwrv JqPeb7n6NiJiRKoWG7ItUZXuJBtCAHyK4uxnQT2sYcCIz4dcTPtw4PTvYr0/Ve6jXUjH wWQOANOZzdpu4UMvYlRdrdI4lSG++qufwTuHiAPOxASxP/R5R21oJ2g2vZc4WRF11VJ2 F/gA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6hKic17i51H/7+th1/P5umqhoIFiqn2jr04cBxU9UUU=; b=gjXdzqwMIDb3CT0dSRU3SK1sdt9KGAZx5Pej39wimBnD4rOIM/njycgP+y2HvF7GrP sHoJGQrW2VbLmX+yfLp3W8olHcb0PCw4d6UL3UMLZpGSArQuCzltX/DWC2UV4TxURjXz ulq0UI3zu419C67ke9Dn1Q1eSpZwRA/DWIXmnpDIJ34oC76y0+fo7RCaH69/NCsO3W93 5Ut7zQU4MCkQkqlR74Qjupc83tQa1Kv7tZGasjdjDeZD/KNjDD/w+V5agC/Nd0olCY0l h9Hobhh7d32rTqsPKcodk2QA/o/ktM+FvIh8LRNU/l22JL8XI9l4zqaIR9e7eSFm2hut 7gCQ== X-Gm-Message-State: AOAM5315iN6V3ggizHUBmdPZxPJdrwNC94rtMnHfkTETbSoeiI5cRLer /2W17OIKJcbjsjgGrevx3BRKyA== X-Google-Smtp-Source: ABdhPJxMd9qOVmibbgB1FDhEnrEoza+fbugjVPKFZaOCwTdMBwemcb/rBW6+X/91QfOTAgGwMQzL8g== X-Received: by 2002:adf:8bd4:: with SMTP id w20mr20242969wra.391.1603120393234; Mon, 19 Oct 2020 08:13:13 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 08/10] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile Date: Mon, 19 Oct 2020 16:12:59 +0100 Message-Id: <20201019151301.2046-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" In arm_cpu_realizefn(), if the CPU has VFP or Neon disabled then we squash the ID register fields so that we don't advertise it to the guest. This code was written for A-profile and needs some tweaks to work correctly on M-profile: * A-profile only fields should not be zeroed on M-profile: - MVFR0.FPSHVEC,FPTRAP - MVFR1.SIMDLS,SIMDINT,SIMDSP,SIMDHP - MVFR2.SIMDMISC * M-profile only fields should be zeroed on M-profile: - MVFR1.FP16 In particular, because MVFR1.SIMDHP on A-profile is the same field as MVFR1.FP16 on M-profile this code was incorrectly disabling FP16 support on an M-profile CPU (where has_neon is always false). This isn't a visible bug yet because we don't have any M-profile CPUs with FP16 support, but the change is necessary before we introduce any. Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/cpu.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 056319859fb..186ee621a65 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1429,17 +1429,22 @@ static void arm_cpu_realizefn(DeviceState *dev, Err= or **errp) u =3D cpu->isar.mvfr0; u =3D FIELD_DP32(u, MVFR0, FPSP, 0); u =3D FIELD_DP32(u, MVFR0, FPDP, 0); - u =3D FIELD_DP32(u, MVFR0, FPTRAP, 0); u =3D FIELD_DP32(u, MVFR0, FPDIVIDE, 0); u =3D FIELD_DP32(u, MVFR0, FPSQRT, 0); - u =3D FIELD_DP32(u, MVFR0, FPSHVEC, 0); u =3D FIELD_DP32(u, MVFR0, FPROUND, 0); + if (!arm_feature(env, ARM_FEATURE_M)) { + u =3D FIELD_DP32(u, MVFR0, FPTRAP, 0); + u =3D FIELD_DP32(u, MVFR0, FPSHVEC, 0); + } cpu->isar.mvfr0 =3D u; =20 u =3D cpu->isar.mvfr1; u =3D FIELD_DP32(u, MVFR1, FPFTZ, 0); u =3D FIELD_DP32(u, MVFR1, FPDNAN, 0); u =3D FIELD_DP32(u, MVFR1, FPHP, 0); + if (arm_feature(env, ARM_FEATURE_M)) { + u =3D FIELD_DP32(u, MVFR1, FP16, 0); + } cpu->isar.mvfr1 =3D u; =20 u =3D cpu->isar.mvfr2; @@ -1475,16 +1480,18 @@ static void arm_cpu_realizefn(DeviceState *dev, Err= or **errp) u =3D FIELD_DP32(u, ID_ISAR6, FHM, 0); cpu->isar.id_isar6 =3D u; =20 - u =3D cpu->isar.mvfr1; - u =3D FIELD_DP32(u, MVFR1, SIMDLS, 0); - u =3D FIELD_DP32(u, MVFR1, SIMDINT, 0); - u =3D FIELD_DP32(u, MVFR1, SIMDSP, 0); - u =3D FIELD_DP32(u, MVFR1, SIMDHP, 0); - cpu->isar.mvfr1 =3D u; + if (!arm_feature(env, ARM_FEATURE_M)) { + u =3D cpu->isar.mvfr1; + u =3D FIELD_DP32(u, MVFR1, SIMDLS, 0); + u =3D FIELD_DP32(u, MVFR1, SIMDINT, 0); + u =3D FIELD_DP32(u, MVFR1, SIMDSP, 0); + u =3D FIELD_DP32(u, MVFR1, SIMDHP, 0); + cpu->isar.mvfr1 =3D u; =20 - u =3D cpu->isar.mvfr2; - u =3D FIELD_DP32(u, MVFR2, SIMDMISC, 0); - cpu->isar.mvfr2 =3D u; + u =3D cpu->isar.mvfr2; + u =3D FIELD_DP32(u, MVFR2, SIMDMISC, 0); + cpu->isar.mvfr2 =3D u; + } } =20 if (!cpu->has_neon && !cpu->has_vfp) { --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603120963; cv=none; d=zohomail.com; s=zohoarc; b=RsqfbXLb0A7tfccJtW/zMEF/U3i8RBa4bQ677iIHoHu+8+QP2dJ/nwdK8waY4wr6ScrIRC5lHwrbaed/soe/EILL6YgIxfygOKOk4KrV3y1lpwIolNpIdF4nL6xc2e+OE1Frsf7Xhv7//R2lGaS8Losr9wtGvYHCS9VyjutDRsQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603120963; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Qb+QmhGDxs7W6jI1SEIOgXt8J7LxSA55gH0Mjqcc4gY=; b=JZ9yVPV8FLZsTj1Gq8jCBDnbrmCjJH/jqYDKPw6Al9ZU8Ao8EmfsTUT00mqIsTH1nT0x0E1a3LJjAo0Z1WdEOl7PnMct0y658a/YMDi4+MUgwl/g8Vuy0a1z8TvuCaKQsmEdXlm3C4Yx31kWBGZPQW2it2fWI89BLhCrnG4GiK8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603120963315528.9280790422755; Mon, 19 Oct 2020 08:22:43 -0700 (PDT) Received: from localhost ([::1]:48168 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUWzi-0000if-6o for importer@patchew.org; Mon, 19 Oct 2020 11:22:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42142) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqe-0006wq-76 for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:20 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:36658) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqZ-0002lm-Om for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:19 -0400 Received: by mail-wm1-x341.google.com with SMTP id e2so214879wme.1 for ; Mon, 19 Oct 2020 08:13:15 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Qb+QmhGDxs7W6jI1SEIOgXt8J7LxSA55gH0Mjqcc4gY=; b=pxIxatKyEhcRUXh1qsI5nkSqT/GHSQf52wjK3lq1h9a+jqPU9IF8pcWKSPxAGBEfsj oO+zna2VevQ3YMwqhUsYchiwFNhDIhR7zAwTKdlwAIPMe7Uz+i3Lhh69zBlyUhTk483b TbognvcpBKyHV3ssMokRFbIF4CYwvtDgmnBjmq7H2oR55dxuWWaKnaehk0sYs7MBFPyN 0NxoWa8618uSI2S4mycJydWnjuoFbMXdgQc0V9mN7EAu2TsDcdq8nzhAvVc7A/KoRQzB gs7NuT8duuJFz6knVh+HRdJ5o613hmBrnUHls16SBqlplt3q8Yt8tUYIZyajPFqXdKU/ D7KA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Qb+QmhGDxs7W6jI1SEIOgXt8J7LxSA55gH0Mjqcc4gY=; b=Iy9o2hCHBbrc8qyyrJu93kj3ikhniY+q3/XunSOK+GJl/knd7J6LcGgg/qgDZf/0vD SJ61sORaEhHv96nZ88T6Bdg0MgQuum89tIPio0KhtQsNnvtEVF4/nl+9376wi2my8jbH CU8xJrBEMALXuBcjtqPeJr5Z59+ifAiCoh6lr+1Bgdxm850u682l5zs0pJBFzg/mBWdD 6eZSzxjvJiSGqiqp4UBUPxrELYEqN0/P8Jrbp+LVKue63/NDElxok3S3rHAo/T4LrBKl /WgbIJNdWuLG7AcUX8Hd/uIOkv+AqiZ/VygAvkDX2WC1JzBkX8PXEoYJQiU/wQMc4Mr4 kitA== X-Gm-Message-State: AOAM533tafMJx/KG738wbHHCP1duGFF17rEI1YHaRFg+bOP6pupfdm4p DkH1Tj6xubMelTaBMRzsPy7XbA== X-Google-Smtp-Source: ABdhPJxnJcj42JOgwM22Ic6uBqs/klmBOjaKDuc9lWRA/1AUIAEKu51ERpuE1BdJ1zxc8cfaI8Zlvw== X-Received: by 2002:a1c:2108:: with SMTP id h8mr18009559wmh.63.1603120394344; Mon, 19 Oct 2020 08:13:14 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 09/10] target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16 Date: Mon, 19 Oct 2020 16:13:00 +0100 Message-Id: <20201019151301.2046-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" M-profile CPUs with half-precision floating point support should be able to write to FPSCR.FZ16, but an M-profile specific masking of the value at the top of vfp_set_fpscr() currently prevents that. This is not yet an active bug because we have no M-profile FP16 CPUs, but needs to be fixed before we can add any. The bits that the masking is effectively preventing from being set are the A-profile only short-vector Len and Stride fields, plus the Neon QC bit. Rearrange the order of the function so that those fields are handled earlier and only under a suitable guard; this allows us to drop the M-profile specific masking, making FZ16 writeable. This change also makes the QC bit correctly RAZ/WI for older no-Neon A-profile cores. This refactoring also paves the way for the low-overhead-branch LTPSIZE field, which uses some of the bits that are used for A-profile Stride and Len. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/vfp_helper.c | 47 ++++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 19 deletions(-) diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 5666393ef79..c3d01d781b6 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -194,36 +194,45 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t= val) val &=3D ~FPCR_FZ16; } =20 - if (arm_feature(env, ARM_FEATURE_M)) { + vfp_set_fpscr_to_host(env, val); + + if (!arm_feature(env, ARM_FEATURE_M)) { /* - * M profile FPSCR is RES0 for the QC, STRIDE, FZ16, LEN bits - * and also for the trapped-exception-handling bits IxE. + * Short-vector length and stride; on M-profile these bits + * are used for different purposes. + * We can't make this conditional be "if MVFR0.FPShVec !=3D 0", + * because in v7A no-short-vector-support cores still had to + * allow Stride/Len to be written with the only effect that + * some insns are required to UNDEF if the guest sets them. + * + * TODO: if M-profile MVE implemented, set LTPSIZE. */ - val &=3D 0xf7c0009f; + env->vfp.vec_len =3D extract32(val, 16, 3); + env->vfp.vec_stride =3D extract32(val, 20, 2); } =20 - vfp_set_fpscr_to_host(env, val); + if (arm_feature(env, ARM_FEATURE_NEON)) { + /* + * The bit we set within fpscr_q is arbitrary; the register as a + * whole being zero/non-zero is what counts. + * TODO: M-profile MVE also has a QC bit. + */ + env->vfp.qc[0] =3D val & FPCR_QC; + env->vfp.qc[1] =3D 0; + env->vfp.qc[2] =3D 0; + env->vfp.qc[3] =3D 0; + } =20 /* * We don't implement trapped exception handling, so the * trap enable bits, IDE|IXE|UFE|OFE|DZE|IOE are all RAZ/WI (not RES0!) * - * If we exclude the exception flags, IOC|DZC|OFC|UFC|IXC|IDC - * (which are stored in fp_status), and the other RES0 bits - * in between, then we clear all of the low 16 bits. + * The exception flags IOC|DZC|OFC|UFC|IXC|IDC are stored in + * fp_status; QC, Len and Stride are stored separately earlier. + * Clear out all of those and the RES0 bits: only NZCV, AHP, DN, + * FZ, RMode and FZ16 are kept in vfp.xregs[FPSCR]. */ env->vfp.xregs[ARM_VFP_FPSCR] =3D val & 0xf7c80000; - env->vfp.vec_len =3D (val >> 16) & 7; - env->vfp.vec_stride =3D (val >> 20) & 3; - - /* - * The bit we set within fpscr_q is arbitrary; the register as a - * whole being zero/non-zero is what counts. - */ - env->vfp.qc[0] =3D val & FPCR_QC; - env->vfp.qc[1] =3D 0; - env->vfp.qc[2] =3D 0; - env->vfp.qc[3] =3D 0; } =20 void vfp_set_fpscr(CPUARMState *env, uint32_t val) --=20 2.20.1 From nobody Sat May 11 10:35:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1603121165; cv=none; d=zohomail.com; s=zohoarc; b=nCtzo4PX5p5mzLuhmxI5YBI+0a8GXrgUgVUgypbr0X5zs05lXTcW5a6q29QWFfpAPLM2sSckiGJHSR9Ad7QIXyaOXv04V5Qv5/WpsTa4qYUMDec6H/4iUbMpfF5o9mnsbgFt8OCJGllJK3Afj1Yo2M3I8m7atssPru1VgbnDAR0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1603121165; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=60CXa9EVUwZSuD/TaM/4vLu3CrMpUPxjQs1jlsMOoMs=; b=d75HvVlUS+Q8FNu1O5PLgISdt4ZkqKtUZSxsEKvKXxjABK6DLafulCcUZRjb/C761GC0qTG5QIgB+R7letT6z0zFTsXFsoHijXjiwXoA2X0354sGMA5PSciZAG9cU+3LNUPsp9lOzywQltTFhtoZ+pI05GbAT6NZpIwQF5YpLNM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1603121165742306.3947299252102; Mon, 19 Oct 2020 08:26:05 -0700 (PDT) Received: from localhost ([::1]:59768 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kUX2y-0005go-Lg for importer@patchew.org; Mon, 19 Oct 2020 11:26:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42154) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kUWqe-0006xa-G3 for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:20 -0400 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:52578) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kUWqa-0002m8-Pl for qemu-devel@nongnu.org; Mon, 19 Oct 2020 11:13:20 -0400 Received: by mail-wm1-x342.google.com with SMTP id e23so186660wme.2 for ; Mon, 19 Oct 2020 08:13:16 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id y14sm309918wma.48.2020.10.19.08.13.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 08:13:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=60CXa9EVUwZSuD/TaM/4vLu3CrMpUPxjQs1jlsMOoMs=; b=hNmizyZDP2pel4ajJU+5apBtwUYjPPBUb09FuMN+454ruGVlIT/Lv7mFjkf5k3y3Gw MlnrqIVe3OkfhcDaKts6K3XWI647o00iY+UytB93+UwAy7fKfxvlYmLDCKK3bws2H/CF r9KTMuGelHm/QgqbJgj9qY5muEHuoYBuKhV5heBi6wU5Gmo2Mq+wVdmbm2hhTud0x+Zu lX/TydvOT7RyhzFtV6WdTaI6ONSnV1i2dNy6LEU8+QqFFbCuAJGWtH0vSys1kUlDlLbX 1SPrjDpmrGJxyJWzRLF2rRXu7p9+XLluMVwd3cBpxvsHjoG4YewStN/jQXtqL9t534du F2lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=60CXa9EVUwZSuD/TaM/4vLu3CrMpUPxjQs1jlsMOoMs=; b=dLpANoKvbiz8Twa/qaYdvdx2usSlvWfWqp5tqdHgkaOoy75FsvobUk4S5S0n6GvNrU cqCxk1d4JLUrrZCms3WxXdUSD0i91wKghV38WHCBjAGqUOMSltmsmeE5uQjGGG7vl+0S iRWhyjVOrmgyj6KrCufF82AhyswTR05JXGXiJu5nqWLNbnpBrZrIYK/PMyUkYAR/3GCn yX8jFxdzxT7yXxNhP7Nra6Lywwz2lmuHWuYteOb1YQRmXobWyYDwN8BZb9fLu0bOARgz DI7Dkx9ztlcQ/zGwws4MJkx5y8c/u1CmCe1BDu+ywqivduab34ZoKLxYPBWsBLcOMbQj hfag== X-Gm-Message-State: AOAM532jwThkeWikyF5mf5HYbrZWKkFV+WiD5TGCq/q1b4Cw+2Zyh4Jx tjxdF46NUoOMsguonargX223Lw== X-Google-Smtp-Source: ABdhPJzH6su9dHghAQc0/Hx2azguF8lQWioUtOU6jGIGgJVm2Y4UUJS4bK/cpzZ71Rti1niuIURkfA== X-Received: by 2002:a1c:59c3:: with SMTP id n186mr46877wmb.32.1603120395484; Mon, 19 Oct 2020 08:13:15 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 10/10] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension Date: Mon, 19 Oct 2020 16:13:01 +0100 Message-Id: <20201019151301.2046-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201019151301.2046-1-peter.maydell@linaro.org> References: <20201019151301.2046-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" If the M-profile low-overhead-branch extension is implemented, FPSCR bits [18:16] are a new field LTPSIZE. If MVE is not implemented (currently always true for us) then this field always reads as 4 and ignores writes. These bits used to be the vector-length field for the old short-vector extension, so we need to take care that they are not misinterpreted as setting vec_len. We do this with a rearrangement of the vfp_set_fpscr() code that deals with vec_len, vec_stride and also the QC bit; this obviates the need for the M-profile only masking step that we used to have at the start of the function. We provide a new field in CPUState for LTPSIZE, even though this will always be 4, in preparation for MVE, so we don't have to come back later and split it out of the vfp.xregs[FPSCR] value. (This state struct field will be saved and restored as part of the FPSCR value via the vmstate_fpscr in machine.c.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/cpu.h | 1 + target/arm/cpu.c | 9 +++++++++ target/arm/vfp_helper.c | 6 ++++++ 3 files changed, 16 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a432f301f11..49cd5cabcf2 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -549,6 +549,7 @@ typedef struct CPUARMState { uint32_t fpdscr[M_REG_NUM_BANKS]; uint32_t cpacr[M_REG_NUM_BANKS]; uint32_t nsacr; + int ltpsize; } v7m; =20 /* Information associated with an exception about to be taken: diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 186ee621a65..07492e9f9a4 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -255,6 +255,15 @@ static void arm_cpu_reset(DeviceState *dev) uint8_t *rom; uint32_t vecbase; =20 + if (cpu_isar_feature(aa32_lob, cpu)) { + /* + * LTPSIZE is constant 4 if MVE not implemented, and resets + * to an UNKNOWN value if MVE is implemented. We choose to + * always reset to 4. + */ + env->v7m.ltpsize =3D 4; + } + if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { env->v7m.secure =3D true; } else { diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index c3d01d781b6..bf608d7aef3 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -174,6 +174,12 @@ uint32_t HELPER(vfp_get_fpscr)(CPUARMState *env) | (env->vfp.vec_len << 16) | (env->vfp.vec_stride << 20); =20 + /* + * M-profile LTPSIZE overlaps A-profile Stride; whichever of the + * two is not applicable to this CPU will always be zero. + */ + fpscr |=3D env->v7m.ltpsize << 16; + fpscr |=3D vfp_get_fpscr_from_host(env); =20 i =3D env->vfp.qc[0] | env->vfp.qc[1] | env->vfp.qc[2] | env->vfp.qc[3= ]; --=20 2.20.1