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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=64.147.123.18; envelope-from=its@irrelevant.dk; helo=wnew4-smtp.messagingengine.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/19 07:30:44 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, Klaus Jensen , Gollu Appalanaidu , Max Reitz , Klaus Jensen , Keith Busch Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Gollu Appalanaidu Differentiate between missing PRPs and misaligned PRPs, return the relevant status code and streamline the trace event naming. See NVMe Express v1.3d, Section 4.3 ("Physical Region Page Entry and List"). Signed-off-by: Gollu Appalanaidu Signed-off-by: Klaus Jensen --- include/block/nvme.h | 1 + hw/block/nvme.c | 22 ++++++++++++++++------ hw/block/trace-events | 5 +++-- 3 files changed, 20 insertions(+), 8 deletions(-) diff --git a/include/block/nvme.h b/include/block/nvme.h index 6de2d5aa75a9..8a46d9cf015f 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -655,6 +655,7 @@ enum NvmeStatusCodes { NVME_MD_SGL_LEN_INVALID =3D 0x0010, NVME_SGL_DESCR_TYPE_INVALID =3D 0x0011, NVME_INVALID_USE_OF_CMB =3D 0x0012, + NVME_INVALID_PRP_OFFSET =3D 0x0013, NVME_LBA_RANGE =3D 0x0080, NVME_CAP_EXCEEDED =3D 0x0081, NVME_NS_NOT_READY =3D 0x0082, diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 9d30ca69dcf1..785a87af0138 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -328,7 +328,7 @@ static uint16_t nvme_map_prp(NvmeCtrl *n, uint64_t prp1= , uint64_t prp2, trace_pci_nvme_map_prp(trans_len, len, prp1, prp2, num_prps); =20 if (unlikely(!prp1)) { - trace_pci_nvme_err_invalid_prp(); + trace_pci_nvme_err_invalid_prp1_missing(); return NVME_INVALID_FIELD | NVME_DNR; } =20 @@ -370,11 +370,16 @@ static uint16_t nvme_map_prp(NvmeCtrl *n, uint64_t pr= p1, uint64_t prp2, uint64_t prp_ent =3D le64_to_cpu(prp_list[i]); =20 if (i =3D=3D n->max_prp_ents - 1 && len > n->page_size) { - if (unlikely(!prp_ent || prp_ent & (n->page_size - 1))= ) { - trace_pci_nvme_err_invalid_prplist_ent(prp_ent); + if (unlikely(!prp_ent)) { + trace_pci_nvme_err_invalid_prplist_ent_missing(); return NVME_INVALID_FIELD | NVME_DNR; } =20 + if (unlikely(prp_ent & (n->page_size - 1))) { + trace_pci_nvme_err_invalid_prplist_ent(prp_ent); + return NVME_INVALID_PRP_OFFSET | NVME_DNR; + } + if (prp_list_in_cmb !=3D nvme_addr_is_cmb(n, prp_ent))= { return NVME_INVALID_USE_OF_CMB | NVME_DNR; } @@ -391,11 +396,16 @@ static uint16_t nvme_map_prp(NvmeCtrl *n, uint64_t pr= p1, uint64_t prp2, prp_ent =3D le64_to_cpu(prp_list[i]); } =20 - if (unlikely(!prp_ent || prp_ent & (n->page_size - 1))) { - trace_pci_nvme_err_invalid_prplist_ent(prp_ent); + if (unlikely(!prp_ent)) { + trace_pci_nvme_err_invalid_prplist_ent_missing(); return NVME_INVALID_FIELD | NVME_DNR; } =20 + if (unlikely(prp_ent & (n->page_size - 1))) { + trace_pci_nvme_err_invalid_prplist_ent(prp_ent); + return NVME_INVALID_PRP_OFFSET | NVME_DNR; + } + trans_len =3D MIN(len, n->page_size); status =3D nvme_map_addr(n, qsg, iov, prp_ent, trans_len); if (status) { @@ -408,7 +418,7 @@ static uint16_t nvme_map_prp(NvmeCtrl *n, uint64_t prp1= , uint64_t prp2, } else { if (unlikely(prp2 & (n->page_size - 1))) { trace_pci_nvme_err_invalid_prp2_align(prp2); - return NVME_INVALID_FIELD | NVME_DNR; + return NVME_INVALID_PRP_OFFSET | NVME_DNR; } status =3D nvme_map_addr(n, qsg, iov, prp2, len); if (status) { diff --git a/hw/block/trace-events b/hw/block/trace-events index cab9913b1f2d..2bafbed256e8 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -97,10 +97,11 @@ pci_nvme_err_invalid_sgld(uint16_t cid, uint8_t typ) "c= id %"PRIu16" type 0x%"PRI pci_nvme_err_invalid_num_sgld(uint16_t cid, uint8_t typ) "cid %"PRIu16" ty= pe 0x%"PRIx8"" pci_nvme_err_invalid_sgl_excess_length(uint16_t cid) "cid %"PRIu16"" pci_nvme_err_invalid_dma(void) "PRP/SGL is too small for transfer size" -pci_nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is null= or not page aligned: 0x%"PRIx64"" +pci_nvme_err_invalid_prp1_missing(void) "PRP1 is null" pci_nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: = 0x%"PRIx64"" pci_nvme_err_invalid_prp2_missing(void) "PRP2 is null and more data to be = transferred" -pci_nvme_err_invalid_prp(void) "invalid PRP" +pci_nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry not pag= e aligned: 0x%"PRIx64"" +pci_nvme_err_invalid_prplist_ent_missing(void) "PRP list entry is null and= more data to be transferred" pci_nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8"" pci_nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx= 8"" pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limi= t) "Invalid LBA start=3D%"PRIu64" len=3D%"PRIu64" limit=3D%"PRIu64"" --=20 2.28.0