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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id h1sm4545855wrx.33.2020.10.14.04.53.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2020 04:53:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1602676388; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gTNC5KDCZBOSstHZx3wGQ1e/sNtfzzFYB9WbTAF5Fvs=; b=UINg/XuUVBP/wNAdWFPXjR/kGLMN3unMZkxkRkzH13cPsncb94v0IhCOUUVFwAurE6ByfU jqVpJw4rNQpbG36e+RgPewKRHyE1OIDOk/zP77E3Pudte6wx52QPmcgUXLhIcWmZYsBOWQ uzDJNP5clprmjWDPHdiZ3OqHKO/GgOA= X-MC-Unique: heDzaIfvOkOHx3WSmROh4w-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gTNC5KDCZBOSstHZx3wGQ1e/sNtfzzFYB9WbTAF5Fvs=; b=bfJFMUNU9GXfiDOvo0+ruTVKfXknX5PN6Ds9JFYjvUhFcrSpw5kaiHvx9a++tqYD3O kHg2gkdYzWrBUibgfv4jfG2cEzeWaXhlww4HpyfFZVe645UQKXsQ9sRaqHYBmZB7usGJ P5SVmCvB16rducqo1+E0gcN58bXdeCbkHnH+m9vif+JACW6+7CllUtA8tUIcWKRoVbvD QcpGjEkSltqefVcRnhfRJoKszPyy4qcVeVFh4SmWvd/mch3H9P28mlRoaQshyn8u3ibx QOZK7k4JdL5+9uJo7aKh1YdejvQW9jEFZ7aUJ7imYoRfG9E+Uf39E2fz5X3vv1pks9yM cw1A== X-Gm-Message-State: AOAM530aHI88eV1RRqpRyrztidUV1q7Rt5aqsD/b3g2lSDIkBkfQL78h W6qsCyeD//0nBKr5944KJOwwcT9UxAqzYOWTMUp4YABt8XYnsO5Uu7iHN3wJ9ssGthACJpjOQoO LQxWI1AUpNyMNmA== X-Received: by 2002:adf:ec0e:: with SMTP id x14mr5601827wrn.204.1602676385733; Wed, 14 Oct 2020 04:53:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwtMH37I8lZRZav7+vZdgO3zaCYTYyHCZYU182Mm+8xVjmCgVz7lIIPWGObro4DGLBVEZpmDQ== X-Received: by 2002:adf:ec0e:: with SMTP id x14mr5601808wrn.204.1602676385567; Wed, 14 Oct 2020 04:53:05 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alex Williamson , Max Reitz , Fam Zheng , qemu-block@nongnu.org, Stefan Hajnoczi , Kevin Wolf , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 2/9] util/vfio-helpers: Trace PCI I/O config accesses Date: Wed, 14 Oct 2020 13:52:46 +0200 Message-Id: <20201014115253.25276-3-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201014115253.25276-1-philmd@redhat.com> References: <20201014115253.25276-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) We sometime get kernel panic with some devices on Aarch64 hosts. Alex Williamson suggests it might be broken PCIe root complex. Add trace event to record the latest I/O access before crashing. In case, assert our accesses are aligned. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- Cc: Alex Williamson --- util/vfio-helpers.c | 8 ++++++++ util/trace-events | 2 ++ 2 files changed, 10 insertions(+) diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index 14a549510fe..1d4efafcaa4 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -227,6 +227,10 @@ static int qemu_vfio_pci_read_config(QEMUVFIOState *s,= void *buf, { int ret; =20 + trace_qemu_vfio_pci_read_config(buf, ofs, size, + s->config_region_info.offset, + s->config_region_info.size); + assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); do { ret =3D pread(s->device, buf, size, s->config_region_info.offset += ofs); } while (ret =3D=3D -1 && errno =3D=3D EINTR); @@ -237,6 +241,10 @@ static int qemu_vfio_pci_write_config(QEMUVFIOState *s= , void *buf, int size, int { int ret; =20 + trace_qemu_vfio_pci_write_config(buf, ofs, size, + s->config_region_info.offset, + s->config_region_info.size); + assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); do { ret =3D pwrite(s->device, buf, size, s->config_region_info.offset = + ofs); } while (ret =3D=3D -1 && errno =3D=3D EINTR); diff --git a/util/trace-events b/util/trace-events index 24c31803b01..c048f85f828 100644 --- a/util/trace-events +++ b/util/trace-events @@ -85,3 +85,5 @@ qemu_vfio_new_mapping(void *s, void *host, size_t size, i= nt index, uint64_t iova qemu_vfio_do_mapping(void *s, void *host, size_t size, uint64_t iova) "s %= p host %p size 0x%zx iova 0x%"PRIx64 qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64= _t *iova) "s %p host %p size 0x%zx temporary %d iova %p" qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" +qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_of= s, uint64_t region_size) "read cfg ptr %p ofs 0x%x size %d (region ofs 0x%"= PRIx64" size %"PRId64")" +qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_o= fs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size %d (region ofs 0x= %"PRIx64" size %"PRId64")" --=20 2.26.2