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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id g139sm28521298wme.2.2020.10.13.06.25.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2020 06:25:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=orbtnIXME7eI8Z8OOzrxbeZteV0enZumXvxzAJ1ns40=; b=DwvgVy0Dcq4RzoKe5jWzYGaHt1u8AlfHniI7udTUBR4eMvNAWZMd/7f9Hwp7jM/Rx3 EmacVZ20Jcgz0oGt2Gll7A0kiR0bgX8IhpTYilHPwp8I8dHBaxkfkzXbFc53tpPG/mBT jBh0W/m5woPSSUIgmNIxGlwReQofS2MXTQjJoW1TQhLLgZwnIg49iHrUYlk42EPmtnZ4 /WHQOTiWFc1AqwC6AddPuL6gV4bymWvr0OwBpsh7irezEO2xTbyiKP/V29GreahSx1sB +WhzYBM9S4uLbPNkRfFMeCuaGi0RPCJhbWpN67Kji+o/BMwUpqdLbUG/s9z7IpMVeRSp jWhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=orbtnIXME7eI8Z8OOzrxbeZteV0enZumXvxzAJ1ns40=; b=N92csEOOkRd9/bWXj+ALG//njrBlKmng7DuK9L405QRjepHTSW0qPetGieOcG7OjaM dFJDl8jJkmVjbd3tjQBRASApgf0a6+y74jF9pPH1cQjiYbVCZZVcNuMv8AgGYjP1bxpJ GMB5kyp+2p8dvSrAh5e8yq771lMz66BDPcGoAe4I715IFQjAc3bG/ttrea63Pys9KAii 8Do933+a1z0JVR78G0gJrDKIL2ZUvEk67o/jRIU1KJf5pZVgbQs8LkPUnDvsxZE8x6NB O+K/yJ7rtJi7Hd5kdzjBFzl+wknBTalceOGmNT316N4NFntWmxJH0nBfOJavhqkiyMJn S5Ug== X-Gm-Message-State: AOAM5317BO2Cb25bNCpHqwz32kk9sxeQmOSR04LGbhSRDgOHASLzdy+h dl4+ygcoMFC8eswOOOxpT6w= X-Google-Smtp-Source: ABdhPJxuPuytI/LrtTAqkTfYc8qzhnN8MkXMX9zxPUFdbLbLS9QNjGRB3giEPLNDBRBh3owhT5kGSg== X-Received: by 2002:adf:f1c1:: with SMTP id z1mr11761614wro.331.1602595542614; Tue, 13 Oct 2020 06:25:42 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Victor Kamensky Cc: Khem Raj , Richard Henderson , Aleksandar Rikalo , Aleksandar Markovic , Jiaxun Yang , Aurelien Jarno , Richard Purdie , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 1/3] target/mips: Make cpu_mips_realize_env() propagate Error Date: Tue, 13 Oct 2020 15:25:33 +0200 Message-Id: <20201013132535.3599453-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201013132535.3599453-1-f4bug@amsat.org> References: <20201013132535.3599453-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) To be able to propagate error to our caller, make cpu_mips_realize_env() take an Error argument and return a boolean value indicating an error is set or not, following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"). Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/internal.h | 10 +++++++++- target/mips/cpu.c | 4 +++- target/mips/translate.c | 4 +++- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 7f159a9230c..c2b2e79c515 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -206,7 +206,15 @@ void mips_tcg_init(void); =20 /* TODO QOM'ify CPU reset and remove */ void cpu_state_reset(CPUMIPSState *s); -void cpu_mips_realize_env(CPUMIPSState *env); + +/** + * cpu_mips_realize_env: Realize CPUMIPSState + * @env: CPUMIPSState object + * @errp: pointer to error object + * On success, return %true. + * On failure, store an error through @errp and return %false. + */ +bool cpu_mips_realize_env(CPUMIPSState *env, Error **errp); =20 /* cp0_timer.c */ uint32_t cpu_mips_get_random(CPUMIPSState *env); diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd065483..117c748345e 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -147,7 +147,9 @@ static void mips_cpu_realizefn(DeviceState *dev, Error = **errp) return; } =20 - cpu_mips_realize_env(&cpu->env); + if (!cpu_mips_realize_env(&cpu->env, errp)) { + return; + } =20 cpu_reset(cs); qemu_init_vcpu(cs); diff --git a/target/mips/translate.c b/target/mips/translate.c index 398edf72898..4c9b6216321 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31316,7 +31316,7 @@ void mips_tcg_init(void) =20 #include "translate_init.c.inc" =20 -void cpu_mips_realize_env(CPUMIPSState *env) +bool cpu_mips_realize_env(CPUMIPSState *env, Error **errp) { env->exception_base =3D (int32_t)0xBFC00000; =20 @@ -31325,6 +31325,8 @@ void cpu_mips_realize_env(CPUMIPSState *env) #endif fpu_init(env, env->cpu_model); mvp_init(env, env->cpu_model); + + return true; } =20 bool cpu_supports_cps_smp(const char *cpu_type) --=20 2.26.2 From nobody Fri May 10 10:19:15 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1602595812; cv=none; d=zohomail.com; s=zohoarc; b=fCxXvIfOAGciSiZBPtfE8+mF/E7dMiKaYeVdx4F5byURfLnEfFS7Pip2kbYkvxeqzafEC/+QSqEFW1IHynWq0PK4FyNqOD2Q1lmvm+D8JLxj/yKOwidiV1D5HJcs/VeNLXtaT+DrtxWQf8dffvTph+shLjVxYUchXfqcSWVHREI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1602595812; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uGbM5jKuXUuO3WPo7AsNXrE7a/70TUhurMbvDUz4SoY=; b=b/Tl3VgKQ44EVMgwWIhph8ZXHcu8TRwiSf4R4+Cu2qqRIxkwtWyVQED2GUrndT9bV9fIQ0GX0jj7tHg1e6BlrSlUQL7nNtjeroIA+uHwnVv0f0FYOsnxykbau1oUCGrpdroZLnyNkeBnsi8E7H4In3Gj1w0VL6GPtIQf80+O0dw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1602595812340610.0445901833053; Tue, 13 Oct 2020 06:30:12 -0700 (PDT) Received: from localhost ([::1]:56670 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kSKNW-00029x-BI for importer@patchew.org; Tue, 13 Oct 2020 09:30:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42866) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kSKJO-0007I7-JK for qemu-devel@nongnu.org; Tue, 13 Oct 2020 09:25:55 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:43525) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kSKJJ-0000pm-Ar for qemu-devel@nongnu.org; Tue, 13 Oct 2020 09:25:51 -0400 Received: by mail-wr1-x441.google.com with SMTP id g12so24025031wrp.10 for ; Tue, 13 Oct 2020 06:25:48 -0700 (PDT) Received: from x1w.redhat.com (106.red-83-59-162.dynamicip.rima-tde.net. [83.59.162.106]) by smtp.gmail.com with ESMTPSA id m1sm26001774wmm.34.2020.10.13.06.25.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2020 06:25:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uGbM5jKuXUuO3WPo7AsNXrE7a/70TUhurMbvDUz4SoY=; b=kQL5uy8uKaDMe6/zNuBdF8ZCp0pgVc0eNH/quI0Y5X3oGlmtP1Egr49b0aDLhVmv/0 Z0iDzP78m2xWud8CKH7YD89lceHyrqYkXtAFQUqopb/23vFhLmsNjSfcysoL36cD825c FqD2Nl/MAj2Hea5CF6CSdEe0DwG9UUFI1R+7pG4aCXKGYpxDXTsSdH3xnMueJ8ckAYDg lMDJcmgwmY7LBfRg7a+Qvmemx/oMiAgj7eAm0AfZ+QhHweJRc9aLrE2DZooQz+I0xCBv 84r0ZiFv9xWXfFRUIFDJsmRX+QIYN9O3wsJdCd9K2GQizRWo9Zrsxx4m+6pkAs0eA0Gw RD5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=uGbM5jKuXUuO3WPo7AsNXrE7a/70TUhurMbvDUz4SoY=; b=SHSRY+1QUE5Uki+f0XyVObdE6u0X2N7REU4FDdM8UlHZt/+OXK2e/tqcLf21LyY2MF GmVj4VK0q9GRLluBSunJ5PFdbaGr9nXxbIFbK+auFdt+Pvngn9bB4xt4BqNtowWIGUdZ eLhLRh4B5arb0oR7oPFT7SmWE9OAhQMBf7r11Wk1pxJq6DKjVn51ShosHRESFv1q3LrC 8wlV8hd8on3iNyoBpTtjjyrIHgE/hYekDep+AObBK7gJcnoUC1QWV/G8toLo1NS6eN/4 BH9DaxG0D2KF6gAjK/btlRetdn/mZMeIua9vhXQodsk9DbBiATrKCzCkMVMv9mJRc7fB mPCA== X-Gm-Message-State: AOAM530PKgO4wT3ugq7AF/bfp5iaedTGUT5KJ0+UBE8IwJ6M4RbcOZ3Y Qea+p4RDSavdHU9Tf37PCVRkb00y9Bs= X-Google-Smtp-Source: ABdhPJx9gj23uXTAel4tspKSKMEK1H2Zj2STo9L4fmMA8sIUVKoqqvYVCebc5WLsfRrQ5orE0BeHuQ== X-Received: by 2002:adf:a345:: with SMTP id d5mr38716089wrb.55.1602595547436; Tue, 13 Oct 2020 06:25:47 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Victor Kamensky Subject: [RFC PATCH 2/3] target/mips: Store number of TLB entries in CPUMIPSState Date: Tue, 13 Oct 2020 15:25:34 +0200 Message-Id: <20201013132535.3599453-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201013132535.3599453-1-f4bug@amsat.org> References: <20201013132535.3599453-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Khem Raj , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aleksandar Markovic , Richard Purdie , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) As we want to make the number of TLB entries configurable, store it in CPUMIPSState. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/cpu.h | 1 + target/mips/translate.c | 4 +++- target/mips/translate_init.c.inc | 2 +- 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7cf7f5239f7..b84e9a8fcae 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1140,6 +1140,7 @@ struct CPUMIPSState { #endif =20 const mips_def_t *cpu_model; + uint8_t tlb_entries; void *irq[8]; QEMUTimer *timer; /* Internal timer */ struct MIPSITUState *itu; diff --git a/target/mips/translate.c b/target/mips/translate.c index 4c9b6216321..9d13e164c2e 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31319,6 +31319,7 @@ void mips_tcg_init(void) bool cpu_mips_realize_env(CPUMIPSState *env, Error **errp) { env->exception_base =3D (int32_t)0xBFC00000; + env->tlb_entries =3D 1 + extract32(env->cpu_model->CP0_Config1, CP0C1_= MMU, 6); =20 #ifndef CONFIG_USER_ONLY mmu_init(env, env->cpu_model); @@ -31357,7 +31358,8 @@ void cpu_state_reset(CPUMIPSState *env) #ifdef TARGET_WORDS_BIGENDIAN env->CP0_Config0 |=3D (1 << CP0C0_BE); #endif - env->CP0_Config1 =3D env->cpu_model->CP0_Config1; + env->CP0_Config1 =3D deposit32(env->cpu_model->CP0_Config1, CP0C1_MMU,= 6, + env->tlb_entries - 1); env->CP0_Config2 =3D env->cpu_model->CP0_Config2; env->CP0_Config3 =3D env->cpu_model->CP0_Config3; env->CP0_Config4 =3D env->cpu_model->CP0_Config4; diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.= c.inc index 637caccd890..a426463c434 100644 --- a/target/mips/translate_init.c.inc +++ b/target/mips/translate_init.c.inc @@ -946,7 +946,7 @@ static void fixed_mmu_init (CPUMIPSState *env, const mi= ps_def_t *def) =20 static void r4k_mmu_init (CPUMIPSState *env, const mips_def_t *def) { - env->tlb->nb_tlb =3D 1 + ((def->CP0_Config1 >> CP0C1_MMU) & 63); + env->tlb->nb_tlb =3D env->tlb_entries; env->tlb->map_address =3D &r4k_map_address; env->tlb->helper_tlbwi =3D r4k_helper_tlbwi; env->tlb->helper_tlbwr =3D r4k_helper_tlbwr; --=20 2.26.2 From nobody Fri May 10 10:19:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.66 as permitted sender) client-ip=209.85.221.66; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f66.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.66 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail(p=none dis=none) header.from=amsat.org ARC-Seal: i=1; a=rsa-sha256; t=1602595554; cv=none; d=zohomail.com; s=zohoarc; b=Z/GfNstcGXR4e3YtXcboe+sKyxdSyZAmFZ/Y3kNty1jEqGkapBFCQK7ff+Y6UUHCa/c4ns5iuMq9fJzfQFk5DOes96Nk2xbrmNLLgqg3SIsMb1GtTzUadB7763Ix8oAJXrmQxV5QHF2h4C6ELIjzl9981zVVrpttKecK0p9kmfI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1602595554; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=VFsuaswYufcuBvnCYcvUI12J1pzpFOAbqFSm76G5//c=; b=Cwy5pUa6yT1g4qRTz4JNzhmWgatvBO9M/QoWuSdIq5hTn8pKALSu+dFTL/gBd3sCUJWhIN5mufUTPgce4oEIRvzAFkg9vd24oi+MNV53zpRn+pnHcxMW49S/uurva9V5JBcBP80T25Oc/uPgrWF/MlV1kE21SgjbZJp7/rYAKu4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.66 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by mx.zohomail.com with SMTPS id 1602595554122318.54794912264845; Tue, 13 Oct 2020 06:25:54 -0700 (PDT) Received: by mail-wr1-f66.google.com with SMTP id y12so18672830wrp.6 for ; Tue, 13 Oct 2020 06:25:53 -0700 (PDT) Return-Path: Return-Path: Received: from x1w.redhat.com (106.red-83-59-162.dynamicip.rima-tde.net. [83.59.162.106]) by smtp.gmail.com with ESMTPSA id p4sm28990248wru.39.2020.10.13.06.25.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2020 06:25:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VFsuaswYufcuBvnCYcvUI12J1pzpFOAbqFSm76G5//c=; b=vYlSNAj2cgafv5YgMrJOUKpaa7oi/7ODTedvm0rol+gY+9uKZkGsQpHihuzT5jTJBd 2GR3+os57JfJ0MEA5iCmg+OkEzvzevOBSgeaQtVVY9kjBawTDQjoRNCGeAe78hR9b6j4 PgR3ejDyw3fCcsfasujQ46hdogd7S+llNkeFf7ANYIZcKr+932Kid1BvlcHnpX7H3QyY YHduVGmBva/RJrtco1iRNQwvWzebRyxb756MocWILxtkgcS8599kMl3t7OTgV/58B+f1 +/zMheRMdPnyvm2iyOoGamDsXoSsgYyowhhx1pzqcFcAulbUsd9D6XnI4BA0WxBVbU9I eW0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=VFsuaswYufcuBvnCYcvUI12J1pzpFOAbqFSm76G5//c=; b=ECcruVOIsUP0E5zy16AvJr8ISwsW90FcOc0hltKszVs5bklbPJa9Kdj5HBjDPtXhn0 H8MsKmkDDJIHpL9dEHadpxmt51PGUtwXo3b3p2dOcNlkRRz5lhRoRuYZHuy4Ye76Vh/U nYDDfsTvj/5aqtBFrRu4pp1YYWjpVhx0q9L4Huaq4gIzKS3S7aJaYqd6BWvC7ezE/o/d GIfiL5prt5hkYcpn6dli1ahakUu9VdHFID+OYNB2mGPX8oNZA8s2h7X3rsigw9AdkdE9 Ehp97G50XIOpqbzbHu8t/u0wSlB0+JVHfemzfUPtCY3o9njPbS3cSiNtxKUEmR93lda4 G/YA== X-Gm-Message-State: AOAM533KWjL62kUbN8uLCwaa3QWIvhYM0Vtdb2PA2ayMTyXsZKcBxo4G mLL3YMR5vnHU7kjsHR/naWI= X-Google-Smtp-Source: ABdhPJyaVQQqPRpyS7u1ykMOTf3wNuxAN72+BqzQrqNQ2H7QclLQT8ZiDXLRjwMcOVj15FyYWswksQ== X-Received: by 2002:adf:eb41:: with SMTP id u1mr27684150wrn.94.1602595552209; Tue, 13 Oct 2020 06:25:52 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Victor Kamensky Cc: Khem Raj , Richard Henderson , Aleksandar Rikalo , Aleksandar Markovic , Jiaxun Yang , Aurelien Jarno , Richard Purdie , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 3/3] target/mips: Make the number of TLB entries a CPU property Date: Tue, 13 Oct 2020 15:25:35 +0200 Message-Id: <20201013132535.3599453-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201013132535.3599453-1-f4bug@amsat.org> References: <20201013132535.3599453-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Allow changing the number of TLB entries for testing/tunning purpose. Example to force a 34Kf cpu with 64 TLB: $ qemu-system-mipsel -cpu 34Kf,tlb-entries=3D64 ... This is helpful for developers of the Yocto Project [*]: Yocto Project uses qemu-system-mips 34Kf cpu model, to run 32bit MIPS CI loop. It was observed that in this case CI test execution time was almost twice longer than 64bit MIPS variant that runs under MIPS64R2-generic model. It was investigated and concluded that the difference in number of TLBs 16 in 34Kf case vs 64 in MIPS64R2-generic is responsible for most of CI real time execution difference. Because with 16 TLBs linux user-land trashes TLB more and it needs to execute more instructions in TLB refill handler calls, as result it runs much longer. [*] https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg03428.html Buglink: https://bugzilla.yoctoproject.org/show_bug.cgi?id=3D13992 Reported-by: Victor Kamensky Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/cpu.c | 8 +++++++- target/mips/translate.c | 10 +++++++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 117c748345e..da31831368b 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -26,7 +26,7 @@ #include "qemu/module.h" #include "sysemu/kvm.h" #include "exec/exec-all.h" - +#include "hw/qdev-properties.h" =20 static void mips_cpu_set_pc(CPUState *cs, vaddr value) { @@ -183,6 +183,11 @@ static ObjectClass *mips_cpu_class_by_name(const char = *cpu_model) return oc; } =20 +static Property mips_cpu_properties[] =3D { + DEFINE_PROP_UINT8("tlb-entries", MIPSCPU, env.tlb_entries, 0), + DEFINE_PROP_END_OF_LIST() +}; + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc =3D MIPS_CPU_CLASS(c); @@ -192,6 +197,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *d= ata) device_class_set_parent_realize(dc, mips_cpu_realizefn, &mcc->parent_realize); device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset); + device_class_set_props(dc, mips_cpu_properties); =20 cc->class_by_name =3D mips_cpu_class_by_name; cc->has_work =3D mips_cpu_has_work; diff --git a/target/mips/translate.c b/target/mips/translate.c index 9d13e164c2e..70e45b0f7ec 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -39,6 +39,7 @@ #include "exec/translator.h" #include "exec/log.h" #include "qemu/qemu-print.h" +#include "qapi/error.h" =20 #define MIPS_DEBUG_DISAS 0 =20 @@ -31319,7 +31320,14 @@ void mips_tcg_init(void) bool cpu_mips_realize_env(CPUMIPSState *env, Error **errp) { env->exception_base =3D (int32_t)0xBFC00000; - env->tlb_entries =3D 1 + extract32(env->cpu_model->CP0_Config1, CP0C1_= MMU, 6); + if (!env->tlb_entries) { + env->tlb_entries =3D 1 + extract32(env->cpu_model->CP0_Config1, + CP0C1_MMU, 6); + } else if (env->tlb_entries > 64) { + error_setg(errp, "Invalid value '%d' for property 'tlb-entries'", + env->tlb_entries); + return false; + } =20 #ifndef CONFIG_USER_ONLY mmu_init(env, env->cpu_model); --=20 2.26.2